CN103885800A - Implementation method and device for dynamic loading of execution codes by embedded processor - Google Patents

Implementation method and device for dynamic loading of execution codes by embedded processor Download PDF

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Publication number
CN103885800A
CN103885800A CN201410088822.XA CN201410088822A CN103885800A CN 103885800 A CN103885800 A CN 103885800A CN 201410088822 A CN201410088822 A CN 201410088822A CN 103885800 A CN103885800 A CN 103885800A
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processor
run time
time version
file
user command
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CN201410088822.XA
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Chinese (zh)
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余世均
李红京
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Autel Intelligent Technology Corp Ltd
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Autel Intelligent Technology Corp Ltd
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Priority to CN201410088822.XA priority Critical patent/CN103885800A/en
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Abstract

The invention relates to an implementation method and device for dynamic loading of execution codes by an embedded processor. The execution codes are stored on the same memory chip, an execution code file is established on the memory chip, and a data structure is added to the execution code file. The method includes the following steps that (11), a first processor receives a user command, whether the first processor supports the user command or not is examined, and if the answer is positive, a step 12 is executed; (12), the first processor reads code files corresponding to the user command from the execution code file and copies the corresponding code files to a second processor; (13), the second processor is under the operating state and executes the user command; (14), after the second processor executes the user command, the second processor stops operating. According to the method and device, the code memory chip is shared by multiple processors, so design cost of products can be saved.

Description

Implementation method and the device of flush bonding processor dynamic load run time version
Technical field
The present invention relates to a kind of implementation method and device of flush bonding processor dynamic load run time version.
Background technology
Along with the develop rapidly of electronic technology, embedded design has obtained corresponding development in electronic equipment and device, variously emerge in an endless stream with the electronic product based on embedded device, then universal due to embedded technology, the functional mobility of electronic equipment and Cost Competition become more and more stronger.
Existing embedded technology scheme is all generally that a processor completes one or more functions, such code storage chip is (such as NAND FLASH, NOR FLASH, EEPROM etc.) just can complete, also have plenty of multiple processors and worked in coordination with one or more functions, different like this processors has different codes, just needs multiple code storage chips to store different codes.Each processor is in starting, automatically the code loading on the storage chip being attached on own IO interface carries out to realize specific function or function group, once and program code programming is to storage chip, its function is just fixing, can not be more in real time according to can not application change more its function.
Therefore be necessary to provide a kind of implementation method and device of new flush bonding processor dynamic load run time version, to overcome above-mentioned defect.
Summary of the invention
Based on this, the invention provides a kind of implementation method and device of flush bonding processor dynamic load run time version, realize on same storage chip, by the code of different functions, or the code of different processor leaves different places in, with the access mode of file system, loading code while realizing a processor for another processor operation, and allowing it carry out, different functions loads different codes.
The implementation method that the invention provides a kind of flush bonding processor dynamic load run time version, described run time version leaves on same storage chip, and sets up run time version file on described storage chip, and adds data structure for run time version file;
The method comprises the steps,
Step 11, first processor is accepted user command, and checks whether oneself supports this user command, if supported, performs step 12;
Step 12, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
Step 13, makes the second processor enter running status, carries out user's order;
Step 14, when after the complete user's of the second processor order, the second processor stops operation.
Preferably, for run time version file adds after data structure, run time version file is encrypted,
Step 12 also comprises the steps, first processor from run time version file, read with the corresponding code file of described user command after, decipher described run time version file, then the corresponding code file after deciphering is copied to the second processor.
Preferably, the method also comprises the steps: between step 13 and step 14
Step 13a, carries out in user's the process of order at the second processor, judges whether to receive to stop order, stops order if received, and the second processor stops operation.
The present invention also provides a kind of implement device of flush bonding processor dynamic load run time version,
This device comprises storage chip, for depositing described run time version, and on described storage chip, sets up run time version file, and for run time version file is by adding data structure;
First processor, for accepting user command, and checks whether oneself supports this user command; If supported, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
The second processor, for receiving corresponding code file, and enters running status, carries out user's order; When after the complete user's of the second processor order, the second processor stops operation.
Preferably, this device
Storage chip also for run time version file by adding after data structure, run time version file is encrypted;
First processor also for read from run time version file with the corresponding code file of described user command, decipher described run time version file, then by deciphering after corresponding code file copy to the second processor.
Preferably, also for the process of the order execution user, judge whether to receive termination order at the second processor, stop order if received, the second processor termination moves.
Beneficial effect of the present invention is:
1. multiprocessor shares identical code storage chip, can save the design cost of product;
2. several functions code file is put together, and can be dynamically according to different pre-practical functions carry out can not code, increase the function of product, and can realize the flexible switching of multi-functional;
3. multi-functional product like this, can improve user's Experience Degree greatly.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of method provided by the invention.
Embodiment
Be described in detail below in conjunction with specific embodiment and the right technical scheme of accompanying drawing, so that it is clearer.Following examples are only in order to describe the cited comparatively detailed embodiment of the present invention, not as a limitation of the invention.
The implementation method of flush bonding processor dynamic load run time version provided by the invention, described run time version leaves on same storage chip, and sets up run time version file on described storage chip, and adds data structure for run time version file;
The method comprises the steps,
Step 11, first processor is accepted user command, and checks whether oneself supports this user command, if supported, performs step 12;
Step 12, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
Step 13, makes the second processor enter running status, carries out user's order;
Step 14, when after the complete user's of the second processor order, the second processor stops operation.
For run time version file adds after data structure, run time version file is encrypted,
Step 12 also comprises the steps, first processor from run time version file, read with the corresponding code file of described user command after, decipher described run time version file, then the corresponding code file after deciphering is copied to the second processor.
The method also comprises the steps: between step 13 and step 14
Step 13a, carries out in user's the process of order at the second processor, judges whether to receive to stop order, stops order if received, and the second processor stops operation.
The present invention also provides a kind of implement device of flush bonding processor dynamic load run time version,
This device comprises storage chip, for depositing described run time version, and on described storage chip, sets up run time version file, and for run time version file is by adding data structure;
First processor, for accepting user command, and checks whether oneself supports this user command; If supported, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
The second processor, for receiving corresponding code file, and enters running status, carries out user's order; When after the complete user's of the second processor order, the second processor stops operation.
This device
Storage chip also for run time version file by adding after data structure, run time version file is encrypted;
First processor also for read from run time version file with the corresponding code file of described user command, decipher described run time version file, then by deciphering after corresponding code file copy to the second processor.
Also for the process of the order execution user, judge whether to receive termination order at the second processor, stop order if received, the second processor termination moves.
Particularly, referring to Fig. 1, the implementation method of flush bonding processor dynamic load run time version provided by the invention comprises the steps:
1. processor 1 is take LINUX or bare machine system as operation platform, and on storage chip, realizes the management of file system.
2. processor 2 does not move in the time of start, in halted state, when need to realizing specific function, reads from file system by processor 1 and the corresponding code file of user command, the correctness of resolution file, in internal memory, decrypt file, and copy to the memory headroom of processor 2.
3. enable processor 2, allow it enter running status, complete the function of expection, be i.e. completing user order.
4. after processor 2 functions complete, processor 1 is controlled and is made it reenter halted state by IO, and waits for the command request that reception is new.
The above embodiment has only expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as limitation of the scope of the invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with claims.

Claims (6)

1. an implementation method for flush bonding processor dynamic load run time version, is characterized in that, described run time version leaves on same storage chip, and sets up run time version file on described storage chip, and adds data structure for run time version file;
The method comprises the steps,
Step 11, first processor is accepted user command, and checks whether oneself supports this user command, if supported, performs step 12;
Step 12, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
Step 13, makes the second processor enter running status, carries out user's order;
Step 14, when after the complete user's of the second processor order, the second processor stops operation.
2. the implementation method of flush bonding processor dynamic load run time version according to claim 1, is characterized in that, for run time version file adds after data structure, run time version file is encrypted,
Step 12 also comprises the steps, first processor from run time version file, read with the corresponding code file of described user command after, decipher described run time version file, then the corresponding code file after deciphering is copied to the second processor.
3. the implementation method of flush bonding processor dynamic load run time version according to claim 1 and 2, is characterized in that, the method also comprises the steps: between step 13 and step 14
Step 13a, carries out in user's the process of order at the second processor, judges whether to receive to stop order, stops order if received, and the second processor stops operation.
4. an implement device for flush bonding processor dynamic load run time version, is characterized in that, this device comprises
Storage chip for depositing described run time version, and is set up run time version file on described storage chip, and for run time version file is by adding data structure;
First processor, for accepting user command, and checks whether oneself supports this user command; If supported, first processor reads and the corresponding code file of described user command from run time version file, and corresponding code file is copied to the second processor;
The second processor, for receiving corresponding code file, and enters running status, carries out user's order; When after the complete user's of the second processor order, the second processor stops operation.
5. the implement device of flush bonding processor dynamic load run time version according to claim 4, is characterized in that, this device
Storage chip also for run time version file by adding after data structure, run time version file is encrypted;
First processor also for read from run time version file with the corresponding code file of described user command, decipher described run time version file, then by deciphering after corresponding code file copy to the second processor.
6. the implement device of flush bonding processor dynamic load run time version according to claim 4, it is characterized in that, also for the process of the order execution user, judge whether to receive termination order at the second processor, stop order if received, the second processor stops operation.
CN201410088822.XA 2014-03-11 2014-03-11 Implementation method and device for dynamic loading of execution codes by embedded processor Pending CN103885800A (en)

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Application Number Priority Date Filing Date Title
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101017440A (en) * 2006-02-09 2007-08-15 恩益禧电子股份有限公司 Multiprocessor system and start-up method from the same
US20070198981A1 (en) * 2006-02-17 2007-08-23 Jacobs Paul E System and method for multi-processor application support
CN101089877A (en) * 2006-06-14 2007-12-19 普天信息技术研究院 Method for dynamic aggregating multiple intelligent card function module based on memory card
CN101373434A (en) * 2007-08-22 2009-02-25 国际商业机器公司 Method and system for rapidly loading and operating program mapping in multiprocessor system
CN101876964A (en) * 2009-11-16 2010-11-03 北京华力创通科技股份有限公司 On-chip multi-processor structure of chip

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101017440A (en) * 2006-02-09 2007-08-15 恩益禧电子股份有限公司 Multiprocessor system and start-up method from the same
US20070198981A1 (en) * 2006-02-17 2007-08-23 Jacobs Paul E System and method for multi-processor application support
CN101089877A (en) * 2006-06-14 2007-12-19 普天信息技术研究院 Method for dynamic aggregating multiple intelligent card function module based on memory card
CN101373434A (en) * 2007-08-22 2009-02-25 国际商业机器公司 Method and system for rapidly loading and operating program mapping in multiprocessor system
CN101876964A (en) * 2009-11-16 2010-11-03 北京华力创通科技股份有限公司 On-chip multi-processor structure of chip

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Address after: 518000 Guangdong city of Shenzhen province Nanshan District Xili Street Xueyuan Road No. 1001 Chi Park B1 building 7 layer, 8 layer, 10 layer

Applicant after: SHENZHEN AUTEL TECHNOLOGY CO., LTD.

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Application publication date: 20140625

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