CN103873468A - Data co-processing device and method - Google Patents
Data co-processing device and method Download PDFInfo
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- CN103873468A CN103873468A CN201410091135.3A CN201410091135A CN103873468A CN 103873468 A CN103873468 A CN 103873468A CN 201410091135 A CN201410091135 A CN 201410091135A CN 103873468 A CN103873468 A CN 103873468A
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Abstract
The invention provides a data co-processing device and a data co-processing method. The device comprises an FPGA (field programmable gate array) and an external protocol processor, wherein a logical processing module is built in the FPGA; the logical processing module is connected in parallel with the logical processing module; when receiving service data of a core network, the FPGA distinguishes the service data into voice data and protocol data; the voice data are processed by the built-in logical processing module, the protocol data are processed by the external protocol processor, and then the data processed by the two components are converged to generate the processed service data; the processed service data are sent to an upper-layer processing module of a gateway system. According to the whole data co-processing device, the external protocol processor and the FPGA cooperate, so that the powerful logical processing capacity of the FPGA is fully utilized, the bottleneck problem of difficulty in processing of the service data of the core network through the FPGA is solved, and the capacity of a whole gateway multi-service data processing system is improved.
Description
Technical field
The present invention relates to gateway multi-service data processing technology field, particularly relate to the apparatus and method of associated treatment data.
Background technology
At GSM(Global System for Mobile communication, global system for mobile communications) in gateway system, core net is by SDH(Synchronous Digital Hierarchy, SDH (Synchronous Digital Hierarchy)) the STM-1(Synchronous Transfer Module that comes of network, synchronous transfer mode) carry 63 road E1 voice signals on signal.Zhe63 road E1 voice signal is linked in GSM gateway system through Iuh interface.And in current gateway system, data are to carry out packet switching in the mode of IP Ethernet.Therefore in the Iuh of gateway system interface module, this need to be inputted into 63 road E1 and be converted to 63 tunnel IP operation, to transmit in gateway system and process.On outbound course, it is upper in SDH transmission over networks that Iuh interface module need to be carried on 63 E1 63 to be sent road IP operation.This Iuh interface module is hereinafter referred to as " STM-1 interface modular converter ".STM-1 interface modular converter is except realizing the speech data conversion between IP and E1, also need to support the MTP2(Message Transfer Part level2 of E1 signaling simultaneously, information transmits the second layer) layer protocol, finally realize PSTN(Public Switched Telephone Network, Public Switched Telephone Network) function such as exchanges data, protocol analysis between net access side and back-end processing equipment.
Realize above-mentioned Business Processing, the normal device that adopts associated treatment data is FPGA(Field Programmable Gate Array at present, field programmable gate array).Business is divided into two large resume module in FPGA inside, be respectively protocol process module and logic processing module.What " protocol process module " used is the soft core of NIOS of FPGA inside, realizes the processing of signaling MTP2 layer protocol; What " logic processing module " used is the logical resource of FPGA inside, realizes the IP conversion process of speech data.The logical resource of FPGA inside is powerful, and by contrast, protocol processes ability is just lower, cause like this FPGA in the time processing above-mentioned business, there is disposal ability bottleneck, limit the ability of whole gateway multi-service data treatment system, cannot fully realize gateway multi-service data and efficiently process.
Summary of the invention
Based on this, there is disposal ability bottleneck for the device of general associated treatment data in embodiments of the invention, cannot make full use of its powerful logical process ability, limit the problem of the ability of whole gateway multi-service data treatment system, provide a kind of and can make full use of the logical process ability that FPGA is powerful, promote the apparatus and method of the associated treatment data of whole gateway multi-service data treatment system ability.
A kind of device of associated treatment data, comprise FPGA and external protocol processor, wherein, described FPGA comprises logic processing module, described external protocol processor and described logic processing module are connected in parallel, the two ends external core net of difference of described FPGA and the upper strata processing module of gateway system;
Described FPGA receives the business datum that core net is sent, and described business datum is divided into speech data and protocol data, described speech data is sent to described logic processing module and carry out logical process, described protocol data is sent to described external protocol processing mould device and carry out protocol processes, described external protocol is processed mould device and is processed after described protocol data, beam back protocol data after treatment to described FPGA, described FPGA converges speech data after treatment logic processing module and described external protocol processing mould device protocol data after treatment, business datum after formation processing, business datum after transmission processing is to the upper strata processing module of gateway system.
A kind of associated treatment data method, comprises step:
Receive the business datum that core net is sent, and described business datum is divided into speech data and protocol data;
Described speech data is sent to logic processing module and carry out logical process, described protocol data is sent to external protocol processing mould device and carry out protocol processes;
Speech data after treatment described logic processing module and described external protocol processing mould device protocol data after treatment are converged to the business datum after formation processing;
Send the upper strata processing module of described business datum after treatment to gateway system.
The apparatus and method of associated treatment data of the present invention, comprise the FPGA and the external protocol processor that are built-in with logic processing module, external protocol processor and logic processing module are connected in parallel, FPGA is in the time receiving the business datum of core net, business datum is divided into speech data and protocol data, by speech data by the processing of logic built processing module, protocol data is by the processing of external protocol processor, afterwards again by both convergences after treatment, generate business datum after treatment, send to the upper strata processing module of gateway system.The device of whole associated treatment data, by being set, external protocol processes mould device and FPGA co-ordination, make full use of the logical process ability that FPGA is powerful, solved the bottleneck problem of FPGA processing core net business datum, promoted whole gateway multi-service data treatment system ability.
Accompanying drawing explanation
Fig. 1 is the structural representation of first embodiment of device of associated treatment data of the present invention;
Fig. 2 is the structural representation of second embodiment of device of associated treatment data of the present invention;
Fig. 3 is the schematic flow sheet of first embodiment of associated treatment data method of the device of associated treatment data of the present invention;
Fig. 4 is the schematic flow sheet of second embodiment of associated treatment data method of the device of associated treatment data of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearer, below with reference to the accompanying drawings and embodiment, the present invention is further elaborated.Should be appreciated that concrete enforcement described herein, only in order to explain the present invention, does not limit the present invention.
The device embodiment of a kind of associated treatment data as shown in Figure 1, comprise FPGA100 and external protocol processor 200, wherein, described FPGA100 comprises logic processing module 300, described external protocol processor 200 is connected in parallel with described logic processing module 300, the two ends external core net of difference of described FPGA100 and the upper strata processing module of gateway system;
Described FPGA100 receives the business datum that core net is sent, and described business datum is divided into speech data and protocol data, described speech data is sent to described logic processing module 300 to be processed, described protocol data is sent to described external protocol processing mould device 200 and carry out protocol processes, described external protocol is processed mould device 200 and is processed after described protocol data, beam back protocol data after treatment to described FPGA100, described FPGA100 converges speech data after treatment logic processing module 300 and described external protocol processing mould device protocol data after treatment, business datum after formation processing, business datum after transmission processing is to the upper strata processing module of gateway system.
FPGA is field programmable gate array, and it is at PAL(Programmable Array Logic, programmable logic array), GAL(generic array logic, GAL) etc. the product that further develops on the basis of programming device.It occurs as a kind of semi-custom circuit in application-specific integrated circuit (ASIC) field, has both solved the deficiency of custom circuit, has overcome again the limited shortcoming of original programming device gate circuit number, has powerful logical process ability.
Specifically, FPGA is responsible for numerical control and the convergence of data separation, processing logic module and is uploaded to upper strata processing module the device of whole associated treatment data.External protocol processor is responsible for processing FPGA and is divided the protocol data sending, and after handling, gives back FPGA.
Data processing step is as follows:
1, core net is given STM-1 interface modular converter the STM-1 signal that comprises 63 road E1.
2, FPGA receives after data, and business datum is distinguished.
3, the logic processing module that FPGA gives FPGA inside speech data is carried out encapsulation process
4, FPGA transfers to external coprocessor to process protocol data.
5, external coprocessor is handled after protocol data, returns FPGA
6, FPGA processes being transferred to upper strata processing module after convergence.
The device of associated treatment data of the present invention, comprise the FPGA and the external protocol processor that are built-in with logic processing module, external protocol processor and logic processing module are connected in parallel, FPGA is in the time receiving the business datum of core net, business datum is divided into speech data and protocol data, by speech data by the processing of logic built processing module, protocol data is by the processing of external protocol processor, afterwards again by both convergences after treatment, generate business datum after treatment, send to the upper strata processing module of gateway system.The device of whole associated treatment data, by being set, external protocol processes mould device and FPGA co-ordination, make full use of the logical process ability that FPGA is powerful, solved the bottleneck problem of FPGA processing core net business datum, promoted whole gateway multi-service data treatment system ability.
Therein in an embodiment, described external protocol processor is provided with SGMII(Serial Gigabit Media Independent Interface, serial kilomegabit Media Independent Interface) interface, described external protocol processor carries out data interaction by described SGMII interface and described FPGA.
SGMII interface can be guaranteed data efficient, safe transmission, thereby guarantees that external protocol processor and FPGA fast, efficiently carry out data interaction.
As shown in Figure 2, in another embodiment, also comprise power supply 400, described power supply 400 is connected with described FPGA100.
In an embodiment, described external protocol processor is ARM, POWER PC or dsp processor therein, and described arm processor can be ARM9 processor.
ARM9 processor is ARM architecture processor of new generation, and it has the features such as low cost, high-performance, low-power consumption, has powerful protocol processes ability.
As shown in Figure 3, a kind of associated treatment data method of device of the associated treatment data based on above-mentioned, comprises step:
S200: receive the business datum that core net is sent, and described business datum is divided into speech data and protocol data;
S400: described speech data is sent to logic processing module and carry out logical process, described protocol data is sent to external protocol processing mould device and carry out protocol processes;
S600: speech data after treatment described logic processing module and described external protocol processing mould device protocol data after treatment are converged to the business datum after formation processing;
S800: send the upper strata processing module of described business datum after treatment to gateway system.
The associated treatment data method of the device of associated treatment data of the present invention, at FPGA in the time receiving the business datum of core net, business datum is divided into speech data and protocol data, by speech data by the processing of logic built processing module, protocol data is by the processing of external protocol processor, again by both convergences after treatment, generate business datum after treatment afterwards, send to the upper strata processing module of gateway system.Whole processing procedure, by processing mould device and FPGA co-ordination by external protocol, make full use of the logical process ability that FPGA is powerful, solved the bottleneck problem of FPGA processing core net business datum, promoted whole gateway multi-service data treatment system ability.
As shown in Figure 4, in another embodiment, after described S600, also comprise step:
S700: store described business datum after treatment.
By business datum storage backup after treatment, guarantee the safety of data, separately can be so that detect, check data in subsequent step.
As shown in Figure 4, in an embodiment, described S200 specifically comprises step therein:
S220: receive the business datum that core net is sent;
S240: receive business datum described in verification, in the time that verification is errorless, described business datum is divided into speech data and protocol data.
The business datum that core net is sent may cause the imperfect or mistake of transfer of data due to certain abnormal conditions, in the present embodiment, first need the business datum to receiving to carry out verification, in the time that verification is errorless, just can carry out next step and " described business datum be divided into speech data and protocol data ", guarantee that the safety of whole business data processing is with accurate.
The above embodiment has only expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (7)
1. the device of associated treatment data, it is characterized in that, comprise FPGA and external protocol processor, wherein, described FPGA comprises logic processing module, described external protocol processor and described logic processing module are connected in parallel, the two ends external core net of difference of described FPGA and the upper strata processing module of gateway system;
Described FPGA receives the business datum that core net is sent, and described business datum is divided into speech data and protocol data, described speech data is sent to described logic processing module and carry out logical process, described protocol data is sent to described external protocol processing mould device and carry out protocol processes, described external protocol is processed mould device and is processed after described protocol data, beam back protocol data after treatment to described FPGA, described FPGA converges speech data after treatment logic processing module and described external protocol processing mould device protocol data after treatment, business datum after formation processing, business datum after transmission processing is to the upper strata processing module of gateway system.
2. the device of associated treatment data according to claim 1, is characterized in that, described external protocol processor is provided with SGMII interface, and described external protocol processor carries out data interaction by described SGMII interface and described FPGA.
3. the device of associated treatment data according to claim 1 and 2, is characterized in that, also comprises power supply, and described power supply is connected with described FPGA.
4. the device of associated treatment data according to claim 1, is characterized in that, described external protocol processor is ARM, POWER PC or dsp processor.
5. an associated treatment data method, is characterized in that, comprises step:
Receive the business datum that core net is sent, and described business datum is divided into speech data and protocol data;
Described speech data is sent to logic processing module and carry out logical process, described protocol data is sent to external protocol processing mould device and carry out protocol processes;
Speech data after treatment described logic processing module and described external protocol processing mould device protocol data after treatment are converged to the business datum after formation processing;
Send the upper strata processing module of described business datum after treatment to gateway system.
6. associated treatment data method according to claim 5, it is characterized in that, describedly speech data after treatment described logic processing module and described external protocol processed to mould device protocol data after treatment converge, after the business datum after formation processing also in steps:
Store described business datum after treatment.
7. according to the associated treatment data method described in claim 5 or 6, it is characterized in that, the business datum that described reception core net is sent, and described business datum is divided into speech data and protocol data specifically comprises step:
Receive the business datum that core net is sent;
Described in verification, receive business datum, in the time that verification is errorless, described business datum is divided into speech data and protocol data.
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| CN104270341A (en) * | 2014-09-03 | 2015-01-07 | 烽火通信科技股份有限公司 | A data protocol forwarding system and method in an IPRAN |
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| CN101938452A (en) * | 2009-07-01 | 2011-01-05 | 大唐移动通信设备有限公司 | Communication device |
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| US6751198B1 (en) * | 1999-12-27 | 2004-06-15 | Nortel Networks Limited | System and method for measuring round trip delay of voice packets in a telephone system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104270341A (en) * | 2014-09-03 | 2015-01-07 | 烽火通信科技股份有限公司 | A data protocol forwarding system and method in an IPRAN |
| CN104270341B (en) * | 2014-09-03 | 2017-10-10 | 烽火通信科技股份有限公司 | Data protocol repeater system in ip ran and method |
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