CN103854590A - Plasma display device and drive method - Google Patents
Plasma display device and drive method Download PDFInfo
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- CN103854590A CN103854590A CN201410079381.7A CN201410079381A CN103854590A CN 103854590 A CN103854590 A CN 103854590A CN 201410079381 A CN201410079381 A CN 201410079381A CN 103854590 A CN103854590 A CN 103854590A
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Abstract
The invention discloses a plasma display device and a drive method. The plasma display device comprises a scanning electrode, an addressing electrode, a maintaining electrode and a driver used for exerting drive waveforms. The driver exerts the following drive waveforms that in one sub-field, on the basis of a slow-descending step-shaped waveform zone in a drive waveform reset period stage and an addressing period X_shelf reference voltage, a voltage is superimposed. Under the condition that PCB parameters are not adjusted, the problem of low discharge after PDP black background pictures are mutually switched is solved, effects are obvious, it is ensured that a product is not affected, and extremely large economic value is achieved.
Description
Technical field
The application belongs to PDP(plasma scope) drive waveforms technical field, relate in particular to a kind of plasma display panel device and driving method.
Background technology
PDP type of drive mainly adopts addressing and shows the method separating at present, and the drive waveforms of a frame picture comprises 10 subfields.Each subfield comprises reset period, address period and maintenance phase.
Switching between PDP display image carrys out transition by black picture, in the time that black transition picture finishes, the drive waveform program of display frame starts, there is macroscopic coloured image, but that the not every discharge cell of coloured image that PDP shows all needs is luminous, always there are some even more black background images.Along with the development high energy efficiency low-power consumption of PDP technology is megatrend, increasing Xe gas content in penning device gas is that PDP field often adopts a kind of method, wherein spinoff is also apparent, the firing voltage (Vf) that is discharge cell raises, its performance is exactly that black background image is while mutually switching, the objective fact that exists discharge cell discharge lag to increase, be that partial discharge unit cannot be luminous immediately, after needing time delay a period of time, just can return to normal luminance, and the low discharge occurring within blink badly influences the display effect of coloured image.
Mutually switch the problem of rear low discharge in order to solve PDP black background picture, conventionally adopting raises maintains the mode of voltage (Vs), but scope, the effect adjusted have certain limitation, probably cause circuit board inefficacy to occur that deadlock, shutdown etc. affect the problem of product quality if adjust off-rating, in order to improve the reliability of PDP product, avoid adjusting the mode of pcb board parameter as far as possible.
Summary of the invention
For addressing the above problem, the invention provides a kind of plasma display panel device, comprise scan electrode, addressing electrode, maintain electrode, for applying the driver of drive waveforms,
Wherein said driver applies following drive waveforms: in a subfield, and the stepped waveform interval of described drive waveforms reset period stage slow decreasing and the voltage that superposes again on the basis of address period X_shelf reference voltage.
Further, described drive waveforms applies in first first subfield of frame picture.
The driving method of above-mentioned plasma display panel device is: in a subfield, and the stepped waveform interval of described drive waveforms reset period stage slow decreasing and the voltage that superposes again on the basis of address period X_shelf reference voltage.
Further, described drive waveforms applies in first first subfield of frame picture.
Beneficial effect of the present invention is:
The present invention has solved the problem of low discharge after PDP black background picture switches mutually in the situation that not adjusting pcb board parameter, effect is remarkable, guarantee product is unaffected, for PDP panel manufacturing enterprise, using lower cost materials is the trend of enterprise development, certainly also there is certain hidden danger of quality, for example: the low cost ADD(addressing electrode) use of material (reduction of argent content), its negative interaction bringing is that ADD electrode impedance increases that low discharge is bad just becomes maximum hidden danger of quality, application by above-mentioned Driving technique can well improve this badness, for enterprise, just can produce huge economic worth.
Brief description of the drawings
Fig. 1 is drive waveforms schematic diagram in prior art.
Fig. 2 is embodiment 1 drive waveforms Ramp-up and Ramp-down stage schematic diagram.
Fig. 3 is embodiment 2 drive waveforms Ramp-up and Ramp-down stage schematic diagram.
Fig. 4 is drive waveforms schematic diagram in embodiment 3.
Embodiment
Plasma display equipment of the present invention be included in upper substrate place scan electrode, addressing electrode, maintain electrode, for applying the driver of drive waveforms, by the drive waveforms being applied by this driver, produce discharge and show image.
Prior art ionic medium display device type of drive mainly adopts addressing and shows the method separating, and the drive waveforms of a frame picture comprises 10 subfields.Each subfield comprises reset period, address period and maintenance phase.Be PDP drive waveforms in prior art as shown in Figure 1.
Reset period is that whole discharge cells are carried out to initialization, object is that the state of all discharge cells is consistent, reach firing voltage and do not produce again strong electric discharge, the stepped waveform that comprises the Ramp-up(rising in Fig. 1) and the stepped waveform of Ramp-down(slow decreasing) two stages, be weak dark discharge.Ramp-up reference voltage: 330 ± 20V in prior art; Ramp-down reference voltage: 150 ± 10V.
Address period scan electrode (Y electrode) output scanning pulse successively, addressing electrode (A electrode) is according to required demonstration image synchronization output addressing pulse, only have those on addressing electrode and scan electrode, to have the unit of relevant voltage just can discharge simultaneously, in those discharge cells, accumulate wall electric charge, these wall electric charges determine that this discharge cell is continue electric discharge or keep extinguishing.
Maintenance phase only has the discharge cell of wall charge accumulated in address period, maintain electrode (X electrode), Y electrode just can alternately apply and maintain pulse signal, and discharge cell just can Discharge illuminating.
Embodiment 1:
Design concept: promote the first frame picture ceiling voltage in first subfield reset period waveform Ramp-up stage on the basis of original PDP Y electrode drive waveform.
Ultimate principle: the voltage that promotes the Ramp-up stage, further strengthen the intensity of the weak dark discharge of discharge cell, on Y electrode, obtain the accumulation (A and X electrode dielectric layer surface accumulation positive charge) of how negative wall electric charge, balance out the continuous rising of external voltage simultaneously, make discharge cell remain on firing voltage (so-called firing voltage drives discharge cell (3 discharge cells equals's a pixel) minimum driving voltage exactly) state, thereby after discharge can be carried out as basis taking consistent state.
Fig. 2 is shown according to the drive waveforms Ramp-up of the plasma display equipment of the first embodiment and the oscillogram in two stages of Ramp-down.Dotted portion is the voltage in the Ramp-up stage of increase.Maintaining after the utmost point short time, because energy recovers, be reduced to the ability return voltage of original Ramp-up.
Ramp-up stage voltage lifting capacity is selected different and different according to actual conditions.
Embodiment 2:
Design concept: the minimum voltage that reduces first subfield reset period waveform of the first frame picture Ramp-down depression of order section on the basis of original PDP Y electrode drive waveform.
Ultimate principle: reduce the voltage in Ramp-down stage, actual in increasing Ramp-down voltage, voltage direction is negative sense.Owing to having accumulated abundant wall electric charge in the Ramp-up stage, Ramp-down is in the process of slow decreasing, erasure discharge ability strengthens, all discharge cells generate erasure discharge and are generated enough space ions to wipe wall electric charge and Ramp-up stage, the evenly residual wall electric charge that can stablize generation address discharge will be formed, thereby reduce the firing voltage of discharge cell, eliminated discharge lag.
Ramp-down stage voltage reducing amount is selected different and different according to actual conditions.
This embodiment can be combined with embodiment 1.Figure 3 shows that drive waveforms Ramp-up and the oscillogram in two stages of Ramp-down in conjunction with post plasma display device.Dotted portion is the voltage in the Ramp-down stage of reduction.Maintaining after the utmost point short time, because energy recovers, be reduced to original Y_shelf voltage.
Embodiment 3:
Design concept a: voltage (Fig. 4) superposes on the Ramp-down stage of first first subfield reset period of frame picture and the basis of address period X_shelf reference voltage again.
Ultimate principle: do not change on the basis of PDP Y electrode drive waveform, on original X_shelf voltage, give Ramp-down and the address period X_shelf voltage that superposes again, improve the strength of discharge between Y electrode and X electrode, make the abundant wall electric charge of electrode dielectric layer surface accumulation and produce abundant space ion, thereby reach and reduce the firing voltage of discharge cell and avoid discharge lag, thoroughly eliminating black background picture, mutually to switch rear low discharge bad.Its object is exactly to reduce the voltage of discharge cell Vf, eliminates discharge lag.
The voltage superposeing on the basis of benchmark X_shelf voltage is according to actual conditions and difference, and X_shelf voltage reference value is: 75 ± 10V.
Fig. 4 is the drive waveforms of the plasma display equipment of the 3rd embodiment.Dotted portion is the voltage signal after stack.
It should be noted that, mutually switch the order of severity of rear low discharge according to PDP black background picture, also can be at the second frame picture, the 3rd frame picture, the 4th frame picture the like, using technique scheme, other frame picture is according to driven wave setting.
Above-mentioned three embodiment can use separately and solve PDP black background picture and mutually switch rear low discharge problem, can also any two kinds of technical schemes combine to use or three kinds of technical schemes are used together simultaneously.
The driving method of above-mentioned plasma display panel device, in a subfield, in described drive waveforms reset period waveform, the ceiling voltage of the stepped waveform of rising is higher than the stepped waveform reference voltage of rising.
Further, in described drive waveforms reset period waveform the minimum voltage of the stepped waveform of slow decreasing lower than the reference voltage of the stepped waveform of slow decreasing.
Further, stepped waveform interval and the voltage that superposes again on the basis of address period X_shelf reference voltage of described drive waveforms reset period stage slow decreasing.
Further, stepped waveform interval and the voltage that superposes again on the basis of address period X_shelf reference voltage of described drive waveforms reset period stage slow decreasing.
Further, described drive waveforms applies in first first subfield of frame picture.
Beneficial effect of the present invention is:
The present invention has solved the problem of low discharge after PDP black background picture switches mutually in the situation that not adjusting pcb board parameter, effect is remarkable, guarantee product is unaffected, for PDP panel manufacturing enterprise, using lower cost materials is the trend of enterprise development, certainly also there is certain hidden danger of quality, for example: the low cost ADD(addressing electrode) use of material (reduction of argent content), its negative interaction bringing is that ADD electrode impedance increases that low discharge is bad just becomes maximum hidden danger of quality, application by above-mentioned Driving technique can well improve this badness, for enterprise, just can produce huge economic worth.
Claims (4)
1. a plasma display panel device, is characterized in that, comprises scan electrode, addressing electrode, maintains electrode, for applying the driver of drive waveforms,
Wherein said driver applies following drive waveforms: in a subfield, and the stepped waveform interval of described drive waveforms reset period stage slow decreasing and the voltage that superposes again on the basis of address period X_shelf reference voltage.
2. plasma display panel device as claimed in claim 1, is characterized in that, described drive waveforms applies in first first subfield of frame picture.
3. the driving method of plasma display panel device as claimed in claim 1 or 2, is characterized in that, the stepped waveform interval of described drive waveforms reset period stage slow decreasing and the voltage that superposes again on the basis of address period X_shelf reference voltage.
4. the driving method of plasma display panel device as claimed in claim 3, is characterized in that, described drive waveforms applies in first first subfield of frame picture.
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| CN201410079381.7A CN103854590A (en) | 2014-03-06 | 2014-03-06 | Plasma display device and drive method |
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| CN201410079381.7A CN103854590A (en) | 2014-03-06 | 2014-03-06 | Plasma display device and drive method |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002366092A (en) * | 2001-06-12 | 2002-12-20 | Matsushita Electric Ind Co Ltd | Plasma display device |
| CN1801274A (en) * | 2004-10-25 | 2006-07-12 | 三星Sdi株式会社 | Plasma display device and driving method thereof |
| CN1808541A (en) * | 2005-01-19 | 2006-07-26 | 三星Sdi株式会社 | Plasma display device and driving method |
| CN101542564A (en) * | 2007-09-11 | 2009-09-23 | Lg电子株式会社 | Plasma display apparatus and method of driving the same |
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2014
- 2014-03-06 CN CN201410079381.7A patent/CN103854590A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002366092A (en) * | 2001-06-12 | 2002-12-20 | Matsushita Electric Ind Co Ltd | Plasma display device |
| CN1801274A (en) * | 2004-10-25 | 2006-07-12 | 三星Sdi株式会社 | Plasma display device and driving method thereof |
| CN1808541A (en) * | 2005-01-19 | 2006-07-26 | 三星Sdi株式会社 | Plasma display device and driving method |
| CN101542564A (en) * | 2007-09-11 | 2009-09-23 | Lg电子株式会社 | Plasma display apparatus and method of driving the same |
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Application publication date: 20140611 |