CN103838676B - Data-storage system, date storage method and PCM bridges - Google Patents
Data-storage system, date storage method and PCM bridges Download PDFInfo
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- CN103838676B CN103838676B CN201210478421.6A CN201210478421A CN103838676B CN 103838676 B CN103838676 B CN 103838676B CN 201210478421 A CN201210478421 A CN 201210478421A CN 103838676 B CN103838676 B CN 103838676B
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Abstract
The embodiment of the present invention provides a kind of data-storage system, date storage method and PCM bridges, and the system includes：Processor, Memory Controller Hub, phase transition storage PCM bridges and phase transition storage PCM, processor is connected by Memory Controller Hub with PCM bridges, PCM bridges are connected with PCM, be stored with non-volatile small data in PCM, PCM bridges be used for by Memory Controller Hub receive from CPU for reading or writing the first operation signal of small data, the first operation signal is changed into the second operation signal that can read or write PCM to read the small data in PCM by the second operation signal or toward writing small data in PCM.Data-storage system provided in an embodiment of the present invention, date storage method and PCM bridges, using PCM read or write can step-by-step read or write, improve operating efficiency, add lifetime of system, accelerate the ability of data access.
Description
Technical field
The present embodiments relate to data storage technology, more particularly to a kind of data-storage system, date storage method and
PCM bridges.
Background technology
In the storage architecture that traditional nand flash memory NAND Flash are constituted, data write NAND within the storage system
During Flash, NAND Flash are needed by reading dynamic random access memory（Dynamic RandomAccess
Memory, hereinafter referred to as：DRAM）, changed in DRAM, then write back the process in NAND Flash；In ablation process, member
Data Metadata is written to together with user data Userdata in NAND Flash, and metadata Metadata is commonly stored in
In NANDMetadata block, because metadata Metadata sizes are generally less than the file system stored based on NAND Flash
The size for smallest blocks of uniting and update frequent, on the one hand cause NAND Flash additional management expense, on the other hand also plus
NAND Flash life consumption is weighed；NAND Flash are operated in itself in addition and is also required to first wipe Erase and then could compile
Journey.
During the embodiment of the present invention is realized, inventor is had found in the prior art, and NAND Flash write-in flows are answered
It is miscellaneous, do not support to write direct and changed, it is necessary to first read in DRAM；Metadata Matadata, which is frequently changed, can accelerate that NAND is lost
The Flash life-spans, and metadata Matadata majorities are small datas, are set less than the file system smallest blocks based on NAND Flash
Standby management size, the waste for causing file system to load.
The content of the invention
A kind of data-storage system, date storage method and PCM bridges are present embodiments provided, is deposited for solving prior art
Read-write NAND Flash cause file system load waste the problem of.
In a first aspect, the embodiment of the present invention provides a kind of data-storage system, including：
Processor, Memory Controller Hub, phase transition storage PCM bridges and phase transition storage PCM；
The processor is connected by the Memory Controller Hub with the PCM bridges, and the PCM bridges are connected with the PCM；
Be stored with non-volatile small data in the PCM；
The PCM bridges, which are used to receiving being used for from the CPU by the Memory Controller Hub, reads or writes the of small data
One operation signal, first operation signal is changed into the second operation signal that can read or write the PCM to pass through
Second operation signal is read the small data in the PCM or toward writing small data in the PCM.
With reference in a first aspect, in the first possible embodiment of first aspect, the PCM is passed through specifically for storage
The non-volatile small data often read or write.
With reference to the first possible embodiment of first aspect or first aspect, second in first aspect is possible
In embodiment, first operation signal includes read signal, and described change into first operation signal can be to the PCM
The second operation signal read is included with carrying out reading to the small data in the PCM by second operation signal：
The read signal is changed into the read signal that the PCM can be read with by the read signal to the PCM
In small data read.
Second with reference to the first possible embodiment or first aspect of first aspect or first aspect is possible
Embodiment, in the third possible embodiment of first aspect, the PCM bridges are additionally operable to：
Received by the Memory Controller Hub is used for depositing to the PCM small datas stored from the CPU
Storage space puts the adjustment signal being adjusted, the storage location to the PCM small datas stored be adjusted including：
The relatively low small data of frequency of use that the PCM is stored is removed from the PCM memory, or by higher small of frequency of use
Data are moved to the PCM memory；
The adjustment signal is changed into the adjustment signal that can be read or write to the PCM with by the adjustment signal
Storage location to the small data in the PCM is adjusted.
Second with reference to the first possible embodiment or first aspect of first aspect or first aspect is possible
The third possible embodiment of embodiment or first aspect, in addition to：
Internal memory, is connected by the Memory Controller Hub with the processor, for storing number required during CPU configuration processors
According to.
Peripheral memory, for being connected by Peripheral Interface with the CPU；
The peripheral memory is stored with non-volatile big data, and the CPU is additionally operable to by the Peripheral Interface pair
The peripheral memory carries out read or write, wherein, the big data is the data bigger than small data.
Second with reference to the first possible embodiment or first aspect of first aspect or first aspect is possible
The third possible embodiment of embodiment or first aspect, the small data is small user data, or metadata
Any one or more in metadata, or syslog data.
With reference to first aspect and all embodiments of first aspect, in another embodiment, the small data is size
Block peration data when being operated less than general flash.
It is big with reference to first aspect and all embodiments of first aspect, in another embodiment, the small data byte
It is small to be less than or equal to 512 bytes.
Second aspect, the embodiment of the present invention provides a kind of date storage method, including：
Use from the CPU being connected with the Memory Controller Hub is received by the Memory Controller Hub being connected with the PCM bridges
The first behaviour that the non-volatile small data stored in couple phase transition storage PCM being connected with the PCM bridges is read or write
Make signal；
First operation signal is changed into the second operation signal that can be read or write to the PCM with by described
Second operation signal is read the small data in the PCM or toward writing small data in the PCM.
In the first embodiment of second aspect, the small data is the small data often read or write.
With reference to the first embodiment of second aspect or second aspect, in second of embodiment of second aspect,
First operation signal includes read signal, described that first operation signal is changed into can be read the PCM the
Two operation signals are included with carrying out reading to the small data in the PCM by second operation signal：
The read signal is changed into the read signal that the PCM can be read with by the read signal to the PCM
In small data read.
With reference to the first embodiment or second of embodiment of second aspect of second aspect or second aspect,
In the third embodiment of two aspects, in addition to：
Received by the Memory Controller Hub is used for depositing to the PCM small datas stored from the CPU
Storage space puts the adjustment signal being adjusted, the storage location to the PCM small datas stored be adjusted including：
The relatively low small data of frequency of use that the PCM is stored is removed from the PCM memory, or by higher small of frequency of use
Data are moved to the PCM memory；
The adjustment signal is changed into the adjustment signal that can be read or write to the PCM with by the adjustment signal
Storage location to the small data in the PCM is adjusted.
With reference to the first embodiment of second aspect or second aspect or second of embodiment of second aspect or
The third embodiment of two aspects, in the 4th kind of embodiment of second aspect, in addition to：
Data needed for the memory storage CPU operations being connected by the Memory Controller Hub with processor, for the CPU
Read or write the data needed for configuration processor；
Peripheral memory is connected by Peripheral Interface with the CPU；
The peripheral memory is stored with non-volatile big data, and the CPU is additionally operable to by the Peripheral Interface pair
The peripheral memory carries out read or write.
With reference to the first embodiment of second aspect or second aspect or second of embodiment of second aspect or
The third embodiment of two aspects or the 4th kind of embodiment of second aspect, the small data is small user data, or
Person metadata metadata, or any one or more in syslog data；Or,
The small data is block peration data when being operated less than general flash；Or,
The small data size is less than or equal to 512 bytes.
The third aspect, the embodiment of the present invention provides a kind of PCM bridges, including：
Receiving unit, receives for the Memory Controller Hub by being connected with the PCM bridges and comes from and the Memory Controller Hub
The connected CPU non-volatile small data for being used to store in couple phase transition storage PCM being connected with the PCM bridges is read
Or the first operation signal write；
Conversion unit, first operation signal for the receiving unit to be received changes into and the PCM can be entered
The second operation signal that row reads or writes；
Unit is read or write, for second operation signal that is converted according to the conversion unit to small in the PCM
Data are read or toward writing small data in the PCM.
In the first embodiment of the third aspect, the small data is the small data often read or write.
With reference to the first embodiment of the third aspect or the third aspect, in second of embodiment of the third aspect,
First operation signal includes read signal, described that first operation signal is changed into can be read the PCM the
Two operation signals are included with carrying out reading to the small data in the PCM by second operation signal：
The read signal is changed into the read signal that the PCM can be read with by the read signal to the PCM
In small data read.
It is described with reference to the first embodiment or second of embodiment of the third aspect of the third aspect or the third aspect
Small data is any one or more in small user data, either metadata metadata or syslog data；Or
Person,
The small data is block peration data when being operated less than general flash；Or
The small data byte-sized is less than or equal to 512 bytes.
Data-storage system provided in an embodiment of the present invention, date storage method and PCM bridges, processor pass through Memory control
Device is connected with PCM bridges, and PCM bridges are connected with PCM, and be stored with non-volatile small data in PCM, and PCM bridges are used to pass through internal memory control
Device processed receives the first operation signal for being used to read or write the small data that PCM is stored from CPU, by the first operation signal
The second operation signal that read or write of physics can be carried out to enter the small data in PCM by the second operation signal to PCM by changing into
Row reads or writes.Realize using PCM read or write can the characteristic that reads or writes of step-by-step, improve operating efficiency, add lifetime of system,
Accelerate the ability of data access.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing used required in technology description to be briefly described, it should be apparent that, drawings in the following description are this hairs
Some bright embodiments, for those of ordinary skill in the art, without having to pay creative labor, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the structural representation of data-storage system embodiment one provided in an embodiment of the present invention；
Fig. 2 is the structural representation of data-storage system embodiment two provided in an embodiment of the present invention；
Fig. 3 is the structural representation of data-storage system embodiment three provided in an embodiment of the present invention；
Fig. 4 is the software sharing structural representation of data-storage system example IV provided in an embodiment of the present invention；
Fig. 5 is the schematic flow sheet of date storage method embodiment one provided in an embodiment of the present invention；
Fig. 6 writes schematic flow sheet for the data of date storage method provided in an embodiment of the present invention；
Fig. 7 is the structural representation of PCM bridges embodiment one provided in an embodiment of the present invention.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
A part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
In storage system of the tradition based on DRAM＆Flash/HDD, memory Memory is high speed volatile, storage
Device Storage is that relative low speeds are non-volatile, and the two has the wide gap that not may span across.PCM, which possesses close to DRAM, reads or writes delay
Grade Scale abilities are drawn with outstanding, indicate the potentiality of its capacity extension, and also there is byte Byte changeabilities and non-volatile
Property, obscure memory Memory and memory Storage boundary.Physics limit is faced in flash memory Flash techniques, PCM makees
For most possible substitution flash memory Flash technology, the storage scheme based on PCM is designed, the performance for playing device can be maximized.
Data-storage system, date storage method and PCM that embodiment that the invention will now be described in detail with reference to the accompanying drawings is provided
Bridge.
Fig. 1 is the structural representation of data-storage system embodiment one provided in an embodiment of the present invention, as shown in figure 1, number
Include processor 11, Memory Controller Hub 12, phase transition storage PCM bridges 13 and phase transition storage PCM14 according to storage system, its
In,
Processor 11 is connected by Memory Controller Hub 12 with PCM bridges 13, and PCM bridges 13 are connected with PCM14, is stored in PCM14
There is non-volatile small data（It is non-volatile to refer to that data disappear after lower electricity, still preserve in memory）, PCM bridges 13
For receiving the first operation signal for reading or writing small data from CPU by Memory Controller Hub 12, the first operation is believed
Number change into the second operation signal that PCM14 can be read or write with by the second operation signal to the small data in PCM14
Read or toward writing small data in PCM14.First operation signal includes reading or writing signal, and the first operation signal is changed into energy
The second operation signal read or write to PCM with by the second operation signal the small data in PCM is read or write including：
By read or write signal change into PCM can be read or write read or write signal with by reading or writing signal to the decimal in PCM
According to being read or write.For example, CPU issues the first operation signal that logic is write, PCM bridges receive this first behaviour by Memory Controller Hub
Make signal, the first operation signal is then changed into the second operation signal that can be read or write to PCM progress physics with by second
Operation signal carries out write operation to the small data in PCM.Read operation is similar, does not repeat herein.
Wherein, small data is the small data that is often read or write, can be according to different situations depending on, the present embodiment to this not
It is limited.
Wherein, PCM bridges are additionally operable to receive by Memory Controller Hub is used for depositing to the PCM small datas stored from CPU
Storage space puts the adjustment signal being adjusted, to PCM store small data storage location be adjusted including：PCM is stored
The relatively low small data of frequency of use is removed from PCM memory, or the higher small data of frequency of use is moved into PCM storages
Device；Adjustment signal is changed into the adjustment signal that can be read or write to PCM with by adjusting signal to the small data in PCM
Storage location is adjusted.
The data-storage system that the present embodiment is provided, processor is connected by Memory Controller Hub with PCM bridges, PCM bridges and PCM
Be connected, be stored with non-volatile small data in PCM, PCM bridges be used for by Memory Controller Hub receive from CPU for pair
The first operation signal that the small data of PCM storages is read or write, the first operation signal, which is changed into, to carry out physical read to PCM
Or the second operation signal write by the second operation signal to the small data in PCM to be read or write.Being read or write using PCM can
Step-by-step is read or write, it is necessary to when reading or writing, it is only necessary to several, improves operating efficiency.Simultaneously as every time and be not required to
A block is read or write, operating efficiency is improved so as to increase the life-span, therefore realize, adds lifetime of system, accelerate number
According to the ability of access.
Fig. 2 is the structural representation of data-storage system embodiment two provided in an embodiment of the present invention, as shown in Fig. 2
On the basis of embodiment illustrated in fig. 1, data-storage system also includes internal memory 15, and internal memory 15 passes through Memory Controller Hub 12 and processor
11 are connected, and internal memory 15 is used to read or write the data needed for configuration processor for CPU.
As a kind of enforceable mode, data-storage system may also include peripheral memory, and peripheral memory is used to lead to
Cross Peripheral Interface with CPU to be connected, peripheral memory is stored with non-volatile big data（The data bigger than small data, such as size
More than the data of some threshold value, " threshold value " size here is not limited, and those skilled in the art can enter with reference to actual conditions
Row adjustment, for example, can be 512 bytes, or bigger byte number）, CPU is additionally operable to by Peripheral Interface to peripheral memory
Carry out read or write.Compared above-described embodiment, and non-volatile big data can be stored in peripheral memory, read
Or write operation.
Small data is small user data in above-described embodiment, either metadata metadata or syslog data
In any one or more, small data is block peration data when operate less than general flash, small data size for less than etc.
In 512 bytes.
Below using a specific embodiment, the technical scheme to said system embodiment is described in detail.
Fig. 3 is the structural representation of data-storage system embodiment three provided in an embodiment of the present invention, as shown in figure 3, this
The data-storage system that embodiment is provided includes host computer system and peripheral memory, the host bus adaptor of host computer system with it is outer
If passing through fiber channel protocol between the host adapter of memory（Fibre Channel Protocol, referred to as：FC）, ether
The communication connection such as net.Host computer system includes having a server machine frame in the first central processor CPU, host computer system, and the inside has
The chips such as multi-core CPU, internal memory, PCM bridges are installed on one piece of bottom plate, bottom plate, for being controlled to other expansion cards, master are realized
The function of machine；And it is connected to main frame storage mould in the main frame memory module on the first central processor CPU, the embodiment of the present invention
Block includes several first phase transition storage PCM and DRAM, by first in rambus and the first central processor CPU
Memory controller be connected, due to PCM be connected with the first Memory Controller Hub in CPU thus its respond and processing speed soon, but its
Internal memory is not especially big, so being needed for internal memory, main frame memory module may also include several phase transformations and deposit in the embodiment of the present invention
Reservoir dual inline memory module PCM DIMM, are connected by input and output transponder IOH with the first central processor CPU,
Phase transition storage dual inline memory module PCM DIMM are slow compared to its response of PCM and processing speed, but it has larger
Internal memory.Therefore main frame memory module can include PCM or/and phase transition storage dual-in-line for different demands setting herein
Formula memory module PCM DIMM.
At least include peripheral hardware hard disk in peripheral memory.
Several phase transition storage dual inline memory module PCM DIMM mentioned above are with peripheral component interconnection
The form of express passway PCIE expansion cards, is connected on input and output transponder IOH, in PCIE expansion card forms, is connected to IO
PCM DIMM bars above Hub, can replacing NAND flash, there is provided read or write performance and longer service life faster.
PCM memory grains include PCM controller, and PCM controller is also a chip, such as FPGA, ASIC, by entering to this chip
Row programming carries out various access and control to complete the request that reads or writes of Receiving Host to PCM chips；PCM controller correspondence
Chip can be all disposed within each PCM on a pcb board, by PCB trace be connected, what is finally presented is that a biserial is straight
The formula of inserting memory module DIMM strips, can directly be accessed by rambus Memory bus.Can also be by the present embodiment
Phase transition storage dual inline memory module PCM DIMM bars and PCM controller make a PCIE SSD card, pass through PCIE
Interface is connected with bottom plate, uses, is accessed by PCIE as the data storage of main frame.
Peripheral memory also includes the second central processor CPU, as shown in figure 3, there is a server in peripheral memory
Machine frame, the inside, which has, is provided with the chips such as multi-core CPU, internal memory, PCM bridges on one piece of bottom plate, bottom plate, for being carried out to other expansion cards
Control.Second central processor CPU is connected by input and output transponder IOH with peripheral hardware hard disk.
Peripheral memory also includes multiple second phase transition storage PCM and DRAM, PCM and DRAM and passes through rambus and the
The second Memory Controller Hub connection in two central processor CPUs, PCM particles and controller are connected to rambus Memory bus
On, because PCM power failure datas are not lost, can store, be accessed in the form of internal memory as small data, as server code and
Metadata Metadata is stored.Host adapter in peripheral memory through PCIE by IO Hub transfers, to PCIE/SAS/
SATA interface NAND SSD and SAS/SATA interfaces HDD.Peripheral memory main frame reads or writes PCM/ by Memory controllers
Small data in DRAM, by PCIe card, reads the data in PCM.
Peripheral hardware hard disk includes NAND Flash and/or hard disk drive HDD in the present embodiment.
The embodiment of the present invention is improved data Stored Procedure, that is, distinguish big data and small data storage framework and
Passage, based on PCM memory read or write can step-by-step read or write the characteristics of, small data is stored and reads or writes and is optimized, it is real
Operating efficiency is now improved, lifetime of system is added, accelerates the ability of data access.
Introduce PCM as after storage medium, it is necessary to for pcm word section it is variable the characteristics of, different from block device access text
Part system, designs the storage software systems based on byte-accessed.Fig. 4 is implemented for data-storage system provided in an embodiment of the present invention
The software sharing structural representation of example four, as shown in figure 4, in the traditional file systemses of byte-accessed, virtually being deposited comprising one
Reservoir, virtual memory layer has 64bit（Or it is bigger）Address space or 64bit（Or it is bigger）Progress read or write and divide again
The address space matched somebody with somebody, can carry out the operation of the function of cold and hot data Layer.There are Virtual PC M accumulation layers, void under virtual memory layer
Intend Flash accumulation layers, virtual HDD accumulation layers, Virtual PC M accumulation layers realize that address space remaps, atom level write operation, it is former
Sub- level write operation based on CPU cache memory (Cache Memory, hereinafter referred to as：Cache) size, is superfine
Granularity division, can be read and writen, journal function and Wear leveling algorithm, PCM cards are above in units of byte Byte
There are multiple PCM particles, by PCM controller control.
The embodiment of the present invention employs the data access speeding scheme of 3 grades of acceleration, solves current industry for small data
The difficult point that access performance degrades.
The first order：Central processor CPU passes through rambus Memory bus connections PCM.Small data and heat are stored in PCM
Point data（Small&Hot data）, such as metadata Meta data, daily record log, small user data（small user
data）(make use of PCM by the form of byte-accessed)；
The second level：NAND Flash deposit hot spot data and big data（Hot&large data）, the migration of big data focus
Acceleration system is accessed；
The third level：In peripheral memory External Storage, PCM substitution Nor Flash deposit code Code, data
Base（Data Base(config data)）
Fig. 5 is the schematic flow sheet of date storage method embodiment one provided in an embodiment of the present invention, and this method is applied to
Phase transition storage PCM bridges, as shown in figure 5, this method can include：
S501, by the Memory Controller Hub that is connected with PCM bridges receive from the CPU being connected with Memory Controller Hub for pair
The first operation signal that the non-volatile small data stored in the phase transition storage PCM being connected with PCM bridges is read or write.
S502, the first operation signal changed into the second operation signal that read or write of physics can be carried out to PCM with by the
Two operation signals are read the small data in PCM or toward writing small data in PCM.
Wherein, small data is the small data that is often read or write, can be according to different situations depending on, the present embodiment to this not
It is limited.First operation signal includes reading or writing signal, and the first operation signal is changed into can be read or write to PCM second
Operation signal with by the second operation signal the small data in PCM is read or write including：Signal will be read or write and change into energy
What PCM was read or write reads or writes signal to read or write the small data in PCM by reading or writing signal.For example, writing
During operation, CPU issues the first operation signal that logic is write, and PCM bridges receive this first operation signal by Memory Controller Hub, then
First operation signal is changed into the second operation signal that can be read or write to PCM progress physics with by the second operation signal pair
Small data in PCM carries out write operation.Read operation is similar, does not repeat herein.
On the basis of above-described embodiment, date storage method can also include：Received by Memory Controller Hub and come from CPU
Be used for the adjustment signal that is adjusted of storage location to the PCM small datas stored, to the storage position of the PCM small datas stored
Put to be adjusted and specifically include：The relatively low small data of frequency of use that PCM is stored is removed from PCM memory, or will be used
The higher small data of frequency is moved to PCM memory.To adjust signal change into the adjustment signal that PCM can be read or write with
The storage location of the small data in PCM is adjusted by adjusting signal.
Date storage method can also include：The memory storage CPU being connected by Memory Controller Hub with processor runs institute
The data needed, the data needed for configuration processor are read or write for CPU, peripheral memory is connected by Peripheral Interface with CPU, peripheral hardware
Memory storage has non-volatile big data, and CPU is additionally operable to carry out read or write to peripheral memory by Peripheral Interface.
Small data is small user data in above-described embodiment, either metadata metadata or syslog data
In any one or more, small data is block peration data when operate less than general flash, small data size for less than etc.
In 512 bytes.
The date storage method that the present embodiment is provided, is received by the Memory Controller Hub being connected with PCM bridges and come from and internal memory
The connected CPU of the controller non-volatile small data for being used to store in couple phase transition storage PCM being connected with PCM bridges is carried out
The first operation signal read or write.First operation signal is changed into can carry out the second operation signal that physics reads or writes to PCM
To be read or write by the second operation signal to the small data in PCM.Using PCM read or write can step-by-step read or write, it is necessary to read
Or when writing, it is only necessary to several, improve operating efficiency.Simultaneously as every time and a block need not be read or write, from
And the life-span can be increased, therefore realization improves operating efficiency, adds lifetime of system, accelerates the ability of data access.
Below using a specific embodiment, the technical scheme to above method embodiment is described in detail.
Specific date storage method, can be divided into two kinds of situations in the embodiment of the present invention, if one is to judge to know to wait to deposit
The data type for storing up data is system file type, then writes direct in main frame memory module PCM；System file type bag herein
Include in user data metadata types and/or daily record log types, the embodiment of the present invention is file system metadata Metadata
With daily record log, all write as small data in PCM；
If two be to judge to know that the data type of data to be stored is user file type, and the data of data to be stored are big
Small to be no more than default data granularity, default data granularity is less than or equal between 512 bytes, in the embodiment of the present invention
If data granularity is no more than default data granularity size, write in main frame memory module, the embodiment of the present invention i.e.
User data user data need to be judged for size of data, if (data size size is according to CPU for small data
Cache sizes are determined), then write in PCM；
If judge to know that the data type of data to be stored is user file type, and the size of data of data to be stored is super
Data granularity is crossed, then writes peripheral hardware hard disk.It is that user data userdata needs to be directed to size of data in the embodiment of the present invention
Judged, if big data (data size size is determined according to CPUcache sizes), then write peripheral hardware hard disk NAND
In Flash/HDD.
If judging to know, the data type of data to be stored is user file type, and data to be stored size of data not
More than default data granularity, then it is that user data user data need to write in main frame memory module, the embodiment of the present invention
Judged for size of data, if small data (data size size is determined according to CPU cache sizes), then write
In PCM, include in such cases：
If judging to know, the data type of data to be stored is user file type, and data to be stored size of data not
More than default data granularity, then the former data of data to be stored are searched, if finding former data in main frame memory module,
Then directly former data are updated in the storage locations of former data, be in the embodiment of the present invention user data user data such as
Fruit is small data, then needs to search the former data of this small data, if finding former data in main frame memory module PCM, directly
Former data are updated in the storage location of former data；If not finding former data in main frame memory module, outside
If being searched in hard disk.
If finding former data in peripheral hardware hard disk, by former digital independent into main frame memory module, and deposited in main frame
Former data are updated in storage module, after renewal, in addition to：It is dirty by the former data markers stored in main frame memory module
Data, wipe when waiting idle, even find former data in the embodiment of the present invention in NAND Flash, then it is assumed that be old number
According to renewal, it is necessary to which legacy data is read in PCM, the data bit dirty data in NAND Flash is then marked, in NAND
Flash is wiped when idle, while during moving herein, the migration of hot spot data is realized, if entered to this data next time
Row updates, and can be hit directly in PCM.If searching less than former data, main frame memory module is write direct, the present invention is implemented
Even search less than former data, then write direct in PCM in NAND Flash in example.
Data write-in flow is described in detail with reference to Fig. 6, and Fig. 6 is date storage method provided in an embodiment of the present invention
Data write schematic flow sheet, as shown in fig. 6, data for example are set into 64 bytes in advance, data write-in flow includes following
Step：
Step 101, host CPU issue write-in data command；
Step 102, host CPU judge data type according to based on the variable file system of byte, that is, judge what is write
Data are metadata metadata, the log of file system, or user data user data, thus determine behind write data
Flow；
If step 103, metadata metadata and log, then can write direct in the first PCM；
If step 104, user data User data, then need to determine whether the size dimension of data；
Step 105, judge whether data are more than 64Byte, judge that size is according to circumstances set by file system, it is assumed that literary
Part system particles degree is set to 64Byte；
Step 106, if greater than 64Byte, then it is assumed that be big data, write data requests are sent to peripheral hardware and deposited by host CPU
Reservoir CPU, peripheral memory CPU is write data into NAND Flash/HDD；
Step 107, if less than 64Byte, then it is assumed that be small data, but before write, in order to ensure that data are consistent
Property, it is necessary to former data are searched；
Step 108, judge whether that former data can be found in the first PCM；
If step 109, former data can be found in the first PCM, directly former data storage location to original
Data are updated；
If step 110, can not find, need to find in the NAND Flash of peripheral memory；
Step 111, judge whether that former data can be found in the NAND Flash of peripheral memory；
If step 112, in the NAND Flash of peripheral memory can not find former data, then it is assumed that this data is new number
According to writing new small data in the first PCM；
If step 113, former data can be found in the NAND Flash of peripheral memory, then it is assumed that be legacy data more
It is new that, it is necessary to which legacy data is read in the first PCM, it is dirty data then to mark the data in the NANDFlash of peripheral memory,
Wiped when the NAND Flash of peripheral memory are idle, while during moving herein, realizing the migration of hot spot data, such as
Fruit is updated to this data next time, can be hit directly in the first PCM.
Date storage method provided in an embodiment of the present invention, because the reading performances of PCM in itself are 100 times of NANDFlash
More than, when write-in PCM, it is not necessary to first to read and be changed again in DRAMBuffer as NAND Flash, so this hair
Bright embodiment realizes the optimization of small data, and small data reads or writes acceleration；20nm newest at present MLC NAND Flash write
Enter the life-span only have it is thousands of time, more than 100-1000 times that writes that the life-span is NAND of PCM, by the small data of frequent updating in PCM
Operation, can write absorption to NAND Flash small datas, the NAND Flash write-in life-span greatly in extension storage system；
Pcm word section is variable, and NAND Flash are operated according to page page, fashionable in small write, and data size is much smaller than NAND Flash
Page page (2-4K) size, the load payload of file system can be reduced with PCM, accelerating file system operation, therefore drop
Low file system load, improves the operational efficiency of system.
One of ordinary skill in the art will appreciate that：Realizing all or part of step of above-mentioned each method embodiment can lead to
The related hardware of programmed instruction is crossed to complete.Foregoing program can be stored in a computer read/write memory medium.The journey
Sequence upon execution, performs the step of including above-mentioned each method embodiment；And foregoing storage medium includes：ROM, RAM, magnetic disc or
Person's CD etc. is various can be with the medium of store program codes.
Fig. 7 is the structural representation of PCM bridges embodiment one provided in an embodiment of the present invention, as shown in fig. 7, PCM bridges include：
Receiving unit 20, conversion unit 21 and unit 22 is read or write, wherein,
Receiving unit 20 is used for by the Memory Controller Hub that is connected with PCM bridges reception from being connected with Memory Controller Hub
Be used for that non-volatile small data for storing to be read or write in couple phase transition storage PCM being connected with PCM bridges the first of CPU
Operation signal
Conversion unit 21 is used for the first operation signal for receiving receiving unit and changes into can be read or write to PCM the
Two operation signals.
Read or write unit 22 be used for the second operation signal for being converted according to conversion unit the small data in PCM is read or
Small data is write into PCM.
Wherein, small data is the small data that is often read or write, and small data can be small user data, or metadata
Any one or more in metadata, or syslog data, when small data also may be less than general flash operations
Block peration data, small data size be less than or equal to 512 bytes, can be according to different situations depending on, the present embodiment is not done to this
Limitation.First operation signal includes reading or writing signal, and the first operation signal is changed into the second behaviour that can be read or write to PCM
Make signal with by the second operation signal the small data in PCM is read or write including：To read or write that signal changes into can be right
What PCM was read or write reads or writes signal to read or write the small data in PCM by reading or writing signal.
Finally it should be noted that：Various embodiments above is merely illustrative of the technical solution of the present invention, rather than its limitations；To the greatest extent
The present invention is described in detail with reference to foregoing embodiments for pipe, it will be understood by those within the art that：Its according to
The technical scheme described in foregoing embodiments can so be modified, or which part or all technical characteristic are entered
Row equivalent substitution；And these modifications or replacement, the essence of appropriate technical solution is departed from various embodiments of the present invention technology
The scope of scheme.
Claims (18)
1. a kind of data-storage system, it is characterised in that including：
Processor, Memory Controller Hub, phase transition storage PCM bridges and phase transition storage PCM；
The processor is connected by the Memory Controller Hub with the PCM bridges, and the PCM bridges are connected with the PCM；
The PCM is used to store non-volatile small data；
The PCM bridges are used for the first operation letter for receiving being used for from CPU by the Memory Controller Hub and reading or writing small data
Number, first operation signal is changed into the second operation signal that can be read or write to the PCM with by described second
Operation signal is read the small data in the PCM or toward writing small data in the PCM.
2. data-storage system according to claim 1, it is characterised in that：
The non-volatile small data that the PCM is often read or write specifically for storing.
3. data-storage system according to claim 1 or 2, it is characterised in that：
First operation signal includes reading or writing signal, described to change into first operation signal to enter the PCM
The second operation signal for reading or writing of row by second operation signal to the small data in the PCM to carry out reading or writing bag
Include：
By it is described read or write signal change into the PCM can be read or write read or write signal to read or write letter by described
Number the small data in the PCM is read or write.
4. data-storage system according to claim 1 or 2, it is characterised in that the PCM bridges are additionally operable to：
Received by the Memory Controller Hub is used for the storage position to the PCM small datas stored from the CPU
Put the adjustment signal being adjusted, the storage location to the PCM small datas stored be adjusted including：By institute
The relatively low small data of frequency of use for stating PCM storages is removed from the PCM memory, or by the higher small data of frequency of use
It is moved to the PCM memory；
By the adjustment signal change into the adjustment signal that the PCM can be read or write with by the signal that adjusts to institute
The storage location for stating the small data in PCM is adjusted.
5. data-storage system according to claim 1 or 2, it is characterised in that also include：
Internal memory, is connected by the Memory Controller Hub with the processor, for storing data required during CPU configuration processors.
6. data-storage system according to claim 1 or 2, it is characterised in that also include：
Peripheral memory, for being connected by Peripheral Interface with the CPU；
The peripheral memory is stored with non-volatile big data, and the CPU is additionally operable to by the Peripheral Interface to described
Peripheral memory carries out read or write, wherein, the big data is the data bigger than small data.
7. data-storage system according to claim 1 or 2, it is characterised in that：
The small data is any one in small user data, either metadata metadata or syslog data
Or it is a variety of.
8. data-storage system according to claim 1 or claim 2, it is characterised in that：
The small data is block peration data when size is less than general flash operations.
9. data-storage system according to claim 1 or claim 2, it is characterised in that：
The small data byte-sized is less than or equal to 512 bytes.
10. a kind of date storage method, it is characterised in that applied to phase transition storage PCM bridges, including：
By the Memory Controller Hub that is connected with the PCM bridges receive from the CPU being connected with the Memory Controller Hub for pair
The first operation letter that the non-volatile small data stored in the phase transition storage PCM being connected with the PCM bridges is read or write
Number；
First operation signal is changed into the second operation signal that can be read or write to the PCM with by described second
Operation signal is read the small data in the PCM or toward writing small data in the PCM.
11. date storage method according to claim 10, it is characterised in that：
The small data is the small data often read or write.
12. the date storage method according to claim 10 or 11, it is characterised in that：
First operation signal includes reading or writing signal, described to change into first operation signal to enter the PCM
The second operation signal for reading or writing of row by second operation signal to the small data in the PCM to carry out reading or writing bag
Include：
By it is described read or write signal change into the PCM can be read or write read or write signal to read or write letter by described
Number the small data in the PCM is read or write.
13. the date storage method according to claim 10 or 11, it is characterised in that also include：
Received by the Memory Controller Hub is used for the storage position to the PCM small datas stored from the CPU
Put the adjustment signal being adjusted, the storage location to the PCM small datas stored be adjusted including：By institute
The relatively low small data of frequency of use for stating PCM storages is removed from the PCM memory, or by the higher small data of frequency of use
It is moved to the PCM memory；
By the adjustment signal change into the adjustment signal that the PCM can be read or write with by the signal that adjusts to institute
The storage location for stating the small data in PCM is adjusted.
14. the date storage method according to claim 10 or 11, it is characterised in that：
The small data is that size is appointing in small user data, either metadata metadata or syslog data
Meaning is one or more；Or,
The small data is block peration data when size is less than general flash operations；Or,
The small data byte-sized is less than or equal to 512 bytes.
15. a kind of PCM bridges, it is characterised in that including：
Receiving unit, comes from for the Memory Controller Hub reception by being connected with the PCM bridges and is connected with the Memory Controller Hub
The CPU non-volatile small data that stores in couple phase transition storage PCM being connected with the PCM bridges that is used for read or write
The first operation signal；
Conversion unit, first operation signal for the receiving unit to be received changes into and the PCM can be read
Or the second operation signal write；
Unit is read or write, for second operation signal that is converted according to the conversion unit to the small data in the PCM
Read or toward writing small data in the PCM.
16. PCM bridges according to claim 15, it is characterised in that：
The small data is the small data often read or write.
17. the PCM bridges according to claim 15 or 16, it is characterised in that：
First operation signal includes reading or writing signal, and the conversion unit is specifically for the signal that reads or writes is changed into
What the PCM can be read or write reads or writes signal to carry out the small data in the PCM by the signal that reads or writes
Read or write.
18. the PCM bridges according to claim 15 or 16, it is characterised in that：
The small data is any one in small user data, either metadata metadata or syslog data
Or it is a variety of；Or,
The small data is block peration data when size is less than general flash operations；Or
The small data byte-sized is less than or equal to 512 bytes.
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| CN105404596B (en) * | 2015-10-30 | 2018-07-20 | 华为技术有限公司 | A kind of data transmission method, apparatus and system |
| EP3385846B1 (en) * | 2015-12-30 | 2020-02-12 | Huawei Technologies Co., Ltd. | Method and device for processing access request, and computer system |
| EP3376394B1 (en) | 2015-12-30 | 2022-09-28 | Huawei Technologies Co., Ltd. | Method and device for processing access request, and computer system |
| CN107590285A (en) * | 2017-09-30 | 2018-01-16 | 郑州云海信息技术有限公司 | A kind of method of heterogeneous system data consistency |
| US10929309B2 (en) | 2017-12-19 | 2021-02-23 | Western Digital Technologies, Inc. | Direct host access to storage device memory space |
| US11017126B2 (en) | 2017-12-19 | 2021-05-25 | Western Digital Technologies, Inc. | Apparatus and method of detecting potential security violations of direct access non-volatile memory device |
| US11720283B2 (en) | 2017-12-19 | 2023-08-08 | Western Digital Technologies, Inc. | Coherent access to persistent memory region range |
| CN109918352B (en) * | 2019-03-04 | 2021-11-05 | 北京百度网讯科技有限公司 | Memory system and method of storing data |
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