CN103824005A - Anti-copying system embedded with configurable IP core and anti-copying method - Google Patents
Anti-copying system embedded with configurable IP core and anti-copying method Download PDFInfo
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- CN103824005A CN103824005A CN201410087187.3A CN201410087187A CN103824005A CN 103824005 A CN103824005 A CN 103824005A CN 201410087187 A CN201410087187 A CN 201410087187A CN 103824005 A CN103824005 A CN 103824005A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
- G06F21/12—Protecting executable software
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
Abstract
The invention discloses an anti-copying system embedded with a configurable IP core and an anti-copying method. The system comprises a protected embedded chip and an anti-copying circuit connected with the protected embedded chip. The configurable IP core is added to the anti-copying circuit, and partial programs in the embedded chip are stored in the anti-copying circuit, so that the anti-copying circuit is capable of assisting the embedded chip in completing partial operation work, the anti-copying circuit and the embedded chip are cooperated for forming the anti-copying system, and the problem that the protective capability of the embedded chip is poor, so that complete codes in the embedded chip are easily cracked by lawbreakers is solved. True random numbers are generated through an AD module reading method, and completely random timer interruption is adopted, so that the embedded chip can perform multiples times of encryption verification with the anti-copying circuit randomly in the operating process, and therefore a duplicator is prevented from simulating a starting signal for driving the embedded chip to normally operate. The anti-copying system and the anti-copying method have the advantages of flexible design and difficulty in cracking.
Description
Technical field
The present invention relates to a kind of with protection embedded system and internal code thereof not by the device of bootlegging, particularly a kind of embedded configurable I P core is with the copy preventing system of protection core of embedded system code, and copy prevention method based on this copy preventing system.
Background technology
In ic core chip technology develop rapidly in recent years, design of electronic products industry is also more and more as computer industry, the hardware solution of a lot of products has become a kind of disclosed data, under such historical background, core technology in embedded OS concentrates in embedded application software mostly. in hardware technology ripe and disclosed today gradually, the design of protection product, copyright, in fact changed into the protection to embedded application software. but, the data of the storeies such as the FLASH of embedded system and signal wire transmission are almost transparent for duplicator, can be cracked easily, and obtain wherein data, code, realize the protection to embedded product copyright so need extra copy prevention method
On market, popular anti-copy mode mainly adopts logical encrypt mode and simply contrasts the authentication of (between embedded chip and anti-duplicate circuit) between certification mode completion system.First kind of way normally adopts an EEPROM to add peripheral logical circuit, protects authentication by simple logic authenticate password, and protection effect is poor.The second way is that shielded embedded chip is with communicate checking between anti-duplicate circuit in the time powering on.But because the data of transmission over communication lines are easily detected, thereby crack its proof procedure.More senior guard method adopts the mode of password authentication. the built-in same key of anti-duplicate circuit and embedded chip and symmetry algorithm, by sending data and encrypting the mode of returning and carry out contrast verification, can effectively protect the master routine in chip.But be data that fix or periodic due to what send at every turn, this method also has potential safety hazard, for example, can return to crack by monitoring communications circuit simulated data.
Summary of the invention
The invention provides a kind of novel copy preventing system and copy prevention method thereof that strengthens security, mode and embedded chip that it adopts dynamic password (random data) to encrypt contrast authentication communicate checking, this method can solve the monitored problem of circuit, increases to a great extent the difficulty cracking.
The following technical scheme of concrete employing:
A copy preventing system for embedded configurable I P core, the anti-duplicate circuit that it comprises embedded chip and interconnects by UART interface and I/O interface with this embedded chip, is characterized in that:
Described embedded chip obtains random seed by an AD modular converter and generates random number, and generate expressly random by random expressly generation unit thus, generate the random Interruption time by random Interruption unit, the random plaintext generating is encrypted and obtains standard ciphertext, according to the produced random Interruption time, the random plaintext generating is sent to described anti-duplicate circuit by UART interface simultaneously;
Described anti-duplicate circuit receives the random plaintext that embedded chip sends, and is encrypted, and the ciphertext after encrypting is sent to described embedded chip by UART interface by an encrypting module;
Described embedded chip receives the ciphertext that anti-duplicate circuit sends, and itself and standard ciphertext are carried out to contrast verification, if both are unanimously, this embedded chip continues deal with data, otherwise by a self-destruction unit starting self-destroying function;
The embedded configurable I P of described anti-duplicate circuit core, for having configured the computing function of partially embedded chip, and sends computing result back to embedded chip by I/O interface;
Described anti-duplicate circuit is furnished with data storage area, for the required significant data of storage area embedded chip.
The copy prevention method of the copy preventing system of above-mentioned embedded configurable I P core comprises the steps:
Step 1: in the time starting embedded chip, the sampling of AD modular converter obtains random number, produce random expressly startup and once encrypt contrast verification, random Interruption unit is according to described true random number, generates a random Interruption time to proceed to encrypt contrast verification to produce random Interruption in the ensuing operational process of master routine;
Step 2: normally move master routine, until trigger random Interruption, change the zone bit of anti-duplicate circuit, make system once encrypt contrast verification, and random Interruption number of times is counted, after random Interruption number of times is greater than preset value, be just no longer encrypted contrast verification;
Step 3: when embedded chip is carried out the computing function that need to use in configurable I P core, send respective request and need the data of computing to configurable IP kernel by I/O interface, configurable IP kernel utilizes the data that receive to carry out computing after receiving respective request, and computing result is sent back in embedded chip by I/O interface;
Step 4: if do not receive and send data back in a period of time after encrypting the continuous mistake for several times of contrast verification or calling configurable I P core, embedded chip is by self-destruction unit starting self-destroying function.
The present invention has increased and can move the configurable I P core of subprogram and subprogram in embedded chip is stored in anti-duplicate circuit in anti-duplicate circuit, make anti-duplicate circuit can assist embedded chip to complete partial arithmetic work, the complete copy preventing system of the two collaborative composition, a little less than having solved the protective capacities of embedded chip own, easily cracked this difficult problem of complete code in embedded chip by illegal person.
The present invention adopts the method for dynamic random data encryption contrast authentication; at anti-duplicate circuit built in hardware encrypted circuit; in the start-up code of protected circuit, insert the cryptographic algorithm of said function; protected embedded chip before startup, repeatedly cryptographic check operation of execution in service; as verification password correctly system normally move, verification password mistake system software is stopped running.
The present invention embeds the coprocessor work of configurable I P core as embedded chip in anti-duplicate circuit, assist the partial code in the protected embedded chip of operation, and in anti-duplicate circuit, in the protected embedded chip of configuration data storage area stores part, need use critical data, protected embedded chip calls corresponding program and the data of anti-duplicate circuit in the time need to using corresponding function, and from anti-duplicate circuit, obtains sequential operation result and required significant data by communication; This method makes not need deviser to insert complete code in protected embedded chip; even if embedded code and the pcb board person of being replicated therefore in electronic product illegally obtain, thereby also can cannot normally crack protected chip because of reading the code and the data that are stored in anti-duplicate circuit.
The present invention produces random number by the method from AD module reading, the input end of AD modular converter does not add any input signal, directly from space, read electromagnetic distu, among feeding back to embedded chip, produce random number as the seed of software generation random number, guarantee that random number is true random number, meets randomness requirement completely.
The present invention adopts the Interruption of completely random, makes embedded chip in operational process, can randomly and carry out repeatedly encrypted authentication between anti-duplicate circuit, to prevent that duplicator from simulating enabling signal, drives embedded chip normally to move.The generation time interrupting is completely random, the random number control that produced by random number generation circuit.
Copy preventing system of the present invention and method have advantages of flexible design, are difficult for being cracked.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described.
Accompanying drawing 1 is anti-duplicate circuit system construction drawing of the present invention;
Accompanying drawing 2 is anti-duplicate circuit system single encryption flow figure of the present invention;
Accompanying drawing 3 is anti-duplicate circuit system operational flow diagram of the present invention;
Accompanying drawing 4 is actual measurement platform figure of anti-duplicate circuit system of the present invention;
Embodiment
Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiments is only not used in and limits the scope of the invention for the present invention is described, after reading the present invention, those skilled in the art all falls within the application's claim limited range to the modification of the various equivalent form of values of the present invention.
The present invention has designed the novel copy preventing system of a software-hardware synergism, in order to realize the protection to embedded software copyright.Anti-duplicate circuit adopts hard-wired cryptographic algorithm and embedded chip to carry out repeatedly stochastic and dynamic encrypted authentication; make cracker crack checking protection by monitoring communications data. built-in configurable I P core and data-carrier store in anti-duplicate circuit; be used for storing critical data and operating part embedded program; allow cracker cannot obtain program complete in embedded chip, realized adequately protecting to embedded product copyright from software and hardware two aspects.
Fig. 1 is copy preventing system structural drawing of the present invention, and whole system is made up of protected embedded chip and anti-duplicate circuit, and built in hardware encrypted circuit in anti-duplicate circuit is inserted same cryptographic algorithm in the software startup code of protected embedded chip.This specific embodiment is take the AES cryptographic algorithm commonly used as example.Anti-duplicate circuit is with the transmission for contrast verification encrypting plaintext and ciphertext by UART interface inter-link between protected embedded chip; While calling anti-duplicate circuit configurable I P core by Parallel I/O is interconnected for protected embedded chip, to anti-compound circuit transmission of control signals, also transmit the significant data of storage and the operation result that configurable I P core calls for anti-duplicate circuit to protected embedded chip.The random seed that protected embedded chip utilization is read in from AD mouth, Software Create true random number, and produce expressly random; Protected embedded chip will expressly be passed to anti-duplicate circuit at random, and receive the ciphertext that anti-duplicate circuit has been encrypted; By protected embedded chip before startup, execution in service repeatedly contrasts encrypted authentication and operates to protect program in embedded chip not by bootlegging.Simultaneously, in anti-duplicate circuit, implant configurable I P core, and be furnished with data storage area, and use needing the partial function function of operation and the significant data of needs use to put into configurable I P core in embedded chip, stop duplicator's illegally usurping embedded program in chip with this.
Below main functional module is specifically described:
1 .AES encrypting module
In the present embodiment, adopt the AES cryptographic algorithm of 128, it is the open cryptographic algorithm of current main-stream, given plaintext is encrypted according to certain key. this algorithm is Iterative block cipher algorithm, its block length and key length all can change. and the major advantage of this algorithm is: simplicity of design, key is installed fast, the memory headroom needing is few, operational excellence on all platforms. when system operation, under the effect of same key, plaintext is carried out to AES encryption simultaneously in embedded chip and anti-duplicate circuit, for comparator circuit, whether normally twice encrypted result compared and decide system operation, AES encrypted circuit is as existing very ripe IP, here only AES encrypting module effect and working method in the present invention set forth, for its internal circuit structure, no longer too much repeat..
2. configurable I P core
In order to prevent that duplicator from cracking cryptographic algorithm with higher technology and driving by force embedded program, in the anti-duplicate circuit being encrypted, insert configurable I P core.Then the program of required operation in embedded chip is divided into two independently parts, a part is placed in embedded chip, another part is placed in anti-duplicate circuit and moves. at every turn in the time that embedded chip moves to the function of the subprogram of placing in need to anti-duplicate circuit, just change the zone bit in anti-duplicate circuit, make the normally operation in anti-duplicate circuit of this section of program, and result is sent back in embedded chip.
It is a processor core that configurable I P in the present invention endorses, and helps embedded chip operation subprogram, has configured the function that embedded chip needs it to help through; Also can be a Hardware I P circuit, can be configured embedded chip to this circuit needs it to assist the specific function realizing.
Utilize this by critical data even the important code of part be placed in the mode that anti-duplicate circuit is carried out, allow anti-duplicate circuit become a requisite part in whole operation for embedded system process.No matter how duplicator cracks embedded chip, all can only obtain incomplete code, thereby make calling program true(-)running cannot not complete illegal copying.
true random number generation unit
Be different from general embedded system and call related function and produce pseudo random number, the design produces true random number by the method from AD modular converter reading.The input end of AD modular converter does not add any input signal, directly from space, read electromagnetic distu and generate random seed, among feeding back to embedded chip, producing random number for true random number generation unit. this read method has guaranteed that random number, as true random number, meets randomness completely.
Be divided into two parts use by gathering the true random number obtaining:
1). as the plaintext of AES cryptographic algorithm, and by corresponding AES encrypted circuit, it is encrypted, produces ciphertext.
2). set certain hour interval, while controlling in random number drops on interval, start and interrupt at random AES encrypted authentication.
random Interruption unit
By outage, make embedded chip in the protected program process of operation, can randomly and carry out repeatedly encrypted authentication between anti-duplicate circuit, to prevent that duplicator from simulating enabling signal, drive embedded chip normally to move.The generation time interrupting is completely random, the random number control that produced by random number generation circuit.
Each interruption, after generation, all put into new random number random Interruption unit again, adjusts the time that Interruption produces next time.The method of verifying by such timing, has well taken precautions against the situation that duplicator simulates merely, reproduction start signal drives chip, has improved to a great extent the illegal difficulty copying.
self-destruction unit
If in a period of time, (can set as required) do not receive and send data back to after AES encrypts contrast verification continuous for several times wrong (can set as required) or calls configurable I P core, embedded chip is by self-destruction unit starting self-destroying function.Because adopting erasable FLASH storer, the system in the present invention deposits critical data, system is when needs carry out data self-destruction, can adopt programming to realize the destruction to the critical data in storage chip, can pass through chip critical data region erase mode, or adopt system function to carry out data to critical data file to override and realize data destroying; Equally, program also leaves in the fixed area of erasable FLASH storage chip, in the time that system receives program command-destruct, starts and wipes program, the storage area of storage chip Program is wiped respectively, and then destroyed crucial program module.
Fig. 2 is the single encrypted authentication flow process of copy preventing system of the present invention, first produce 128 random plaintexts by the data that read by AD modular converter in embedded chip, and 128 random plaintexts that produce are sent in anti-duplicate circuit by UART interface, self random plaintext is carried out to AES encryption simultaneously.Anti-duplicate circuit receives after the random plaintext of sending from embedded chip, utilizes the key of prior loading to carry out synchronous AES encryption to random plaintext, and the ciphertext of generation is passed back in embedded chip.Now; embedded chip produces the ciphertext obtaining ciphertext with self-encryption compares mutually; in the time that ciphertext is in full accord, control program continues operation, if both sides ciphertext inconsistent; judge that chip status is as mistake; representative embedded system now be not just subject to the protection of anti-duplicate circuit, may be attempted destroy or copy by lawless person, and embedded chip quits work or enters endless loop; arrive this, complete once complete AES and encrypt contrast verification flow process.
Fig. 3 is complete copy preventing system process flow diagram of the present invention, on the basis of single encrypted authentication, has increased repeatedly random comparison process, has further strengthened security.
First, in the time that startup embedded chip carries out work, first carry out one-shot AES encrypted authentication, the random number during then by the random plaintext of generation, sets a break period to produce random interruption; Can normally move with that master routine, until trigger Interruption, and Interruption is counted; Then change zone bit, make system carry out an AES and encrypt.When the number of times of Interruption checking, to be greater than threshold number N(threshold number N configurable), verify with regard to no longer interrupting.In order to guarantee that accidental validation is unlikely to too frequently to affect the response speed of embedded chip to original task, need to set a random authentication interval, only have when random number drops on and in given area, just can trigger contrast verification link, thereby guarantee the intermittent of random timing comparing checking.
In the process of the normal operation of master routine, in the time that needs use the part code being placed in anti-duplicate circuit, send respective request and need the data of computing to anti-duplicate circuit by embedded chip, anti-duplicate circuit utilizes the data obtained to carry out computing receiving after respective request, and operation result is sent back in embedded chip, and make embedded chip continue normal operation, thereby anti-duplicate circuit assists embedded chip to complete function in the mode of coprocessor, and guarantee the imperfection of code in embedded chip, and then improve anti-replication capacity.
Fig. 4 is the actual measurement platform figure of anti-duplicate circuit system of the present invention.Protected embedded chip in MP430 single-chip simulation native system in figure; Anti-duplicate circuit in FPGA development board simulation native system, has been configured specific function by encoded keyboard to the configurable I P embedding in anti-duplicate circuit.Intermediate result and the state of system operation show by LCD screen display.
Claims (9)
1. a copy preventing system for embedded configurable I P core, the anti-duplicate circuit that it comprises embedded chip and interconnects by UART interface and I/O interface with this embedded chip, is characterized in that:
Described embedded chip obtains random seed by an AD modular converter and generates random number, and generate expressly random by random expressly generation unit thus, generate the random Interruption time by random Interruption unit, the random plaintext generating is encrypted and obtains standard ciphertext, according to the produced random Interruption time, the random plaintext generating is sent to described anti-duplicate circuit by UART interface simultaneously;
Described anti-duplicate circuit receives the random plaintext that embedded chip sends, and is encrypted, and the ciphertext after encrypting is sent to described embedded chip by UART interface by an encrypting module;
Described embedded chip receives the ciphertext that anti-duplicate circuit sends, and itself and standard ciphertext are carried out to contrast verification, if both are unanimously, this embedded chip continues deal with data, otherwise by a self-destruction unit starting self-destroying function;
The embedded configurable I P of described anti-duplicate circuit core, for having configured the computing function of partially embedded chip, and sends computing result back to embedded chip by I/O interface;
Described anti-duplicate circuit is furnished with data storage area, for the required significant data of storage area embedded chip.
2. the copy preventing system of embedded configurable I P core according to claim 1, is characterized in that the input end of AD modular converter does not add any input signal, directly from space, reads electromagnetic distu and generates random seed.
3. the copy preventing system of embedded configurable I P core according to claim 1, is characterized in that self-destruction unit provides to wipe FLASH code area function.
4. the copy prevention method of the copy preventing system of embedded configurable I P core according to claim 1, is characterized in that:
Step 1: in the time starting embedded chip, the sampling of AD modular converter obtains random number, produce random expressly startup and once encrypt contrast verification, random Interruption unit is according to described true random number, generates a random Interruption time to proceed to encrypt contrast verification to produce random Interruption in the ensuing operational process of master routine;
Step 2: normally move master routine, until trigger random Interruption, change the zone bit of anti-duplicate circuit, make system once encrypt contrast verification, and random Interruption number of times is counted, after random Interruption number of times is greater than preset value, be just no longer encrypted contrast verification;
Step 3: when embedded chip is carried out the computing function that need to use in configurable I P core, send respective request and need the data of computing to configurable IP kernel by I/O interface, configurable IP kernel utilizes the data that receive to carry out computing after receiving respective request, and computing result is sent back in embedded chip by I/O interface;
Step 4: if do not receive and send data back in a period of time after encrypting the continuous mistake for several times of contrast verification or calling configurable I P core, embedded chip is by self-destruction unit starting self-destroying function.
5. copy prevention method according to claim 4, it is characterized in that configurable I P core provides C language codes write-in functions, in embedded chip, the program of required operation is divided into two independently parts, a part is placed in embedded chip, another part is placed in configurable I P core, in the time that embedded chip moves to the function that needs the subprogram of placing in configurable I P core, just change the zone bit of anti-duplicate circuit, make the normally operation in configurable I P core of this section of program.
6. copy prevention method according to claim 4, after it is characterized in that each random Interruption produces, all again new random number is put into random Interruption unit, generate the next random Interruption time, drive encryption contrast verification repeatedly to carry out at random time by random Interruption.
7. copy prevention method according to claim 4, is characterized in that the input end of AD modular converter does not add any input signal, directly from space, reads electromagnetic distu and generates random seed.
8. copy prevention method according to claim 4, is characterized in that self-destruction unit provides to wipe FLASH code area function.
9. copy prevention method according to claim 4, is characterized in that setting a random authentication interval, encrypts contrast verification interruption when random number drops on the interval internal trigger of random authentication.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104318188A (en) * | 2014-10-11 | 2015-01-28 | 中国航天科工集团第三研究院第八三五七研究所 | Anti-plagiarism SIP (System In Package) chip |
| CN104318188B (en) * | 2014-10-11 | 2017-07-04 | 中国航天科工集团第三研究院第八三五七研究所 | A kind of anti-plagiarism SIP chips |
| CN105117659A (en) * | 2015-07-31 | 2015-12-02 | 成都亿信标准认证集团有限公司 | Anti-copying monitoring method used for data storage device |
| CN105117664A (en) * | 2015-07-31 | 2015-12-02 | 成都亿信标准认证集团有限公司 | Anti-duplication data storage apparatus |
| CN107330318A (en) * | 2017-06-30 | 2017-11-07 | 中国航空工业集团公司雷华电子技术研究所 | A kind of binding encryption method of digital signal panel card and its debugging system |
| CN109684239A (en) * | 2017-10-18 | 2019-04-26 | 张英辉 | The method for preventing the nonvolatile memory of System on Chip/SoC to be replicated |
| CN110647310A (en) * | 2018-06-26 | 2020-01-03 | 西安电子科技大学 | Method for generating true random number of Android device |
| CN110647310B (en) * | 2018-06-26 | 2021-09-03 | 西安电子科技大学 | Method for generating true random number of Android device |
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