CN103823668A - Method for building network bridge among multiple network interfaces - Google Patents

Abstract

Provided are a computer realization method and system, which are used for building network bridges among network interfaces. A network bridge application receives data packets from a source at one or more network interfaces, stores the data packet to a buffer that is in communication connection with a buffer management unit, and placing the data packets in a queue based on a preset queue standard. The network bridge application uses a packet processing mode to process the data packets in the buffer, i.e., a central processing unit (CPU) direct mode or an assembly line mode, and transmits the data packets to a target network source through at least one network interface. The network bridge application manages a data packet stream among the network interfaces, and logically defines a flexible structure which, under the assembly line mode and without intervention of a processor, processes the data packets, and under the CPU direct mode and with intervention, uses at least one processor to process the data packets.

Description

Between a kind of multi-network interface, set up the method for bridge

Technical field

The present invention relates to field of network communication, relate in particular to a kind of set up bridge between multi-network interface method.

Background technology

Conventionally, the equipment of such as Ethernet switch etc. is designed to rigidity hardware pipeline, because ethernet technology does not need complicated media management, such as cutting apart, the scheduling of transmission time slot etc.Traditional Ethernet exchanging machine equipment can not comprise a flush bonding processor, but if comprised, this flush bonding processor only participates in the processing of control panel conventionally.

In addition, gateway device is configured to nonpipeline equipment conventionally, because gateway device is integrated more powerful multithreading CPU (central processing unit) (CPU) conventionally.The mutual of hardware module coordinated by different software tasks.Therefore, need a kind of computer implemented method and system to set up bridge between multiple network interfaces, thereby and there is the pipeline design and make the connection of the hardware line that does not need strict rigidity between functional module.

Summary of the invention

The object of the present invention is to provide a kind of computer implemented method and system, for setting up bridge at multiple network interface parts.

This computer implemented method and system discloses a kind of bridge application program of being carried out by least one multiprocessor.Data stream between this bridge application program management multi-network interface.Bridge application program receives many packets from a source network resource on one or more network interfaces.Bridge application program is connected communication with buffer management unit, and the packet that storing received arrives is to buffer zone.Buffer stores in high-speed random access memory, for example, double data rate random access memory.The packet that bridge application program is placed storage based on predetermined arrangement criterion by queue is to buffer zone.Predetermined arrangement criterion can be round-robin queue or priority queue for instance.This queue is followed the trail of in buffer management unit.

Bridge application program is used a kind of processing in many packets tupe to be stored in the packet that place with queue form buffer zone.Processing data packets pattern comprises for example CPU (central processing unit) Direct Model and pipeline mode.Bridge application program, is connected communication with buffer management unit, facilitated the processing procedure of placing or use the storage packet of the pipeline mode of token message mechanism in buffer zone with queue form.Bridge application program by the packet after at least one bridge interface transmission process to target network resource.

The flexible stream of the packet between network interface is managed and allowed to bridge application program therefore, define in logic an architecture flexibly, intervention without any processor under pipeline mode is placed on the packet aftertreatment packet of storing in buffer zone with queue form, and to use handle packet under the intervention of at least one processor in CPU (central processing unit) Direct Model.Bridge application routine processes is placed, is used at least one multimode to be stored in the packet of buffer zone with queue form.Module is connected communication with bridge application program on flexible architecture, is logically defined by bridge application program.Module comprises transmission fragment and re assembly (TSAR) module for example receiving in segmentation and restructuring (RSAR) module, reception (direction) logic link control module, classification engine, stream switch engine, transmission (direction) logic link control module, predefine queue.Module is connected communication with bridge application program, uses token message mechanism under pipeline mode.

Computer implemented method and system also disclose a kind of flexible pipeline architecture of the many bags queue based on being managed by hardware buffer administrative unit under token message mechanism is supported, allow the streamline of software and many hardware modules mutual.

Accompanying drawing explanation

Fig. 1 is the schematic diagram of the computer implemented method for set up bridge between multi-network interface;

Fig. 2 is the schematic diagram of the bridge equipment of high-level hardware structure;

Fig. 3 is the inside structure schematic diagram of G.hn media access control controller link bridge device;

Fig. 4 A is queue structure's schematic diagram of buffer management Single Component Management;

Fig. 4 B is input queue and output queue form schematic diagram;

Fig. 5 is the intermodule streamline token pass through mechanism schematic diagram of buffer management Single Component Management;

Fig. 6 is the multimode that is connected with bridge application interprogram communication and the form schematic diagram of module identifier (ID) thereof;

Fig. 7 is the path schematic diagram that packet passes through bridge equipment;

Fig. 8 changes the bridge equipment schematic diagram of G.hn medium to Ethernet as media converter;

Fig. 9 is the bridge equipment embodiment schematic diagram for bridged ethernet lan port and G.hn medium that can be connected with router or gateway device.

Embodiment

Further set forth advantage of the present invention below in conjunction with accompanying drawing and specific embodiment.

Fig. 1 is the schematic diagram of the computer implemented method for set up bridge between multi-network interface.In computer implemented method, flow process 101 provides a kind of bridge application program of being carried out by least one multiline procedure processor (network application).In flow process 102, bridge application program, at one or more network interfaces, such as, receives many packets in the source network resource interfaces such as G.hn interface, wireless lan (wlan) interface, Ethernet interface, power line communication interface.Internet resources are exactly a computer equipment of participation network.Used herein, " source network resource (source network resource) " relates to a kind of computing equipment, and wherein the interface of packet in the network interface of bridge equipment origin receives.Source network resource can be network gateway, network switch, bridge, the network switch, hub, the webserver, medium server etc.In flow process 103, bridge application program is connected communication with buffer management unit, and the packet that storing received arrives is to buffer zone.Buffer stores is in high-speed random access memory, and for example, double data rate access memory is such as third generation double data rate access memory.

In flow process 104, bridge application program, based on predetermined queue criterion, is placed the packet that is stored in buffer zone with queue form.Predetermined queue criterion for instance, can be round-robin queue or priority queue.This queue of buffer management cell tracks.In flow process 105, bridge application program is stored in a kind of processing the in many packets tupe the packet of placing with queue form in buffer zone.For instance, above-mentioned processing data packets pattern comprises, CPU (central processing unit) (CPU) Direct Model and pipeline mode.Used herein, " CPU Direct Model " refers to a kind of pattern, and wherein one of processor starts and monitor the data packet stream of the module by be connected communication with bridge application program.Similarly, " pipeline mode " refers to a kind of pattern herein, wherein the startup of one of processor is connected the data packet stream of the module of communication with bridge application program, and wherein buffer management unit monitors is by being connected the data packet stream of the module of communicating by letter with bridge application program.

Consult Fig. 5, bridge application program, is connected communication with buffer management unit, using under the pipeline mode of token message mechanism, has facilitated the processing to be placed on the packet in buffer zone with queue form.Bridge application program is processed the packet in buffer zone that is stored in of placing with queue form by least one in multimode.Above-mentioned module and bridge application program are connected communication with structural system flexibly, are defined in logic by bridge application program.Module comprises reception segmentation and restructuring (RSAR) module, reception (direction) logic link control (LLC) module, classification engine, stream switch engine, transmission (direction) logic link control (LLC) module, sends fragment and re assembly (TSAR) module.

As shown in Figure 4 A, in pipeline mode, bridge application program is processed each packet according to the position in queue of packet, and the management of allocation process queue is to buffer management unit.Buffer management unit (BMU) is so according to the specific function of packet, broadcast starts token to module and carrys out the processing of log-on data bag, and the module of processing, receives token and answer broadcast and start token from completing to start.Token message mechanism in pipeline mode as shown in Figure 5.In CPU Direct Model, bridge application program adopts one of processor to carry out the processing of the packet in administration queue.In flow process 106, so bridge application program arrives target network resource by least one packet coming after transmission process in network interface.Used herein, " target network resource " relates to computing equipment, for instance, can be panel computer, PC, Set Top Box, speech Internet protocol equipment etc., wherein one of packet network interface by bridge equipment transfers to the said equipment.The flexible data bag stream between bridge interface is managed and allowed to bridge application program therefore, logically define flexible structure system and carried out handle packet, after under pipeline mode, the packet of buffer zone is stored in placement into, without the intervention handle packet of any processor, with under CPU (central processing unit) Direct Model, use at least one the intervention handle packet in processor.

This computer implemented system provides one pipeline organization flexibly, allows not have the pipeline processes of the network traffics in the situation of hardwired link block.Software module and hardware module are connected to and are processed in streamline by bag queue in logic.The output queue of one module is as the input queue of another module.The logic of software module and hardware module is connected permission data stream and is flexibly set.By the many input queues for different objects or the support of output queue, a hardware module can be present in the different phase in streamline.The bag queue of buffer management unit centralized management module.The input data of each queue of buffer management cell tracks.The streamline downstream module that the token informing mechanism of buffer management unit by using based on broadcast informed is prepared to input data.Each software module or hardware module have several preallocated queues.Broadcast token by monitoring, in the time that input data are ready, each module can start handle packet.Streamline is recombinated by redistributing queue.The flexible pipeline organization of computer implemented system can be used for, for instance, and the application of design home network-concentrated integrated circuit (ASIC) equipment.Flexibly pipeline organization is the management of arranging based on many bags, gets off to allow streamline intercommunication between software and many hardware modules by the support of hardware buffer district administrative unit and token informing mechanism.

Pipeline organization allows network function flexibly, for instance, layer 2 transmission, classification bag, shaping flow, link layer is cut apart and/or assembly, and multicast and/or broadcast support etc. improve performance in differentiation between software and hardware in making maintaining dirigibility.Pipeline organization is configured to the home network device for G.hn standard flexibly, supports the media types of power circuit, concentric cable or telephone wire.

Fig. 2 is the schematic diagram of the bridge equipment of high-level hardware structure.Under high-level, bridge can be considered to have three ports or the four port bridge equipment of a physical interface as G.hn medium access control (MAC) port and Physical layer (PHY) port access G.hn medium, for instance, can be concentric cable, power line communication (PLC) or telephone wire, wherein each port be the network port that is connected to bridge.Gigabit media independence interface (RGMII) port that other three ports are two simplification, is connected with Ethernet or neighbouring device, and an inside center processing unit (CPU) port, is connected communication with CPU on sheet.These two Ethernet interfaces are cited as RGMII port.If only need an Ethernet interface, Ethernet interface can be transmitting (Tx)/reception (Rx) stitch that the gigabit media independence interface (RGMII) of single RGMII port or simplification uses these two RGMII ports.Second ethernet port is configured to support the adjacent network device of the 2nd G.hn medium or switching network (fabric) port of WLAN (WLAN) access point (AP), by Ethernet, WLAN together with G.hn network bound.Bridge equipment uses two serializer/deserializers (SERDES) to be connected with concentric cable AFE (analog front end) (AFE) or power line communication (PLC) AFE (analog front end) (AFE).Bridge equipment also has the selection of the third generation double data rate Synchronous Dynamic Random Access Memory (DDR3) of access locally-attached use one 16 speeds (x16) DDR3 interface.This DDR3 memory expansion the ability of on-chip memory.

Bridge equipment comprises RGMII/GMII interface, serializer/deserializers (SERDES) interface, double data rate (DDR) (DDR) interface and Serial Peripheral Interface (SPI) (SPI).Consult Fig. 2, there are two RGMII/GMII interfaces.One of RGMII/GMII interface is connected with ethernet physical layer, and another interface is connected to individual networks equipment alternatively, for instance, and a gateway or realization

equipment.Serializer/deserializers (SERDES) interface is connected with G.hn AFE (analog front end), drives G.hn medium, for instance, and line of electric force, concentric cable or telephone wire.Ddr interface is connected with outside DDR storer and outside SPI flash memory respectively with SPI.Bridge equipment is set to structure take G.hn medium as basic home network, and is connected, for example uses the household electrical appliances such as televisor take G.hn as basic Ethernet with the computing machine of networking.In this preferred embodiment, bridge equipment is the media converter to G.hn as Ethernet.

Fig. 3 is the inside structure schematic diagram of G.hn media access control (MAC) controller link bridge device.G.hn media access control (MAC) controller has comprised the network function except digital physical layer in bridge equipment.G.hn media access control (MAC) controller comprises that embedded CPU (central processing unit) (CPU) carries out G.hn firmware stack.Network processes streamline forms in G.hn media access control controller.As shown in Figure 3, G.hn media access control (MAC) controller comprises a double-core ARMCortex-M3 CPU (central processing unit), static RAM on sheet (SRAM) is supported, by outer Double Data Rate (DDR) random-access memory (ram) of sheet of supporting with Memory Controller unit (MCU), two ethernet mac modules, buffer management unit (BMU), hardware classification engine, hardware flow switch engine, two hardware logic links control (LLC) module, two transmission Segmentation and Reassembly (TSAR) modules, two receive the infrastructure component of Segmentation and Reassembly (RSAR) module and a common status bus framework.

Double-core ARM Cortex-M3 CPU (central processing unit) is carried out firmware operation.One is labeled as CPU and the management of non real-time high-level network and the appointment of control plane function of CPU0.Another is labeled as the CPU of CPU1 and specifies with real-time Transmission and receiving scheduling based on G.hn medium.Above-mentioned SRAM and DDRRAM are for storing firmware and bag queue.Ethernet mac module is supported GMII/RGMII interface.BMU carries out bag queue management.Hardware classification engine is to packet classification.Hardware flow switch engine support package bridge joint.Two hardware LLC modules are supported the LLC encapsulation of G.hn and encrypt.Two hardware TSAR and RSAR module are supported the frame Segmentation and Reassembly of G.hn.The infrastructure component of common status bus framework is connected with CPU, storer and hardware module.Hardware module comprises: three group interfaces are as the packet interface for access data bag, for the state interface of access respective handling state, and for implementing the configuration interface of Handshake Protocol with CPU.

G.hn media access control (MAC) controller comprises the logic of the bridge equipment except the logic of Physical layer submodule.Under high rank, G.hn media access control (MAC) controller comprises multiple hardware packet handing modules, drafts processing streamline under the coordination of ARM Cortex-M3 CPU (central processing unit).CPU is that memorizer buffer distributes the packet receiving from ethernet mac or G.hn MAC.CPU is each hardware module dispatch deal task, thus distribute data bag, formulate send determine, resolve packet header, segmentation or recombination data bag, at medium transmitting data bag etc.Packet and alignment processing state thereof be stored on sheet or the outer shared storage of sheet on different storage queues.CPU passes on data packet addressed and relevant treatment state thereof to hardware module by memory pointer, and hardware module ruling access shared storage comes ergodic data bag and corresponding treatment state carries out the Processing tasks of appointment.CPU comes to shake hands with hardware module with configuration register, thus synchronization packets Processing tasks.Again as shown in Figure 3, BMU is with the queue of active process condition managing.MCU has represented shared device storer, no matter on sheet or sheet all can pass through DDR memory controller direct access outward.

Fig. 4 A is queue structure's schematic diagram of buffer management Single Component Management.The packet receiving from network interface is stored in the memory buffer of fixed size sheet, is called MBUF.The chained list representative data bag that links together for multiple MBUF.First MBUF connecting comprises a packet pointer.By data queue, packet is followed the trail of.Have after data packet queue, packet another chain list index in also can usage data bag pointer links together.As shown in Figure 4 A, the MBUF in queue has formed a two-dimensional chain table, and wherein one dimension is the link of MBUF in same packet, and another dimension is the link of all packets in queue.Hardware BMU maintains this queue.Each queue is assigned with one 10 bit queue identifier (ID) and identifies queue.BMU maintains head pointer and the tail pointer of the first packet and end packet in queue, and the counting of packet sum in queue.

Each module is supported the input queue of some and the output queue of some.The program of popping of carrying out shifts out packet from input queue with the order of order.Packet is the processed and output queue that pushes on thus.In the time that packet shifts out from input queue, BMU is from current data packet slip-on head pointer to next packet and packet the queue counting that successively decreases.In the time that packet pushes on to output queue, BMU is connected the packet pushing on the afterbody of queue, and mobile tail pointer is to new packet, and incremental data bag counting.

Fig. 4 B is input queue and output queue form schematic diagram.Queue identifier (Q-ID) is defined as 10 bit values in 16 bit field spaces in all data structures.As shown in Figure 4 B, Q-ID is overall, and is each input of each module assignment.Each module is that input queue is observed continuous Q-ID number and preserved configurable Q-ID-base address.

Fig. 5 is the intermodule streamline token pass through mechanism schematic diagram of buffer management Single Component Management.One logic flow waterline usage data bag queue and BMU token informing mechanism.Logic flow waterline is formed by the output queue that uses a module, as the input queue of the immediately downstream module of streamline.Each queue connects and specifies to module identifier (ID) based on input.In this way, the input instruction of multimode is used as the output queue of up-stream module.

Because data packet queue maintains in system storage, even if queue sharing, " pushing on " operation of the queue of up-stream module cannot be observed by downstream module simply.In order to notify downstream module by stream line operation, a broadcast token mechanism is employed.Because BMU manages and follow the trail of all queues, BMU has from any source and the next cognition of owning " popping " and " pushing on " operation.When each BMU detects " pushing on " operation, BMU sends a broadcast token.This token include " pushing on " operation localizing objects queue in module I D and queue ID.This token is detected by all modules.If module detects the module I D of token and the ID of module and match, module receives packet by decision in its input queue.Module can be carried out " popping " and operate the entitlement the handle packet that obtain packet.Due to the dirigibility of queue ID and module I D distribution, in the time of device initialize, pipeline organization allows to be constructed out various flows waterline topological structure flexibly.Under extreme case, software queue can be added in the centre of hardware pipeline, allows the software of processing data packets to observe or introduce special processing step.

In the time executing the task under the coordination of hardware processing module at CPU, intermodule is not by directly " interchange " of special hardware interface.One module is from CPU reception pointer, and infers that according to pointer one " going " signal carrys out handle packet.When module completes after processing, module writes shared device storer by state and claims one " completing " mark.CPU " completes " mark in fixed intervals or opportunistic obtaining.The processing of being coordinated by CPU is called as CPU Direct Model.This CPU Direct Model provides dirigibility for Software for Design.For instance, CPU can mix software processing module with hardware processing module.CPU also can increase a virtual level in processing stream, carrys out the virtual instance of virtualization hardware module, for example, and a virtual sorter, virtualizes logical link control (LLC) module, virtual Segmentation and Reassembly (SAR) module etc.In addition, CPU can by handle that the input queue of hardware module adds or redirect traffic to different processing stage, for example, by the direct access control of LLC module and management flow.But CPU is individual threads processing entities.Inevitably reduced the treatment effeciency of bridge equipment with the operation that CPU coordinates many hardware modules.Therefore, the realization of pipeline mode allows by " chain " hardware module, former subprocess (process that can not be cut apart again) step to be performed in the presence that there is no CPU.CPU can start to dispatch many packets streamline is initial.Data packet stream is crossed streamline and is traveled through all processing stage.

Fig. 6 is the multimode that is connected with bridge application interprogram communication and the form schematic diagram of module identifier (ID) thereof.4 bits module ID are dispensed to module.Form as shown in Figure 6 does not have hardware implication, and as a reference point.Module I D distributes can pass through bridge application programming.In the time of software initialization BMU queue form, module I D is dispensed to the queue of each preservation buffer location (BMU).Bridge application program is also programmed to each module by respective modules ID.Bridge application program is triggered a pack module is switched to pipeline mode or vice versa from CPU Direct Model by list.When pattern when conversion that hardware module is carried out CPU Direct Model and be converted to pipeline mode under software control, the module of participation is considered in idle state and waits for next distribution.In the time that hardware module switches to CPU Direct Model from pipeline mode, hardware module completes the processing of current token and stops before next token.Bridge application program determines the treatment state of each module.Due to the time delay of processing procedure, the pattern that disparate modules completes from pipeline mode to CPU Direct Model in different time is switched.

Fig. 7 is the path schematic diagram that packet passes through bridge equipment.Fig. 7 has briefly described the data packet stream in G.hn mac controller.Arrow shown in Fig. 7 has represented logical data processing sequence.As shown in Figure 7, the packet receiving from Ethernet interface be sent to G.hn medium can be in sequence by the TSAR resume module of classification engine, flow switch engine, LLC module and G.hn mac controller.But the different pieces of information bag of unified Ethernet interface also can be sent to embedded software or different Ethernet interfaces.The complicacy of the magnitude of traffic flow needs pipeline organization flexibly to get rid of the participation possibility of software in each treatment step, and it can cause the performance of system to reduce.

In addition, as shown in Figure 7, some hardware module such as classification engine can relate to multiple data stream in the different phase of processing sequence.Under CPU Direct Model, by taking out the output of a module and the input queue of this output and another module being dispatched, software can, by processing module free splicing, connect complexity thereby reduce between the hardware module being caused by strict hardwired streamline.If module is configured in situation that module identifier (ID) programming or sequence be associated with configuration module ID, broadcast token mechanism can provide similar function.

Fig. 8 changes the bridge equipment schematic diagram of G.hn medium to Ethernet as media converter.In the present embodiment, bridge equipment is configured to power line communication (PLC) modulator-demodular unit, because bridge equipment allows the equipment of any RJ45 of having ethernet port to be connected with G.hn network.The outlet that bridge equipment can insert on wall exposes network ethernet port.Bridge equipment also can be configured to the improved softdog of existing equipment.

Fig. 9 is the bridge equipment embodiment schematic diagram for bridged ethernet lan port and G.hn medium that can be connected with router or gateway device.In the present embodiment, ethernet physical layer is replaced access G.hn medium by bridge equipment.Many media types can be supported that the function of above-mentioned port is switching network (fabric)/bridge joint (bridge) port by the 2nd RGMII port of bridge equipment by common.

Should be noted that, embodiments of the invention have preferably implementation, and not the present invention is done to any type of restriction, any person skilled in art of being familiar with may utilize the technology contents of above-mentioned announcement to change or be modified to the effective embodiment being equal to, in every case do not depart from the content of technical solution of the present invention, any modification or equivalent variations and the modification above embodiment done according to technical spirit of the present invention, all still belong in the scope of technical solution of the present invention.

Claims (10)

1. a method of setting up bridge between multi-network interface, is characterized in that:

Comprise the following steps:

S1: a kind of bridge application program of being carried out by least one multiline procedure processor is provided;

S2: described bridge application program receives many packets on one or more network interfaces;

S3: described bridge application program is connected communication with buffer management unit, and the packet that storing received arrives is to buffer zone;

S4: described bridge application program, based on predetermined queue criterion, is placed the packet that is stored in buffer zone with queue form;

S5: described bridge application program is used the processing of many packets tupe to be stored in the packet of placing with queue form in buffer zone.

S6: web application by the packet after at least one network interface transmission process to target network resource.

2. the method for claim 1, is characterized in that:

Described many packets tupe is CPU Direct Model, and one of described multiline procedure processor starts and monitor the data packet stream of the module by be connected communication with bridge application program.

3. the method for claim 1, is characterized in that:

Described processing data packets pattern is pipeline mode, and described buffer management unit monitors is by being connected the data packet stream of the module of communicating by letter with bridge application program.

4. method as claimed in claim 2 or claim 3, is characterized in that:

Described module comprises reception segmentation and restructuring (RSAR) module, reception (direction) logic link control (LLC) module, classification engine, stream switch engine, transmission (direction) logic link control (LLC) module, sends fragment and re assembly (TSAR) module.

5. the method for claim 1, is characterized in that:

Described network interface is source network resource interface.

6. method as claimed in claim 5, is characterized in that:

Described Internet resources interface is network gateway, network switch, bridge, the network switch, hub, the webserver, medium server.

7. the method for claim 1, is characterized in that:

Described buffer stores is in high-speed random access memory.

8. method as claimed in claim 7, is characterized in that:

Described high speed easy assess memorizer is third generation double data rate access memory.

9. use a pipeline processes structure for method as claimed in claim 1, comprise the software module and the hardware module that connect by bag queue in logic, it is characterized in that:

Based on the many bags queue by hardware buffer administrative unit and the management of token informing mechanism, allow the streamline of described software and many hardware modules mutual.

10. use a bridge equipment as claimed in claim 1, it is characterized in that:

Comprise: comprise RGMII/GMII interface, serializer/deserializers (SERDES) interface, double data rate (DDR) (DDR) interface and Serial Peripheral Interface (SPI) (SPI), described bridge equipment is configured to structure take G.hn medium as basic home network, and is connected with the computing machine of networking.

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