CN103795556B - A kind of fault handling method and the network switch - Google Patents
A kind of fault handling method and the network switch Download PDFInfo
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- CN103795556B CN103795556B CN201210424004.3A CN201210424004A CN103795556B CN 103795556 B CN103795556 B CN 103795556B CN 201210424004 A CN201210424004 A CN 201210424004A CN 103795556 B CN103795556 B CN 103795556B
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Abstract
The embodiment of the invention discloses a kind of fault handling method and the network switch.LAN on plate in the network switch is exchanged increases pin on LSW chips, pin is connected with the idle contact pin or jack on plate so that pin is used as standby pin, and present invention method includes：If the pin that processor detects LAN exchange chip LSW chips breaks down, it is determined that the pin numbering of fault pin, and determines the pin numbering of the standby pin of selection；The pin numbering of the pin numbering of fault pin and standby pin is sent to opposite end processor, to notify opposite end processor to carry out troubleshooting；Pin parameter in the corresponding register of fault pin changes the pin parameter in the corresponding register of standby pin, by using the replacement fault pin of standby pin, it is to avoid influence the normal transmission of signal because pin breaks down.
Description
Technical field
The present invention relates to communication technical field, more particularly to a kind of fault handling method and the network switch.
Background technology
In the network switch, commonly using various connectors（English：connector）To connect plurality of plates（English：
board）, wherein, a set of connector includes contact pin（English：contact pin）And jack（English：hole）, and a set of patch
Contact pin and receptacle portion in part are located on different plates respectively.However, because message is more and more, connector because space and
It is increasingly thinner that the reason for cost, just does, and during production and transportation, contact pin and jack are easily deformed, and will so cause this
Contact pin or the abnormal signal of jack transmission, cause signal distortion or nonpassage of signal.Moreover, more failures easily occur in plug
Afterwards, once contact pin or jack deformation, when it is docked with others jacks or contact pin, easily cause corresponding jack or
Person's contact pin is damaged.
At present, if because the deformation of contact pin or jack cause signal transmission to be broken down, it is necessary to staff to it is live more
Changing-over plug-in unit, cost is high, and the time of consumption is long, and before changing, the network switch can not all be normally carried out signal transmission, right
The influence of business is larger.
The content of the invention
The invention provides a kind of fault handling method and the network switch, exchanged for LAN onboard（English：
LAN Switch, abbreviation：LSW）The pin of chip（English：pin）During failure, fault pin is replaced using standby pin,
Avoid influenceing the normal transmission of signal because pin breaks down.
One aspect of the present invention provides a kind of fault handling method, wherein, the LAN on the plate in the network switch is handed over
Changing on LSW chips increases pin, the pin is connected with the idle contact pin or jack on the plate so that the pin is made
Used for standby pin, the fault handling method may include：
If the pin that processor detects LAN exchange chip LSW chips breaks down, it is determined that fault pin draws
Pin is numbered, and determines the pin numbering of the standby pin of selection；
The pin numbering of the pin numbering of the fault pin and the standby pin is sent to opposite end processor, with logical
Know that the opposite end processor carries out troubleshooting；
Pin parameter in the corresponding register of the fault pin changes the corresponding register of the standby pin
In pin parameter.
In the first possible implementation, the fault handling method may also include：
The processor detects the connection status field in the corresponding register of pin of the LSW chips；
If the corresponding pin of connection status field identification in the register is unavailable, it is determined that the LSW chips
Pin breaks down.
With reference to first aspect or first aspect the first possible implementation, in second of possible implementation
In, pin parameter is preserved in the register so that the LSW chips, can be according in the register when sending message
Pin parameter determines the sendaisle needed to use, and the differential signal obtained after the Message processing is sent into logical by described
Road is sent.
With reference to first aspect or first aspect the first possible implementation, the possible implementation in the 4th,
The pin numbering of the standby pin for determining selection may include：
Judgement is that have available standby pin；
If so, then arbitrarily selecting standby pin from the available standby pin, the volume of the standby pin of selection is determined
Number.
In the 4th kind of possible implementation of first aspect, the fault handling method may also include：
By the numbering write device daily record of the numbering of the fault pin and the standby pin, warning message is sent.
Second aspect of the present invention provides a kind of network switch, it may include：
First plate and the second plate, wherein, first plate is connected with second plate by connector, the connector bag
Containing contact pin and jack；
First plate includes first processor, and the first LAN exchanges LSW chips, the contact pin；
Second plate includes second processor, the 2nd LSW chips, the jack；
The first processor is connected with the first LSW chips, and the first LSW chips are connected with the contact pin, institute
State second processor to be connected with the 2nd LSW chips, the 2nd LSW chips are connected with the jack；
Have standby on standby pin, and the first LSW chips on the first LSW chips and the 2nd LSW chips
There is corresponding relation with the standby pin on pin and the 2nd LSW chips；
The first LSW chips and the 2nd LSW chip internals include register, and the register draws for preservation
The pin parameter of pin.
In the first possible implementation, if the first processor detects the pin of the first LSW chips
Break down, it is determined that the pin numbering of fault pin, and determine the pin numbering of the standby pin of selection；The failure is drawn
The pin numbering of the pin numbering of pin and the standby pin is sent to the second processor, to notify the second processor
Carry out troubleshooting；And first processor is also by described in the pin parameter modification in the corresponding register of the fault pin
Pin parameter in the corresponding register of standby pin.
As can be seen from the above technical solutions, the embodiment of the present invention has advantages below：
The increased pin of LSW chips on plate in the network switch is connected with the contact pin or jack on the plate so that
The pin can be used as standby pin.When the pin for detecting LSW chips in processor breaks down, processor can pass through
Determine the pin numbering of fault pin and the pin numbering of standby pin, and by the pin numbering of fault pin and standby pin
Pin numbering is sent to opposite end processor, will also be corresponding according to fault pin to notify opposite end processor to carry out troubleshooting
Register（English：register）In pin parameter change pin parameter in the corresponding register of standby pin, using standby
Fault pin is replaced to transmit signal with pin, it is to avoid to influence the normal transmission of signal because pin breaks down.
Brief description of the drawings
Fig. 1 is the schematic diagram of the structure of plate in the embodiment of the present invention；
Fig. 2 is a schematic diagram of fault handling method in the embodiment of the present invention；
Fig. 3 is another schematic diagram of fault handling method in the embodiment of the present invention；
Fig. 4 is a schematic diagram of the structure of the network switch in the embodiment of the present invention.
Embodiment
The embodiments of the invention provide a kind of fault handling method and the network switch, for the plate in the network switch
On LSW chips pin break down when, replace fault pin using standby pin, it is to avoid because pin break down influence letter
Number normal transmission.
Referring to Fig. 1, the schematic diagram of the structure for the plate in the network switch in the embodiment of the present invention, including processor,
LSW chips and connector, the connector can be the contact pin or jack in a set of connector, wherein, processor is born
The LSW chips on management board and other devices on plate are blamed, LSW chips are responsible for sending and receiving for message, and LSW chips and plate
On connector one end connection, and the other end of the connector can be connected with one end of the connector on another block of plate, in Fig. 1
In the structure of shown plate, the solid line between connector and LSW chips is connected as common connection, in embodiments of the present invention,
Connector can be contact pin, and the available free contact pin of connector, or connector is jack, and the available free jack of connector,
Therefore, lead can be drawn from LSW chip internals, as increased pin on LSW chips, and by the increased pin and the plate
Connector idle contact pin or jack connection so that the pin can be used as the standby pin of LSW chips, such as scheme
The pin of LSW die terminals is standby pin in the two ends of dotted line connection in 1 between LSW chips and connector.
In embodiments of the present invention, it can be directly connected between plate and plate by connector, or the company on two boards plate
Fitting is connected with the connector on backboard respectively so that the LSW chips between plate can form the passage of message transmissions.
In embodiments of the present invention, there are HiGig ports on LSW chips, a HiGig port includes 4 sendaisles（English
Text：lane）Lane are received with 4, and each lane has comprising a pair of differential lines, and a pair of differential lines on LSW chips
Two pins, wherein, a pair of differential lines are used to carrying and transmitting a pair of differential signals.LSW chips can be from the receptions of HiGig ports
Lane receives differential signal, and processing generation message is carried out to the differential signal received, or LSW chips are when sending message,
Data in the message are decoded into differential signal and are transmitted by the transmission lane of HiGig ports.To specifically it retouch below
State, when the pin of LSW chips breaks down, the method that the processor on plate carries out troubleshooting.Referring to Fig. 2, being the present invention
The embodiment of fault handling method in embodiment, including：
The 201st, if processor detects the pin failure of LSW chips, it is determined that the pin numbering of fault pin, and really
Determine the pin numbering of the standby pin of selection；
In embodiments of the present invention, the processor on plate by detect the processor LSW chips onboard pin, if
The pin for detecting LSW chips breaks down, then will determine the pin numbering of fault pin and determine the standby pin of selection
Pin numbering.
In embodiments of the present invention, in LSW chips include register, and LSW chips each pin in the LSW chips
There is a corresponding register, wherein, pin parameter is preserved in register, includes the polarity of pin, the connection status of pin,
The numbering of corresponding lane, corresponding lane direction and whether used, can be referring to following table：
| Position | Field description |
| 5 | The connection status of pin, 0 is unavailable, and 1 is available |
| 4 | The polarity of pin：0 is positive pole, and 1 is negative pole |
| 3~2 | Lane corresponding with pin numbering, 0 ~ 3 |
| 1 | Lane corresponding with pin direction, 0 is sends, and 1 is reception |
| 0 | Whether pin is used, and 0 is unused, and 1 is to have used |
In embodiments of the present invention, the connection shape in the pin parameter in the register in LSW chips can be read in processor
State field, to determine whether pin can use, for example, by taking upper table as an example, if the connection status field of register is 0, this is posted
The corresponding pin of storage breaks down, and processor determines the numbering of the pin broken down.
In addition, processor will also arbitrarily select available standby pin from idle standby pin.
In embodiments of the present invention, the pin parameter of the pin is saved in the corresponding register of pin so that LSW chips
When sending message, the transmission needed to use can be determined according to the pin parameter in the corresponding register of pin in LSW chips
Lane, and the differential signal obtained after Message processing is sent by transmission lane.
202nd, the pin numbering of the pin numbering of fault pin and standby pin is sent to opposite end processor, with notice pair
Processor is held to carry out troubleshooting；
The pin numbering of the pin numbering of fault pin and standby pin is sent to opposite end processor by processor, to notify
Opposite end processor carries out troubleshooting.
Optionally, opposite end processor is after the pin numbering of the pin numbering of fault pin and standby pin is received,
Confirmation message is returned to, to confirm that the opposite end processor will carry out troubleshooting.
203rd, the pin parameter in the corresponding register of fault pin is changed in the corresponding register of standby pin
Pin parameter.
Optionally, in the case where opposite end processor can return to confirmation message, processor receives opposite end processor transmission
Confirmation message after, the pin parameter in the corresponding register of fault pin is changed into the corresponding register of standby pin
In pin parameter, replace fault pin using standby pin.
In embodiments of the present invention, two pieces of standby pins that can mutually transmit on the plate of signal have corresponding relation, and
There is the physical channel of transmission signal, if for example, the pin 16 on plate A and drawing on plate B between pin with corresponding relation
There is corresponding relation, then it represents that pin 16 on plate A and the pin 17 on plate B are physically being connected between pin 17.
In embodiments of the present invention, processor is according to the polarity field and pin of the pin in the register of fault pin
Corresponding lane number field, lane corresponding with pin number field change the respective field of standby pin so that standby
Fault pin can be replaced with pin, in addition, processor also sets up the pin in the pin parameter of the corresponding register of standby pin
Whether the use of field is 1, it is determined that using the standby pin.
In embodiments of the present invention, the opposite end processor of processor, which carries out troubleshooting, is drawn according to fault pin is corresponding
Pin parameter in the corresponding register of pin changes the pin parameter in the corresponding register of the corresponding pin of standby pin.
In embodiments of the present invention, by setting standby pin on the LSW chips of plate so that in the pin of LSW chips
When breaking down, fault pin is replaced using standby pin so that the LSW chips can normal work, LSW chips
HiGig ports can normally transmit signal, it is to avoid influence the normal transmission of signal because pin breaks down.
In order to be better understood from the technical scheme in the embodiment of the present invention, referring to Fig. 3, being failure in the embodiment of the present invention
Another embodiment of processing method, including：
301st, the connection status field in the corresponding register of pin of processor detection LSW chips；
In embodiments of the present invention, processor is detected by timing or in real time in the corresponding register of pin of LSW chips
Connection status field, whether signal transmission can normally be carried out with the pin for judging LSW chips.
If the corresponding pin of connection status field identification the 302, in register is unavailable, it is determined that the pin of LSW chips
Break down；
In the embodiment of the present invention, if the corresponding pin of connection status field identification that processor is detected in register can not
With, it is determined that the pin of the differential lines of LSW chips breaks down.
303rd, the pin numbering of fault pin is determined；
In embodiments of the present invention, after processor determines that the pin of LSW chips breaks down, the fault pin will be determined
Pin numbering.
304th, available standby pin is determined whether；
In embodiments of the present invention, processor is it is determined that whether after the pin numbering of fault pin, will determine that has available
Standby pin, can specifically be judged according to the pin parameter in the corresponding register of the pin preserved in LSW chips, example
Such as：Judge whether used field for 0 in the pin parameter in the corresponding register of pin, if 0, then the pin is standby
Pin, will continue to judge whether the connection status field in pin parameter is 1, if 1, then the pin is available standby draws
Pin.
If the 305, there is available standby pin, standby pin is arbitrarily selected from available standby pin, it is determined that selection
Standby pin numbering；
In embodiments of the present invention, can be from available standby pin if processor determines there is available standby pin
Standby pin is arbitrarily selected, the numbering of the standby pin of selection is determined.For example：If there is a fault pin, have two it is available
Standby pin, then can select any one standby pin, and determine that the standby of the selection is drawn from two available standby pins
The numbering of pin.
306th, the pin numbering of the pin numbering of fault pin and standby pin is sent to opposite end processor, with notice pair
Processor is held to carry out troubleshooting；
In embodiments of the present invention, the pin numbering of the pin numbering of fault pin and standby pin is sent to by processor
Opposite end processor, to notify opposite end processor to carry out troubleshooting, wherein, processor will pass through the pipe between the processor of opposite end
Manage passage and the pin numbering of fault pin and the pin numbering of standby pin are sent to opposite end processor.
In embodiments of the present invention, opposite end processor receive fault pin numbering and standby pin numbering after,
It will be determined whether carry out troubleshooting, however, it is determined that carry out troubleshooting, then will send confirmation message to its opposite end processor.
In embodiments of the present invention, the inside of LSW chips includes register, and each pin correspond to a register,
The register is used to preserve pin parameter, in addition, also comprising the LSW chips on the plate for preserving pin and its opposite end in LSW chips
Pin between corresponding relation register, therefore, opposite end processor will be determined at the opposite end according to the numbering of fault pin
The numbering of the pin broken down of the LSW chips on plate where reason device, and it is true according to the numbering of the standby pin received
In the numbering of the standby pin of the fixed opposite end processor, and the corresponding register of fault pin determined according to the opposite end processor
Pin parameter change register parameters in the corresponding register of standby pin of its determination, the plate where the processor of opposite end
On LSW chips on realize that standby pin replaces fault pin so that being capable of normal transmission signal between plate and plate.
307th, the pin parameter in the corresponding register of fault pin is changed in the corresponding register of standby pin
Pin parameter；
In embodiments of the present invention, processor is standby by the pin parameter modification in the corresponding register of fault pin
Pin parameter in the corresponding register of pin, is specifically included：Processor joins the pin in the register according to fault pin
The polarity field of pin in number, lane corresponding with pin number field, lane corresponding with pin direction field and
Lane corresponding with pin number field changes the respective field of standby pin so that standby pin can replace fault pin,
In addition, whether the pin in the pin parameter that processor will be also set in the corresponding register of standby pin is 1 using field,
It is determined that using the standby pin.
It is preferred that, opposite end processor after the pin numbering and the pin numbering of standby pin for receiving fault pin,
Confirmation message can also be returned to processor so that processor can after the confirmation message of opposite end processor feedback is received,
Perform the content in step 307.
308th, by the numbering write device daily record of the numbering of fault pin and standby pin, warning message is sent.
In embodiments of the present invention, processor modifies it to the pin parameter in the corresponding register of standby pin
Afterwards, processor is by the pin numbering write device daily record of the pin numbering of fault pin and the standby pin of selection, and sends
Warning message, to remind staff to carry out trouble shooting.
In embodiments of the present invention, if processor does not find available standby pin, by the pin numbering of fault pin
Write device daily record, concurrently send warning message.
In embodiments of the present invention, mainboard and subplate have been had predetermined that between two blocks of connected plates, if mainboard is detected
The pin of LSW chips on to the mainboard breaks down, then the content by the embodiment description as shown in Fig. 1 or Fig. 3 is entered
Row troubleshooting, and subplate can not perform the fault detect of the pin of the LSW chips on the subplate, can also perform the subplate
On LSW chips differential lines pin fault detect.The failure inspection of the pin of the LSW chips on the subplate is performed in subplate
, will be by management passage to the pair if the pin that subplate detects the LSW chips on the subplate breaks down in the case of survey
The corresponding mainboard of plate sends fault detection information, and the corresponding mainboard of the subplate is received after the fault detection information, will be to this
The pin of LSW chips on mainboard is detected, will if the mainboard determines that the pin of the LSW chips of the mainboard breaks down
Troubleshooting is carried out by the content described in Fig. 1 or embodiment illustrated in fig. 3.
In embodiments of the present invention, after setting standby pin on the LSW chips of plate, if processor detects LSW cores
The pin of piece breaks down, then standby pin can be selected from available standby pin, by the pin numbering of fault pin and choosing
The pin numbering for the standby pin selected is sent to opposite end processor, and the pin parameter in the corresponding register of fault pin
The pin parameter in the corresponding register of standby pin of selection is changed, fault pin is replaced using standby pin, in addition, opposite end
Processor is also carried out the pin numbering and the pin numbering of the standby pin of selection according to the fault pin received at failure
Reason so that the pin of the LSW chips on plate can normally transmit signal, it is to avoid because pin is breaking down influence signal just
Often transmission.
Referring to Fig. 4, the embodiment of the structure for the network switch in the embodiment of the present invention, including：
First plate 401 and the second plate 402, wherein, the first plate 401 is connected with the second plate 402 by connector, wherein, connect
Plug-in unit includes contact pin 405 and jack 408；
First plate 401 includes first processor 403, the first LSW chips 404 and contact pin 405；
Second plate 402 includes second processor 406, the 2nd LSW chips 407, jack 408；
First processor 403 is connected with the first LSW chips 404, and the first LSW chips 404 are connected with contact pin 405；
Second processor 406 is connected with the 2nd LSW chips 407, the 2nd LSW chips 407 and jack 408；
Have on the first LSW chips 404 and the 2nd LSW chips 407 on standby pin, the first LSW chips 404 standby draws
The upper standby pin of pin and the 2nd LSW chips 407 has corresponding relation；
Wherein, if the pin that first processor 403 detects the first 404LSW chips breaks down, it is determined that fault pin
Pin numbering, and determine the pin numbering of the standby pin of selection；By drawing for the pin numbering of fault pin and standby pin
Pin numbering is sent to second processor 406, to notify second processor 406 to carry out troubleshooting；And the basis of first processor 403
Pin parameter in the corresponding register of fault pin changes pin parameter in the corresponding register of standby pin.
Wherein, second processor 406 receives the pin numbering of the fault pin of the transmission of first processor 403 and standby drawn
After the pin numbering of pin, by the pin numbering of the fault pin sent according to first processor 403 and the pin of standby pin
Numbering determines the pin numbering of fault pin on the 2nd LSW407 chips when second processor carries out troubleshooting and standby
The pin numbering of pin, and the pin parameter modification the in the corresponding register of fault pin on the 2nd LSW chips 407
The corresponding pin parameter of standby pin on two LSW chips 407.
In embodiments of the present invention, the standby pin on the first LSW chips 404 draws with standby on the 2nd LSW chips 407
Between pin there is corresponding relation to refer to one on a standby pin and the 2nd LSW chips 407 on the first LSW chips 404
The physical channel of signal can be transmitted by having between standby pin.
In embodiments of the present invention, by setting standby pin on LSW chips so that LSW chip difference onboard
When the pin of line breaks down, fault pin is replaced using standby pin, the normal transmission for carrying out message is can continue to.
One of ordinary skill in the art will appreciate that realizing that the part steps in above-described embodiment method can be by journey
Sequence come instruct correlation hardware complete, described program can be stored in a kind of computer-readable recording medium, mentioned above
Storage medium can be read-only storage, disk or CD etc..
A kind of fault handling method and the network switch provided by the present invention are described in detail above, for this
The those skilled in the art in field, according to the technical scheme described in the embodiment of the present invention, in embodiment and application
On will change, in summary, this specification content should not be construed as limiting the invention.
Claims (6)
1. a kind of fault handling method, it is characterised in that the LAN on the plate in the network switch is exchanged to be increased on LSW chips
Plus pin, the pin is connected with the idle contact pin or jack on the plate so that the pin makes as standby pin
With then the fault handling method includes：
If processor detect the processor the pins of LAN exchange chip LSW chips onboard break down,
The pin numbering of fault pin is determined, and determines the pin numbering of the standby pin of selection；
The pin numbering of the pin numbering of the fault pin and the standby pin is sent to opposite end processing by the processor
Device, to notify the opposite end processor to carry out troubleshooting so that the opposite end computing device following steps：According to receiving
The fault pin pin numbering and the pin numbering of the standby pin, determine on the plate where the opposite end processor
LSW chips the pin broken down numbering and the numbering of standby pin, and according to the opposite end processor determine
Pin parameter in the corresponding register of pin broken down, the standby pin for changing the opposite end processor determination is corresponding
Register parameters in register, to realize that standby pin is replaced on the LSW chips on the plate where the opposite end processor
Fault pin；
It is corresponding that pin parameter of the processor in the corresponding register of the fault pin changes the standby pin
Pin parameter in register.
2. fault handling method according to claim 1, it is characterised in that the fault handling method also includes：
The processor detect the processor connection status word in the corresponding register of pin of LSW chips onboard
Section；
If the processor connection status field identification in the corresponding register of pin of LSW chips onboard it is corresponding
Pin is unavailable, it is determined that the processor the pins of LSW chips onboard break down.
3. fault handling method according to claim 1 or 2, it is characterised in that the processor LSW cores onboard
Pin parameter is preserved in the corresponding register of pin of piece so that processor institute's LSW chips onboard are in transmission message
When, can according to the processor LSW chips onboard the corresponding register of pin in pin parameter determine that needs make
Sendaisle, and the differential signal obtained after the Message processing is sent by the sendaisle.
4. fault handling method according to claim 1 or 2, it is characterised in that the standby pin for determining selection
Pin numbering includes：
Judgement is that have available standby pin；
If so, then arbitrarily selecting standby pin from the available standby pin, the numbering of the standby pin of selection is determined.
5. fault handling method according to claim 3, it is characterised in that described to be posted according to the fault pin is corresponding
Pin parameter in storage also includes after changing the pin parameter in the corresponding register of the standby pin：
By the numbering write device daily record of the numbering of the fault pin and the standby pin, warning message is sent.
6. a kind of network switch, it is characterised in that including：
First plate and the second plate, wherein, first plate is connected with second plate by connector, and the connector is comprising slotting
Pin and jack；
First plate includes first processor, and the first LAN exchanges LSW chips, the contact pin；
Second plate includes second processor, the 2nd LSW chips, the jack；
The first processor is connected with the first LSW chips, and the first LSW chips are connected with the contact pin, and described
Two processors are connected with the 2nd LSW chips, and the 2nd LSW chips are connected with the jack；
Have on standby pin, and the first LSW chips on the first LSW chips and the 2nd LSW chips standby draws
Pin has corresponding relation with the standby pin on the 2nd LSW chips；
The first LSW chips and the 2nd LSW chip internals include register, and the register is used to preserve drawing for pin
Pin parameter；
If the pin that the first processor detects the first LSW chips breaks down, it is determined that the pin of fault pin
Numbering, and determine the pin numbering of the standby pin of selection；By the pin numbering of the fault pin and the standby pin
Pin numbering is sent to the second processor, to notify the second processor to carry out troubleshooting；And first processor is also
Pin parameter in the corresponding register of the fault pin is changed into drawing in the corresponding register of the standby pin
Pin parameter；
If the second processor receives the pin numbering of the fault pin that the first processor is sent and described standby
With the pin numbering of pin, then the pin numbering of the fault pin sent according to the first processor and described standby draw
The pin numbering of pin, determines fault pin on the 2nd LSW chips when second processor carries out troubleshooting
The pin numbering of pin numbering and standby pin, and according in the corresponding register of fault pin on the 2nd LSW chips
Pin parameter change the corresponding pin parameter of standby pin on the 2nd LSW chips.
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| CN201210424004.3A CN103795556B (en) | 2012-10-30 | 2012-10-30 | A kind of fault handling method and the network switch |
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| CN106940668A (en) * | 2017-03-24 | 2017-07-11 | 上海与德科技有限公司 | A kind of chip, standby pin switching circuit and its changing method |
| CN107422668B (en) * | 2017-06-26 | 2020-07-31 | 深圳市陆海电子有限公司 | Chip circuit, control method of chip circuit, and electronic device |
| CN115022150B (en) * | 2022-04-21 | 2024-04-12 | 中国农业银行股份有限公司 | Network emergency method and device |
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