CN103780781B - Spreading rate SHDSL transport modules - Google Patents
Spreading rate SHDSL transport modules Download PDFInfo
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- CN103780781B CN103780781B CN201210411555.6A CN201210411555A CN103780781B CN 103780781 B CN103780781 B CN 103780781B CN 201210411555 A CN201210411555 A CN 201210411555A CN 103780781 B CN103780781 B CN 103780781B
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Abstract
Spreading rate SHDSL transport modules, it is related to modulation-demodulation technique field.Its interface of management (4) is connected with each other with control unit (1), interface (5) of activating business is connected with each other with data-interface (2), control unit (1), data-interface (2) are connected with each other with SHDSL processing units (3), and SHDSL processing units (3) are connected with each other with loop interface (6).It uses spreading rate transmission technology, on a pair of twisted-pair feeders, realizes the two-way net load speed rates of point-to-point 64kbit/s~15296kbit/s and 1~16 km transmission distance, and energy consumption is low.
Description
Technical field:
The present invention relates to modulation-demodulation technique field, and in particular to a kind of spreading rate SHDSL transport modules.
Background technology:
For broadband access technology, people it is familiar be Asymmetrical Digital Subscriber Line ADSL (Asymmetrical
Digital Subscriber Line), it can set up up 896kbit/s on a pair of general twisted-pair power cables, descending to reach
The asymmetrical digital communication link of 8160kbit/s, this is especially suitable for realizing the asymmetric traffics such as Internet accesses and VOD.
But also just because of the asymmetry of ADSL speed so that the application of ADSL has many limitations.Particularly commercial wideband requirements
Environment is a two-way, symmetrical traffic environment, and to the tolerance of performance inconsistency than relatively low, ADSL access technologies are increasingly
People can not be met to bandwidth and the demand of flow.Then, people begin to focus on SHDSL technologies.
The gradually popularization of nowadays broadband access, the networked services of high speed have turned into irreversible trend, although optical fiber
Access is the best mode for accessing internet, but this needs a transient process very long.XDSL technologies with SHDSL as forward position
It will be the mainstream technology of China's broadband access within the quite a long time.
The symmetrical High Speed Digital Subscribers of SHDSL (Symmetrical High bite Digital Subscriber Line)
Circuit is a kind of technology that transmission bi-directional symmetrical bandwidth data services are provided on single pair of twisted-pair feeder defined by ITU-T, is met
International Telecommunication Association's G.991.2 proposed standard, due to 16 level trellis codeds pulse amplitude modulation (TC-PAM) using superior performance
Technology, have compressed transmission spectrum, improve noiseproof feature, extend transmission range, therefore compare and have with ADSL, HDSL technology
Obvious technical advantage.At present, the flank speed for using SHDSL access technologies to be capable of symmetrical transmission is 8192kbit/s, modulation
Using 64 level.Popularization and the demand of more high bandwidth with gigabit Ethernet, can not fully meet the need of bandwidth users
Ask.
The content of the invention:
It is an object of the invention to provide a kind of spreading rate SHDSL transport modules, it uses spreading rate transmission technology,
On a pair of twisted-pair feeders, the two-way net load speed rates of point-to-point 64kbit/s~15296kbit/s and 1~16 kilometer of biography are realized
Defeated distance, energy consumption is low.
In order to solve the problems existing in background technology, the present invention is to adopt the following technical scheme that:It includes control unit
1st, data-interface 2, SHDSL processing units 3, interface of management 4, interface 5 of activating business, loop interface 6, interface of management
4 are connected with each other with control unit 1, and interface 5 of activating business is connected with each other with data-interface 2, control unit 1, data-interface 2 with
SHDSL processing units 3 are connected with each other, and SHDSL processing units 3 are connected with each other with loop interface 6.
Described SHDSL processing units 3 include parallel control interface 31, RAM random access memory 32, embedded controller
33rd, digital front-end dsp processor 34, ADC converters 35, DAC digital analog converters 36, Echo Cancellation unit 37, circuit drive
Moving cell 38, line interface 39, AUX interfaces 310, SDI serial data interfaces 311, clock unit 312, framing/solution frame 313, and
Row control interface 31 is connected with each other with RAM random access memory 32, embedded controller 33 respectively, embedded controller 33 respectively with
Digital front-end dsp processor 34, SDI serial data interfaces 311, clock unit 312, framing/solution frame 313 are connected with each other, SDI strings
Row data-interface 311 is connected with each other with AUX interfaces 310, framing/solution frame 313 respectively, framing/solution frame 313 and digital front-end DSP
Processor 34 is connected with each other, and digital front-end dsp processor 34 is mutual with ADC converters 35, DAC digital analog converters 36 respectively
Connection, ADC converters 35 are connected with each other with Echo Cancellation unit 37, DAC digital analog converters 36 and circuit driver element 38
It is connected with each other, Echo Cancellation unit 37, circuit driver element 38 are connected with each other with line interface 39.
Described control unit 1 completes to download in firmware using the CPU of low-power consumption, calls spreading rate pattern, controls
Sequential of the SHDSL processing units from pretrigger to data pattern, management and control SHDSL processing units, treat SHDSL processing units
EOC management signal datas are transmitted after synchronization;, by parallel bus and the information exchange of SHDSL processing units 3, CPU will after upper electricity for CPU
Firmware downloads to SHDSL processing units 3, treats that the embedded controller 33 in SHDSL processing units 3 is called.CPU calls extension speed
Rate pattern, control SHDSL processing units 3 enter the sequential of data pattern from pretrigger.In addition, CPU completes management signal transmitting and receiving.
CPU so can not only meet the demand of domestic consumer, and can meet more low power consumers using the device of low-power consumption
Demand, the reliability of transport module can be improved.
Described data-interface 2 is completed SHDSL processing units 3 and is activated business with various using the fpga chip of low-power consumption
The switching of interface drives with signal, and interface 5 of activating business can include cable voice port, V.35 Ethernet interface, interface, A interfaces
With the multiservice interface such as E1/E2 interfaces.
Data-interface 2 completes SHDSL processing units 3 and is driven with signal with the switching of various interfaces 5 of activating business, and extends industry
Data-interface is given in the compression treatment that business interface 5 sound intermediate frequency interface completes audio signal standard form;Ethernet interface complete with
The too transmitting-receiving of network data, realizes the encapsulation and decapsulation of HDLC protocol;V.35 interface realizes impedance matching, level conversion, work
Switching of patten transformation and clock etc.;A interfaces (line interface) believe AMI yards of information signal and frame alignment instruction code with clock
Number NRZ yards of integration is to data-interface;E1/E2 interfaces realize level and code conversion.
Data-interface 2 can with the cable voice port in interface 5 of activating business, Ethernet interface, V.35 interface, A interfaces and
One or more interface of E1/E2 interfaces is connected, with interface selection function.
In addition, using the FPGA of low-power consumption, it is also possible to reduce the power consumption of whole module.The interface selection function of FPGA can be with
The interface that will do not used is configured to park mode, further reduces module dissipation.
Described SHDSL processing units 3 realize based on ITU tissues G.991.2, G.994.1, G.997.1 agreement regulation
Data processing and extension TC-PAM modulation /demodulation functions.Wherein extension TC-PAM modulation levels can not only realize 4TC-PAM,
8 TC-PAM, 16 TC-PAM, 32 TC-PAM, 64 TC-PAM, but also the modulation level of 128 TC-PAM can be realized.Adopt
Each signal code carries 6 bit datas during with the modulation level of 128 TC-PAM, such that it is able to realize transmission speed higher
Rate;Each signal code carries 1 bit data during using 4 TC-PAM modulation levels, therefore can use lower transmission rate
Realize the transmission range of more teletransmission;With reference to spreading rate pattern, transmission rate is expanded into 64kbit/s~15296kbit/s,
Transmission range can farthest reach 16 kilometers.
Embedded controller configuration each unit module after upper electricity;After loop synchronization, the management that embedded controller will be received
Information is inserted into the EOC bit of SHDSL frames;Serial data interface SDI is responsible for the transmission of data, and its transmission rate can be supported
64kbit/s~15296kbit/s.Be inserted into the data such as load data, EOC information and frame head in SHDSL frames by framer, connects
The deframer of receiving end again puts forward load data and EOC information.Digital front-end DSP includes:Scrambler/descrambler, grid
The parts such as coding demodulator, precoder and spectral shaper.Scrambler, by data flow randomization, is the correcting data error of two-forty
There is provided conveniently, the descrambler of receiving terminal again exports the data conversion of randomization into SHDSL circuits frame format.Extension grid
The serial bit stream data that scrambler is exported is transformed into m-th K parallel bit word of code-element period, convolutional encoding by encoder
Device is processed parallel bit word, exports K+1 bit words, then K+1 bits are input into one the 2 of customization in advanceK+1Level format
Mapper, according to the mapping relations of certain bit and level, it is possible to achieve the mapping of 128 level, thus each signal accord with
Number 6 bit datas can be carried, message transmission rate brings up to 15296kbit/s, establish G.991.2 protocol extension
15296kbit/s speed.
The flow of data processing is in the present invention:By taking the Ethernet data in management information and interface of activating business as an example
Flow is as follows:
The direction that business datum sends to analog network:Ethernet interface is chosen by data interface unit, Ethernet interface
High-speed data-flow enter data-interface, data-interface is by the data flow by TDM bus transfers to framer, management information number
Read according to the serial ports by CPU, write in the form of parallel byte and give SHDSL processing units.Be encapsulated into for two paths of data by framer
Into serial SHDSL frames, serial SHDSL frame data are transformed into serial random code by scrambler, extend trellis encoder by scrambler
The serial random code of output is exported after carrying out the treatment such as serioparallel exchange and level mapping, and data are by precoding, frequency spectrum shaping etc.
Output receives the inverse operation that direction is sending direction to analog network after treatment.
The present invention use spreading rate transmission technology, on a pair of twisted-pair feeders, realize point-to-point 64kbit/s~
The two-way net load speed rates of 15296kbit/s and 1~16 km transmission distance, energy consumption are low.
Brief description of the drawings:
Fig. 1 is structural representation of the invention,
Fig. 2 is the flow chart of data processing in the present invention.
Specific embodiment:
Referring to Fig. 1-Fig. 2, this specific embodiment is adopted the following technical scheme that:It comprising control unit 1, data-interface 2,
SHDSL processing units 3, interface of management 4, interface 5 of activating business, loop interface 6, interface of management 4 and control unit 1
It is connected with each other, interface 5 of activating business is connected with each other with data-interface 2, control unit 1, data-interface 2 are single with SHDSL treatment
Unit 3 is connected with each other, and SHDSL processing units 3 are connected with each other with loop interface 6.
Described SHDSL processing units 3 include parallel control interface 31, RAM random access memory 32, embedded controller
33rd, digital front-end dsp processor 34, ADC converters 35, DAC digital analog converters 36, Echo Cancellation unit 37, circuit drive
Moving cell 38, line interface 39, AUX interfaces 310, SDI serial data interfaces 311, clock unit 312, framing/solution frame 313, and
Row control interface 31 is connected with each other with RAM random access memory 32, embedded controller 33 respectively, embedded controller 33 respectively with
Digital front-end dsp processor 34, SDI serial data interfaces 311, clock unit 312, framing/solution frame 313 are connected with each other, SDI strings
Row data-interface 311 is connected with each other with AUX interfaces 310, framing/solution frame 313 respectively, framing/solution frame 313 and digital front-end DSP
Processor 34 is connected with each other, and digital front-end dsp processor 34 is mutual with ADC converters 35, DAC digital analog converters 36 respectively
Connection, ADC converters 35 are connected with each other with Echo Cancellation unit 37, DAC digital analog converters 36 and circuit driver element 38
It is connected with each other, Echo Cancellation unit 37, circuit driver element 38 are connected with each other with line interface 39.
Described control unit 1 completes to download in firmware using the CPU of low-power consumption, calls spreading rate pattern, controls
Sequential of the SHDSL processing units from pretrigger to data pattern, management and control SHDSL processing units, treat SHDSL processing units
EOC management signal datas are transmitted after synchronization;, by parallel bus and the information exchange of SHDSL processing units 3, CPU will after upper electricity for CPU
Firmware downloads to SHDSL processing units 3, treats that the embedded controller 33 in SHDSL processing units 3 is called.CPU calls extension speed
Rate pattern, control SHDSL processing units 3 enter the sequential of data pattern from pretrigger.In addition, CPU completes management signal transmitting and receiving.
CPU so can not only meet the demand of domestic consumer, and can meet more low power consumers using the device of low-power consumption
Demand, the reliability of transport module can be improved.
Described data-interface 2 is completed SHDSL processing units 3 and is activated business with various using the fpga chip of low-power consumption
The switching of interface drives with signal, and interface 5 of activating business can include cable voice port, V.35 Ethernet interface, interface, A interfaces
With the multiservice interface such as E1/E2 interfaces.
Data-interface 2 completes SHDSL processing units 3 and is driven with signal with the switching of various interfaces 5 of activating business, and extends industry
Data-interface is given in the compression treatment that business interface 5 sound intermediate frequency interface completes audio signal standard form;Ethernet interface complete with
The too transmitting-receiving of network data, realizes the encapsulation and decapsulation of HDLC protocol;V.35 interface realizes impedance matching, level conversion, work
Switching of patten transformation and clock etc.;A interfaces (line interface) believe AMI yards of information signal and frame alignment instruction code with clock
Number NRZ yards of integration is to data-interface;E1/E2 interfaces realize level and code conversion.
Data-interface 2 can with the cable voice port in interface 5 of activating business, Ethernet interface, V.35 interface, A interfaces and
One or more interface of E1/E2 interfaces is connected, with interface selection function.
In addition, using the FPGA of low-power consumption, it is also possible to reduce the power consumption of whole module.The interface selection function of FPGA can be with
The interface that will do not used is configured to park mode, further reduces module dissipation.
Described SHDSL processing units 3 realize based on ITU tissues G.991.2, G.994.1, G.997.1 agreement regulation
Data processing and extension TC-PAM modulation /demodulation functions.Wherein extension TC-PAM modulation levels can not only realize 4TC-PAM,
8TC-PAM, 16TC-PAM, 32TC-PAM, 64TC-PAM, but also the modulation level of 128TC-PAM can be realized.Using
Each signal code carries 6 bit datas during the modulation level of 128TC-PAM, such that it is able to realize transmission rate higher;
Each signal code carries 1 bit data during using 4TC-PAM modulation levels, therefore can be realized with lower transmission rate
The transmission range of more teletransmission;With reference to spreading rate pattern, transmission rate is expanded into 64kbit/s~15296kbit/s, transmitted
Distance can farthest reach 16 kilometers.
Embedded controller configuration each unit module after upper electricity;After loop synchronization, the management that embedded controller will be received
Information is inserted into the EOC bit of SHDSL frames;Serial data interface SDI is responsible for the transmission of data, and its transmission rate can be supported
64kbit/s~15296kbit/s.Be inserted into the data such as load data, EOC information and frame head in SHDSL frames by framer, connects
The deframer of receiving end again puts forward load data and EOC information.Digital front-end DSP includes:Scrambler/descrambler, grid
The parts such as coding demodulator, precoder and spectral shaper.Scrambler, by data flow randomization, is the correcting data error of two-forty
There is provided conveniently, the descrambler of receiving terminal again exports the data conversion of randomization into SHDSL circuits frame format.Extension grid
The serial bit stream data that scrambler is exported is transformed into m-th K parallel bit word of code-element period, convolutional encoding by encoder
Device is processed parallel bit word, exports K+1 bit words, then K+1 bits are input into one the 2 of customization in advanceK+1Level format
Mapper, according to the mapping relations of certain bit and level, it is possible to achieve the mapping of 128 level, thus each signal accord with
Number 6 bit datas can be carried, message transmission rate brings up to 15296kbit/s, establish G.991.2 protocol extension
15296kbit/s speed.
The flow of the data processing of this specific embodiment is:With the ether netting index in management information and interface of activating business
Flow as a example by is as follows:
The direction that business datum sends to analog network:Ethernet interface is chosen by data interface unit, Ethernet interface
High-speed data-flow enter data-interface, data-interface is by the data flow by TDM bus transfers to framer, management information number
Read according to the serial ports by CPU, write in the form of parallel byte and give SHDSL processing units.Be encapsulated into for two paths of data by framer
Into serial SHDSL frames, serial SHDSL frame data are transformed into serial random code by scrambler, extend trellis encoder by scrambler
The serial random code of output is exported after carrying out the treatment such as serioparallel exchange and level mapping, and data are by precoding, frequency spectrum shaping etc.
Output receives the inverse operation that direction is sending direction to analog network after treatment.
This specific embodiment uses spreading rate transmission technology, on a pair of twisted-pair feeders, realizes point-to-point 64kbit/
The two-way net load speed rates of s~15296kbit/s and 1~16 km transmission distance, energy consumption are low.
Claims (2)
1. spreading rate SHDSL transport modules, it is characterised in that it includes control unit (1), data-interface (2), SHDSL treatment
Unit (3), interface of management (4), interface of activating business (5), loop interface (6), interface of management (4) and control unit
(1) be connected with each other, interface of activating business (5) and data-interface (2) are connected with each other, control unit (1), data-interface (2) with
SHDSL processing units (3) are connected with each other, and SHDSL processing units (3) are connected with each other with loop interface (6),
Wherein, described control unit (1) is arranged to the CPU of low-power consumption, to complete to download in firmware, and calls spreading rate
Pattern, to control SHDSL processing units (3) to enter the sequential of data pattern from pretrigger;
Described data-interface (2) is arranged to the fpga chip of low-power consumption, to complete SHDSL processing units (3) with extension industry
The switching of business interface (5) drives with signal;
Described SHDSL processing units( 3)Realize based on ITU tissue G.991.2, G.994.1, G.997.1 agreement regulation
Data processing and extension TC-PAM modulation, when the level of TC-PAM modulation is arranged to 128, each signal code can hold
Carry 6 bit datas, with reference to spreading rate pattern, its point-to-point two-way net load transmission rate extend to 64kbit/s~
15296kbit/s;When the level of the TC-PAM modulation is arranged to 4, each signal code carries 1 bit data, with reference to
Spreading rate pattern, its transmission range can reach 16 kilometers of long-distance transmissions.
2. spreading rate SHDSL transport modules according to claim 1, it is characterised in that described SHDSL processing units
(3) comprising parallel control interface (31), RAM random access memory (32), embedded controller (33), digital front-end dsp processor
(34), ADC converters (35), DAC digital analog converters (36), Echo Cancellation unit (37), circuit driver element (38), line
Road interface (39), AUX interfaces (310), SDI serial data interfaces (311), clock unit (312), framing/solution frame (313), and
Row control interface (31) is connected with each other with RAM random access memory (32), embedded controller (33) respectively, embedded controller
(33) respectively with digital front-end dsp processor (34), SDI serial data interfaces (311), clock unit (312), framing/solution frame
(313) it is connected with each other, SDI serial data interfaces (311) are connected with each other with AUX interfaces (310), framing/solution frame (313) respectively,
Framing/solution frame (313) and digital front-end dsp processor (34) are connected with each other, digital front-end dsp processor (34) respectively with ADC
Converter (35), DAC digital analog converters (36) are connected with each other, and ADC converters (35) are with Echo Cancellation unit (37) mutually
Connection, DAC digital analog converters (36) are connected with each other with circuit driver element (38), and Echo Cancellation unit (37), circuit drive
Moving cell (38) is connected with each other with line interface (39).
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CN104243347B (en) * | 2014-08-21 | 2017-08-25 | 中国航天科工集团第四研究院指挥自动化技术研发与应用中心 | The method and apparatus for being sent based on symmetrical high-speed digital subscriber line SHDSL and receiving data |
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CN101594363A (en) * | 2009-05-13 | 2009-12-02 | 重庆金美通信有限责任公司 | Full-speed wired remote-transmission module |
EP2197192A1 (en) * | 2008-12-15 | 2010-06-16 | Thomson Licensing | Systems and methods for symmetric high-speed digital subscriber line modem startup analysis and diagnosis |
CN202856848U (en) * | 2012-10-25 | 2013-04-03 | 绵阳灵通电讯设备有限公司 | Expanding rate SHDSL (symmetrical high bite digital subscriber line) transmission module |
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EP2197192A1 (en) * | 2008-12-15 | 2010-06-16 | Thomson Licensing | Systems and methods for symmetric high-speed digital subscriber line modem startup analysis and diagnosis |
CN101594363A (en) * | 2009-05-13 | 2009-12-02 | 重庆金美通信有限责任公司 | Full-speed wired remote-transmission module |
CN202856848U (en) * | 2012-10-25 | 2013-04-03 | 绵阳灵通电讯设备有限公司 | Expanding rate SHDSL (symmetrical high bite digital subscriber line) transmission module |
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