CN103744244A - Liquid crystal display device - Google Patents
Liquid crystal display device Download PDFInfo
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- CN103744244A CN103744244A CN201410052617.8A CN201410052617A CN103744244A CN 103744244 A CN103744244 A CN 103744244A CN 201410052617 A CN201410052617 A CN 201410052617A CN 103744244 A CN103744244 A CN 103744244A
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- film transistor
- liquid crystal
- thin film
- electrically connected
- electrical junction
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Abstract
The invention discloses a liquid crystal display device. The liquid crystal display device comprises a liquid crystal display panel and a backlight module, wherein the liquid crystal display panel is provided with a liquid crystal layer sandwiched between two substrates; one substrate is a thin film transistor substrate; the backlight module is arranged on one side of the liquid crystal display panel; the thin film transistor substrate comprises a data line driving loop, a scanning line driving loop, a first thin film transistor, a second thin film transistor and a resistor; the first thin film transistor is provided with a first grid electrode, a first source electrode and a first drain electrode; the first drain electrode is electrically connected with one liquid crystal capacitor; the second thin film transistor is provided with a second grid electrode, a second source electrode and a second drain electrode; the second drain electrode is electrically connected with the other liquid crystal capacitor; the resistor is electrically connected between the data line driving loop and the first drain electrode of the first thin film transistor.
Description
The application is to be dividing an application of on Dec 12nd, 2008 and the denomination of invention Chinese patent application 200810186724.4 that is " liquid crystal indicator " the applying date.
Technical field
The present invention relates to a kind of liquid crystal indicator, particularly relate to a kind of liquid crystal indicator that can reduce aberration.
Background technology
Along with the arriving of digital Age, the technology of liquid crystal indicator is Fast Growth also, has become indispensable electronic product, therefore also more and more higher for technology and the functional requirement of liquid crystal indicator.
Generally speaking, liquid crystal indicator mainly comprises liquid crystal panel and backlight module.Wherein, liquid crystal panel mainly has colored optical filtering substrates, thin film transistor base plate and is located in the liquid crystal layer between two substrates; And backlight module is used as backlight, it can be evenly distributed in the light from light source the surface of liquid crystal panel.
With regard to the picture frame in liquid crystal indicator (frame), conventionally comprise three pixels, i.e. red, green and blue pixel, when each pixel is rotated or tilts according to different driving voltage by liquid crystal molecule, angle difference because of rotation, the brightness producing is also different, can produce different color ranges.
When user is in side-looking or stravismus during liquid crystal indicator, the skew that can cause on visual angle, it is the generation of aberration (color shift) problem, therefore current improvement mode is, by inputting driving voltage to pixel, and the liquid crystal capacitance charging to two different capacitances in pixel, and two kinds of different pixels voltages of generation, for example high voltage and low-voltage, make each pixel present clear zone and Liang Ge region, dark space, to synthesize and to lower the skew of user on visual angle, allow user when each visual angle, the chroma-luminance presenting is all comparatively average.
In addition, each pixel can connect respectively a common voltage, therefore when using above-mentioned improvement mode, the clear zone of pixel and dark space are also used a common voltage jointly, yet, when stopping sending into driving voltage to pixel, because of parasitic capacitance effect, and the magnitude of voltage of pixel voltage is declined respectively, and its falling quantity of voltages (feed through) because of the value of two liquid crystal capacitances different not identical, the common voltage of clear zone and dark space is also difficult to control, therefore cannot solve the problem that causes aberration.
Therefore, how to provide a kind of and can reduce aberration and use the liquid crystal indicator of same common voltage to address the above problem, just one of current important topic.
Summary of the invention
Because above-mentioned problem, object of the present invention is for providing a kind of liquid crystal indicator that can reduce aberration and use same common voltage.
Therefore,, for reaching above-mentioned purpose, according to a kind of liquid crystal indicator of the present invention, comprise display panels and backlight module.Display panels has liquid crystal layer and is located between two substrates, and wherein a substrate is thin film transistor base plate, and backlight module is arranged at a side of display panels.On thin film transistor base plate, comprise that data line drives loop, scanning line driving loop, the first film transistor, the second thin film transistor (TFT) and resistor.Thin film transistor base plate and data line drive loop and scanning line driving loop to be electrically connected.The first film transistor has first grid, the first source electrode and the first drain electrode, and first grid and scanning line driving loop are electrically connected, and the first drain electrode is electrically connected a liquid crystal capacitance.The second thin film transistor (TFT) has second grid, the second source electrode and the second drain electrode, and second grid and scanning line driving loop are electrically connected, and the second source electrode and data line drive loop to be electrically connected, and the second drain electrode is electrically connected another liquid crystal capacitance.Resistor is electrically connected at data line and drives between loop and transistorized the first drain electrode of the first film.
From the above, because of foundation a kind of liquid crystal indicator of the present invention, wherein thin film transistor base plate and data line drive loop and scanning line driving loop to be electrically connected, by resistor being electrically connected to data line, drive between loop and transistorized the first source electrode of the first film, and the transistorized first grid of the first film and scanning line driving loop are electrically connected.With known art, because the present invention utilizes increase resistor, and be electrically connected between data line driving loop and transistorized the first source electrode of the first film, this kind of mode, as long as data line drives loop to send into a signal value, just can produce another unlike signal value by resistor dividing potential drop, be that thin film transistor base plate has two unlike signal values simultaneously, so that liquid crystal has different inclination angles, and then reach reduction aberration, and can not be subject to the impact of the parasitic capacitance effect of thin film transistor (TFT), and control relatively easily common voltage.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of demonstration according to the process structure of a kind of liquid crystal indicator of the preferred embodiment of the present invention;
Fig. 2 is the schematic diagram of demonstration according to the equivalent electrical circuit of the liquid crystal display substrate of the liquid crystal indicator of the preferred embodiment of the present invention;
Fig. 3 is the schematic diagram of demonstration according to the process structure of the resistor of the preferred embodiment of the present invention;
Fig. 4 is the schematic diagram of demonstration according to the process structure of another resistor of the preferred embodiment of the present invention; And
Fig. 5 A and 5B are the again process structure of a resistor of demonstration according to the preferred embodiment of the present invention, the stereographic map that wherein Fig. 5 A is resistor, and Fig. 5 B is the cross sectional side view of Fig. 5 A.
Description of reference numerals
Embodiment
Hereinafter with reference to relevant drawings, a kind of liquid crystal indicator, display panels and thin film transistor base plate according to the preferred embodiment of the present invention are described.
Please refer to shown in Fig. 1, a kind of liquid crystal indicator 1 of the preferred embodiment of the present invention comprises display panels 2 and backlight module 3.Wherein, backlight module 3 is arranged at a side of display panels 2.
In the present embodiment, display panels 2 has colored optical filtering substrates 4, liquid crystal layer 5 and thin film transistor base plate 6.And colored optical filtering substrates 4 is corresponding with thin film transistor base plate 6,5 of liquid crystal layers are arranged between colored optical filtering substrates 4 and thin film transistor base plate 6.
Shown in Fig. 1 and Fig. 2, the equivalent circuit diagram of the display panels 2 that Fig. 2 is Fig. 1.The thin film transistor base plate 6 of the present embodiment, drives loop DL and scanning line driving loop SL to be electrically connected (as shown in Figure 2) with data line, and has the first film transistor 61 and resistor 62.
In the present embodiment, the first film transistor 61 has first grid G
1, the first source S
1and first drain D
1, and first grid G
1be electrically connected with scanning line driving loop SL.
In addition, the thin film transistor base plate 6 of the present embodiment also has the first capacitor C
1and the second capacitor C
2.And the first capacitor C
1for stray capacitance, be electrically connected at the first grid G of the first film transistor 61
1with the first drain D
1between, and the second capacitor C
2for storage capacitors, with the first drain D of the first film transistor 61
1be electrically connected.
Shown in Fig. 2, in the present embodiment, thin film transistor base plate 6 also comprises the second thin film transistor (TFT) 63, the 4th capacitor C
4and the 5th capacitor C
5.
Second thin film transistor (TFT) 63 of the present embodiment has second grid G
2, the second drain D
2and second source S
2, second grid G wherein
2first grid G with scanning line driving loop SL and the first film transistor 61
1be electrically connected, the second source electrode and data line drive loop DL to be electrically connected.The 4th capacitor C
4for stray capacitance, be electrically connected at the second grid G of the second thin film transistor (TFT) 63
2with the second drain D
2between, the 5th capacitor C
5for storage capacitors and with the second drain D of the second thin film transistor (TFT) 63
2be electrically connected.
Shown in Fig. 2, in the present embodiment, display panels 2 separately has the 3rd capacitor C
3with the 6th capacitor C
6, the 3rd capacitor C
3the first drain D with the first film transistor 61
1be electrically connected, and the 6th capacitor C
6the second drain D with the second thin film transistor (TFT) 63
2be electrically connected, wherein the 3rd capacitor C
3with the 6th capacitor C
6for liquid crystal capacitance.
In the present embodiment, if the first capacitor C
1with the 4th capacitor C
4capacitance equate, the second capacitor C
2with the 5th capacitor C
5capacitance equate, the 3rd capacitor C
3with the 6th capacitor C
6capacitance while equating, the start of thin film transistor base plate 6 is as follows: when scanning line driving loop SL sends into pulse wave signal P, in the working time of pulse wave signal P (not shown), data line drives loop DL to send into first signal DL
1, for example: voltage signal, first signal DL
1via resistor 62 dividing potential drops, produce secondary signal DL
2, and deliver to the first film transistor 61, and meanwhile, first signal DL
1also deliver to the second thin film transistor (TFT) 63, and the first film transistor 61 is subject to the impact of resistor 62 dividing potential drops, makes to deliver to the secondary signal DL of the first film transistor 61
2its magnitude of voltage is delivered to the first signal DL of the second thin film transistor (TFT) 63
1magnitude of voltage low.Now, the first film transistor 61 is according to secondary signal DL
2conducting, and respectively to the second capacitor C
2and the 3rd capacitor C
3charging, to obtain the first charging voltage (not shown), and the second thin film transistor (TFT) 63 is according to first signal DL
1conducting, with to the 5th capacitor C
5and the 6th capacitor C
6charging, to obtain the second charging voltage (not shown).When data line drives loop DL to stop sending into pulse wave signal P, also moment stops sending into first signal DL to scanning line driving loop SL
1, the second capacitor C
2and the 3rd capacitor C
3, the 5th capacitor C
5and the 6th capacitor C
6be affected and stop immediately charging, now, the first charging voltage and the second charging voltage are subject to respectively the first capacitor C
1and the 4th capacitor C
4also affecting moment causes magnitude of voltage to decline.
In the present embodiment, the relational expression of each capacitor is as follows:
The falling quantity of voltages of the first charging voltage and the second charging voltage (feed through) is:
Wherein Vgh and Vgl are respectively mxm. and the minimum that scanning line driving loop SL sends into pulse wave signal P.From above-mentioned formula, the falling quantity of voltages of the first charging voltage and the second charging voltage is identical, therefore make the second capacitor C
2with the 5th capacitor C
5can jointly use a common voltage (Common voltage) (not shown).Certainly, the first capacitor C
1, the second capacitor C
2, the 3rd capacitor C
3, the 4th capacitor C
4, the 5th capacitor C
5and the 6th capacitor C
6can be designed to different capacitances according to different demands.
Because thin film transistor base plate 6 increases a resistor 62, and be electrically connected at the first source S that data line drives loop DL and the first film transistor 61
1between, this kind of mode, except making the first film transistor 61 and the second thin film transistor (TFT) 63, share same common voltage, as long as data line drives loop DL to send into a signal value, just can produce another unlike signal value by resistor 62 dividing potential drops, be that thin film transistor base plate 6 has two unlike signal values simultaneously, so that liquid crystal has different inclination angles, and then reach the effect that reduces aberration.
In addition, shown in Fig. 1, in the present embodiment, thin film transistor base plate 6 is in technique, also there is glass substrate 64, and the first film transistor 61 and resistor 62 are arranged at respectively on glass substrate 64, certain the second thin film transistor (TFT) 63 is also arranged at (not shown) on glass substrate 64, take the first film transistor 61 and resistor 62 be arranged at glass substrate 64 as example at this.
In addition,, shown in Fig. 1, the display panels 2 of the present embodiment, also has common electrode 7 and pixel electrode 8.And common electrode 7 is arranged between colored optical filtering substrates 4 and liquid crystal layer 5, pixel electrode 8 is arranged between liquid crystal layer 5 and thin film transistor base plate 6, and is electrically connected with the first drain D 1 of the first film transistor 61.
The first film transistor 61 of the present embodiment, in technologic structure, except having first grid G
1, the first source S
1and first drain D
1also there is first passage district CH outward,
1, it is arranged at the first source S
1with the first drain D
1between, and with first grid G
1corresponding.And thin film transistor base plate 6 also has insulation course 65, be arranged at first grid G
1with the first drain D
1, the first source S
1and first passage district CH
1between.
Shown in Fig. 1 and Fig. 3, the resistor 62 of the present embodiment, has the first crystal silicon layer 621 and the first metal layer 622 in technologic structure.And the first crystal silicon layer 621 is arranged on glass substrate 64.The first metal layer 622 is arranged on the first crystal silicon layer 621 and glass substrate 64, and there is opening 6221, the first electrical junction 6222 and the second electrical junction 6223, the first electrical junction 6222 and the second electrical junction 6223 are corresponding, 6221 of the openings of the first metal layer 622 are arranged between the first electrical junction 6222 and the second electrical junction 6223 and are corresponding with the first crystal silicon layer 621, and the first electrical junction 6222 drives loop DL to be electrically connected (not shown) with data line, the second electrical junction 6223 is electrically connected with the first source S 1 of the first film transistor 61.In the present embodiment, the material of the first crystal silicon layer 621 is polysilicon (polysilion), amorphous silicon (amorphous silicon), heavily doped amorphous silicon or heavily doped polysilicon in implementing upper, wherein heavily doped polysilicon can be the heavily doped polysilicon of N charge carrier or P charge carrier, heavily doped amorphous silicon can be the heavily doped amorphous silicon of N charge carrier, this take the first crystal silicon layer 621 material as polysilicon be example.
In addition, please refer to shown in Fig. 4, the structure of another resistor 62 of the present embodiment except having said structure (as shown in Figure 3),, outside the first crystal silicon layer 621 and the first metal layer 622, also has the second crystal silicon layer 623 in technique.The second crystal silicon layer 623 is arranged between the first metal layer 622 and the first crystal silicon layer 621, and corresponding with the opening 6221 of the first metal layer 622.In the present embodiment, the material of the second crystal silicon layer 623 is heavily doped amorphous silicon in implementing upper, for example: the heavily doped amorphous silicon of N charge carrier, now, the material of the first crystal silicon layer 621 be take amorphous silicon as example.
Shown in Fig. 5 A to Fig. 5 B, be the structure of the resistor 62 of a preferred embodiment again, and Fig. 5 A is the stereographic map of resistor 62, Fig. 5 B is the side cutaway view of Fig. 5 A; The resistor 62 of the present embodiment, except having above-mentioned the first crystal silicon layer 621 and the first metal layer 622 (as shown in Figure 3), also has the second metal level 624, insulation course 625 and the second crystal silicon layer 626.And the second metal level 624 is arranged between the first crystal silicon layer 621 and glass substrate 64, and there is opening 6241, the 3rd electrical junction 6242 and the 4th electrical junction 6243, the 3rd electrical junction 6242 is corresponding with the 4th electrical junction 6243, the opening 6241 of the second metal level 624 is arranged between the 3rd electrical junction 6242 and the 4th electrical junction 6243 and is corresponding with the first crystal silicon layer 621, and insulation course 625 is arranged between the second metal level 624 and the first crystal silicon layer 621, the second crystal silicon layer 626 has opening 6261, and be arranged between the first metal layer 622 and the first crystal silicon layer 621, 6261 of the openings of the second crystal silicon layer 626 are corresponding with the opening 6221 of the first metal layer 622, so that the first crystal silicon layer 621 parts are exposed.The material of the insulation course 625 of the present embodiment, can be on the implementation silicon nitride, and the material of the second crystal silicon layer 626 can be heavily doped amorphous silicon, i.e. the heavily doped amorphous silicon of N charge carrier, and the material of the first crystal silicon layer 621 be take amorphous silicon as example at this.
In sum, because of foundation a kind of liquid crystal indicator of the present invention, display panels and thin film transistor base plate, wherein thin film transistor base plate and data line drive loop and scanning line driving loop to be electrically connected, by resistor being electrically connected to data line, drive between loop and transistorized the first source electrode of the first film, and the transistorized first grid of the first film and scanning line driving loop are electrically connected.With known art, because the present invention utilizes increase resistor, and be electrically connected between data line driving loop and transistorized the first source electrode of the first film, this kind of mode, as long as data line drives loop to send into a signal value, just can produce another unlike signal value by resistor dividing potential drop, be that thin film transistor base plate has two unlike signal values simultaneously, so that liquid crystal has different inclination angles, and then reach reduction aberration, and can not be subject to the impact of the parasitic capacitance effect of thin film transistor (TFT), and control relatively easily common voltage.
The foregoing is only illustrative, but not be restricted person.Anyly do not depart from spirit of the present invention and category, and the equivalent modifications that it is carried out or change all should be contained in appended claim.
Claims (7)
1. a liquid crystal indicator, comprises display panels and backlight module, and this display panels has liquid crystal layer and is located between two substrates, and wherein a substrate is thin film transistor base plate, and this backlight module is arranged at a side of this display panels, wherein:
On this thin film transistor base plate, comprise that a plurality of data lines drive loop, a plurality of scanning line driving loops, the first film transistor, the second thin film transistor (TFT) and resistor, wherein this thin film transistor base plate and those data lines drive loop and those scanning line driving loops to be electrically connected;
This first film transistor has first grid, the first source electrode and the first drain electrode, and this first grid and those scanning line driving loops are electrically connected, and this first drain electrode is electrically connected a liquid crystal capacitance;
This second thin film transistor (TFT) has second grid, the second source electrode and the second drain electrode, and this second grid and those scanning line driving loops are electrically connected, and this second source electrode and those data lines drive loop to be electrically connected, and this second drain electrode is electrically connected another liquid crystal capacitance; And
This resistor is electrically connected at those data lines and drives between loop and transistorized this first drain electrode of this first film.
2. liquid crystal indicator as claimed in claim 1, wherein this thin film transistor base plate has glass substrate, and this first film transistor and this resistor are arranged on this glass substrate.
3. liquid crystal indicator as claimed in claim 1, wherein this thin film transistor base plate also comprises:
The first capacitor, is electrically connected between transistorized this first grid of this first film and this second drain electrode;
The second capacitor, is electrically connected with transistorized this first drain electrode of this first film.
4. liquid crystal indicator as claimed in claim 1, wherein this thin film transistor base plate also comprises:
The 4th capacitor, is electrically connected at this second grid and this second drain electrode of this second thin film transistor (TFT);
The 5th capacitor, is electrically connected at this second drain electrode of this second thin film transistor (TFT).
5. liquid crystal indicator as claimed in claim 2, wherein this resistor packages contains:
The first crystal silicon layer, is arranged on this glass substrate; And
The first metal layer, be arranged on this first crystal silicon layer and this glass substrate, and there is the first opening, the first electrical junction and the second electrical junction, this first electrical junction is corresponding with this second electrical junction, this first opening is arranged between this first electrical junction and the second electrical junction and is corresponding with this first crystal silicon layer, this first electrical junction and those data line drive circuits are electrically connected, and transistorized this first source electrode of this second electrical junction and this first film is electrically connected.
6. liquid crystal indicator as claimed in claim 5, wherein this resistor also comprises the second crystal silicon layer, be arranged between this first metal layer and this first crystal silicon layer, and corresponding with this first opening of this first metal layer.
7. liquid crystal indicator as claimed in claim 5, wherein this resistor also comprises the second metal level, is arranged between this first crystal silicon layer and this glass substrate, and has the second opening, the 3rd electrical junction and the 4th electrical junction; The 3rd electrical junction is corresponding with the 4th electrical junction; This second opening is arranged between the 3rd electrical junction and the 4th electrical junction, and corresponding with this first crystal silicon layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410052617.8A CN103744244A (en) | 2008-12-12 | 2008-12-12 | Liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410052617.8A CN103744244A (en) | 2008-12-12 | 2008-12-12 | Liquid crystal display device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200810186724.4A Division CN101750812B (en) | 2008-12-12 | 2008-12-12 | Liquid crystal display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103744244A true CN103744244A (en) | 2014-04-23 |
Family
ID=50501276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410052617.8A Pending CN103744244A (en) | 2008-12-12 | 2008-12-12 | Liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103744244A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016188036A1 (en) * | 2015-05-26 | 2016-12-01 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN107527584A (en) * | 2017-09-11 | 2017-12-29 | 京东方科技集团股份有限公司 | Driving method, image element circuit and the display device of image element circuit |
-
2008
- 2008-12-12 CN CN201410052617.8A patent/CN103744244A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016188036A1 (en) * | 2015-05-26 | 2016-12-01 | 京东方科技集团股份有限公司 | Array substrate and display device |
| US10078251B2 (en) | 2015-05-26 | 2018-09-18 | Boe Technology Group Co., Ltd. | Array substrate and display apparatus |
| RU2710381C2 (en) * | 2015-05-26 | 2019-12-26 | Боэ Текнолоджи Груп Ко., Лтд. | Matrix substrate and display device |
| CN107527584A (en) * | 2017-09-11 | 2017-12-29 | 京东方科技集团股份有限公司 | Driving method, image element circuit and the display device of image element circuit |
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Application publication date: 20140423 |