CN103731613A - DTMB receiving end achieving device and television system - Google Patents
DTMB receiving end achieving device and television system Download PDFInfo
- Publication number
- CN103731613A CN103731613A CN201310632011.7A CN201310632011A CN103731613A CN 103731613 A CN103731613 A CN 103731613A CN 201310632011 A CN201310632011 A CN 201310632011A CN 103731613 A CN103731613 A CN 103731613A
- Authority
- CN
- China
- Prior art keywords
- dtmb
- chip
- receiving terminal
- high pass
- host processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
The invention provides a DTMB receiving end achieving device. The DTMB receiving end achieving device comprises a high-pass main processor chip for sending a control instruction to a DTMB processing chip and controlling image display of a display device according to a received composite video broadcasting signal, and the DTMB processing chip for processing an input DTMB digital television signal according to the control instruction to obtain the composite video broadcasting signal and sending the obtained composite video broadcasting signal to the high-pass main processor chip. The DTMB receiving end achieving device does not depend on software decoding, so that a DTMB function can be achieved in a seamless mode. In addition, due to the fact that limitation of current relevant software deficiency is avoided, the decoding performance of the DTMB digital television signal can be improved. Furthermore, due to the fact that working amount of the high-pass main processor chip is decreased, the system occupation rate of the high-pass main processor chip can be reduced.
Description
Technical field
The present invention relates to digital television techniques field, relate in particular to a kind of DTMB receiving terminal implement device and apply the television system of this DTMB receiving terminal implement device.
Background technology
Because digital television system has significant advantage than the simulated television system than traditional, for example, easily realize high definition television, spectrum efficiency is high, anti-interference good, easy realization is encrypted, easily realize other supplementary service etc.; Thereby Digital Television is progressively replacing simulated television.
China has established Chinese terrestrial DTV national standard (GB20600-2006 in 2006, referred to as DTMB, full name is DigitalTelevisionTerrestrialMultimediaBroadcasting, DMB-ground national digital television broadcasting standard), and this standard is approved as mandatory national standards; For example, stipulate to rise for 2014,40 cun of all home sales must possess DTMB playing function on TV.
DTMB system mainly comprises DTMB transmitting terminal and the DTMB receiving terminal corresponding with DTMB transmitting terminal.In prior art, DTMB transmitting terminal realize principle as shown in fig. 1:
Data code flow process scrambler (randomization), the forward error correction coding of inputting, the constellation mapping of then carrying out flowing to from bit symbol stream form basic data block after interweaving; After basic data block and system information combination (multiplexing), through frame data processing, form frame; And frame is signal frame (framing) with corresponding frame head multiple connection, through baseband postprocessing, be converted to baseband output signal (in 8MHz bandwidth); Finally, baseband output signal is converted to radiofrequency signal through quadrature up-conversion.
Correspondingly, DTMB receiving terminal realize principle as shown in Figure 2:
Tuner is converted to digital intermediate frequency signal by the radiofrequency signal of antenna reception and inputs to demodulator, demodulator converts the digital intermediate frequency signal of reception to baseband signal, after necessary channel demodulation and decoding FEC etc. are processed, output TS stream (Transport Stream, transport stream) data are to high pass host processor chip, high pass host processor chip completes descrambling, demultiplexing and the MPEG-2 audio/video decoding of TS stream, and output sound vision signal is to video display module and audio processing modules.
At present, in DTMB receiving terminal, adopted the above-mentioned solution based on high pass host processor chip greatly, and it is also further being carried out and is implementing; H.264 solution based on high pass host processor chip can be supported MPEG-2, video and the audio frequency of multiple format such as, and function is more powerful comparatively speaking, has therefore obtained the favor of many Internet firms, network terminal manufacturer and traditional tv manufacturer.
But high pass host processor chip, when realizing DTMB function, has its intrinsic defect; For example, because do not support the AVS(Audio Video Coding Standard that China is exclusive, audio/video encoding standard) information source coding standard, therefore have to adopt the mode of software decode to be decoded; Need so ripe software decode scheme to carry out AVS decoding, and still relatively lack the software of this respect at present; Again for example, the calculation process ability of high pass host processor chip still has to be assessed to the decoding capability of HD video, and therefore the decoding performance of software decode may be outstanding not; Again for example, the application software based on high pass host processor chip is still inadequate to the supporting dynamics of digital television signal demultiplexing, causes the system of current high pass host processor chip to take larger etc.; Therefore, in general, in prior art, based on high pass host processor chip, still can not seamlessly realize DTMB function.
In view of this, a kind of DTMB receiving terminal implement device based on the seamless DTMB of the realization function of high pass host processor chip that can efficient quick urgently provides.
Summary of the invention
For the subproblem in background technology or whole issue, the invention provides a kind of DTMB receiving terminal implement device based on the seamless DTMB of the realization function of high pass host processor chip that can efficient quick; Further, the present invention also provides the television system of this DTMB receiving terminal implement device of a kind of application.
Particularly, described DTMB receiving terminal implement device, comprising:
High pass host processor chip, the composite video broadcast singal control display device receiving to described DTMB process chip and for basis for sending controling instruction carries out image demonstration;
DTMB process chip, for according to described control command, the DTMB digital television signal of input being processed and obtained composite video broadcast singal, and is sent to described high pass host processor chip by the composite video broadcast singal obtaining.
Described television system, comprises above-mentioned DTMB receiving terminal implement device.
From above technical scheme, the present invention is the DTMB process chip with high pass host processor chip communication interaction by independent setting, DTMB process chip is accepted the control of high pass host processor chip DTMB digital television signal is processed, and exports composite video broadcast singal and be sent to high pass host processor chip and realize the broadcasting of DTMB digital television signal; Like this, because being processes DTMB digital television signal by DTMB process chip, and needn't depend on software decode, therefore can seamlessly realize DTMB function, and owing to having avoided the restriction of current related software disappearance, therefore can promote the decoding performance for DTMB digital television signal; In addition, owing to having reduced the workload of high pass host processor chip, therefore can reduce the system of high pass host processor chip is taken.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is that in prior art, a kind of DTMB transmitting terminal is realized principle schematic;
Fig. 2 is that in prior art, a kind of DTMB receiving terminal is realized principle schematic;
Fig. 3 is the structural representation of DTMB receiving terminal implement device in one embodiment of the present invention;
Fig. 4 is the structural representation of DTMB receiving terminal implement device in another embodiment of the present invention.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment mono-
Fig. 3 is the structural representation of a kind of DTMB receiving terminal implement device of providing in the present embodiment, for convenience of explanation, only shows the part relevant to the present embodiment in figure.
The DTMB receiving terminal implement device providing in the present embodiment mainly comprises high pass host processor chip 12 and the DTMB process chip 11 of communication interaction; Wherein, high pass host processor chip 12 is mainly used in sending controling instruction to DTMB process chip 11 and for carrying out image demonstration according to the composite video broadcast singal control display device receiving; The control command that DTMB process chip 11 is mainly used in sending according to high pass host processor chip 12 is carried out processing such as demultiplexing, decoding the DTMB digital television signal of input, obtain composite video broadcast singal (Composite Video Broadcast Signal, be abbreviated as CVBS), and the composite video broadcast singal obtaining is sent to high pass host processor chip 12.
Be different from the solution based on high pass host processor chip in prior art, in the receiving terminal implement device providing at the present embodiment, DTMB process chip 11 is under the control of high pass host processor chip 12, the DTMB digital television signal receiving is processed, rather than it is at all levels to depend in high pass host processor chip 12 the Android system middleware of operation and upper application software etc., needn't depend on software decode, therefore can seamlessly realize DTMB function; And owing to having avoided on the one hand the restriction of current related software disappearance, also avoided being on the other hand limited to the calculation process ability of high pass host processor chip 12, therefore can promote the decoding performance for DTMB digital television signal; In addition, because high pass host processor chip 12 is main, be responsible for controlling display device and carry out image demonstration, and needn't DTMB digital television signal be processed, reduced the workload of high pass host processor chip 12, the system that therefore can reduce high pass host processor chip 12 takies, thereby make high pass host processor chip 12 bear more other tasks, this seems and is even more important for the user who often needs multitask running.
Embodiment bis-
Fig. 4 is the structural representation of a kind of DTMB receiving terminal implement device of providing in the present embodiment, for convenience of explanation, only shows the part relevant to the present embodiment in figure.
The DTMB receiving terminal implement device providing in the present embodiment mainly comprises high pass host processor chip 12 and the DTMB process chip 11 of communication interaction, certainly in addition, similar with DTMB receiving terminal implement device in prior art, can also comprise assemblies such as tuner 111, demodulator 112; Below each assembly of DTMB receiving terminal implement device in the present embodiment is described in detail respectively.
High pass host processor chip 12 is mainly used in sending controling instruction to DTMB process chip 11 and for carrying out image demonstration according to the composite video broadcast singal control display device receiving; High pass host processor chip 12 in the present embodiment can be high pass Snapdragon600MPQ8064 chip, and high pass Snapdragon600MPQ8064 chip is four core processors based on KraitARM framework; This chip is supported efficient video coding (High Efficiency Video Coding, is abbreviated as HEVC), can process 1080p high-definition signal; Although this chip is not supported ultra high-definition of future generation (Ultra High Definition, be abbreviated as UHD) signal, but compared with current standard, high efficiency video coding can carry out larger compression to media content, and supports the picture quality of more channel, faster downloading rate and Geng Gao; Hold intelligiblely, high pass host processor chip in the present embodiment 12 can also other models, for example, can also be high pass Snapdragon8060 double-core cpu chips etc.
The control command that DTMB process chip 11 is mainly used in sending according to high pass host processor chip 12 is carried out processing such as demultiplexing, decoding the DTMB digital television signal of input, obtain composite video broadcast singal, and the composite video broadcast singal obtaining is sent to high pass host processor chip 12; DTMB process chip 11 in the present embodiment can be Availink chip, can be also such as Hangzhou state die chip etc.; Certainly, DTMB process chip 11 also can be set separately according to demand; Exemplary, a kind of specific implementation of above-mentioned DTMB process chip 11 is provided in the present embodiment:
As shown in Figure 4, in this DTMB process chip 11, mainly comprise in turn demultiplexing unit 113, decoding unit 114 and video processing unit 115 of arranging etc.; Wherein, demultiplexing unit 113 is mainly used in to the digital television signal of input (now, digital television signal has been reduced to digital code stream) carry out demultiplexing processing, in the present embodiment, demultiplexing unit 113 can be multiplexed signals separator, and it is mainly used in isolating each railway digital code stream among multiplexing digital code stream and isolated each railway digital code stream is inputed to decoding unit 114; Decoding unit 114 is mainly used in digital code stream processings of decode of input, the useful signal of identification recovery from digital code stream, and formation anolog TV signals also input to video processing unit 115; The anolog TV signals that video processing unit 115 is mainly used in decoding unit 114 to export carry out reprocessing, in the present embodiment, video processing unit 115 can comprise image restitutor, difference vector reductor, residual error texture reductor, three-dimensional pattern selector etc., anolog TV signals, after reprocessing, form composite video broadcast singal and input to the main process chip of high pass.
For the AVS information source coding standard that can support that China is exclusive, in the present embodiment, decoding unit 114 preferably includes AVS decoder, thereby can utilize AVS decoder to realize AVS decoding capability; For example, AVS decoder can be AVS-P2 decoder, AVS-P7 decoder etc.; Certainly, decoding unit 114 can also comprise MPEG(Moving Pictures Experts Group, dynamic image expert group) decoder, thus can have AVS and mpeg decode ability concurrently; Mpeg decoder can be MPEG-2 decoder or MPEG-4 decoder etc.; Certainly, decoding unit 114 can also comprise the Coding such as AVC(Advanced Video, advanced video coding) decoder etc. supports the decoder of other coding standards.
Between DTMB process chip 11 and high pass host processor chip 12, carry out communication, must follow the command control word agreement of certain both sides' agreement; This agreement is for realizing both cooperative cooperatings, most important; In the present embodiment, can be, high pass host processor chip 12 according to default serial communication protocol to DTMB process chip 11 sending controling instructions; Exemplary, in the communication interface of high pass host processor chip 12 and DTMB process chip 11, be provided with asynchronous receiving-transmitting transmitter (Universal Asynchronous Receiver/Transmitter, be abbreviated as UART), be by UART bus, to be connected between high pass host processor chip 12 and DTMB process chip 11, high pass host processor chip 12 is passed through UART sending controling instruction to DTMB process chip 11; For example, first high pass host processor chip 12 writes the data of preparing to write DTMB process chip 11 in the register (interim memory block) of UART, then, by FIFO(First Input First Output, First Input First Output) be sent to DTMB process chip 11.Certainly, those skilled in the art easily expect, between high pass host processor chip 12 and DTMB process chip 11, can also, by any one or the multiple communication interaction of realizing in GPIO bus, I2C bus or spi bus, at this, not do particular determination.
Except said modules, similar with DTMB receiving terminal implement device in prior art, the DTMB receiving terminal implement device in the present embodiment can also comprise the demodulator 112 being connected with demultiplexing unit 113 and the tuner 111 being connected with demodulator 112 etc.
Wherein, tuner 111 can be digital analog integrated tuner, and for example this digital analog integrated tuner can be the DM17WS-2-E that TCL company produces, and wherein integrated analog signal processing chip is analog signal demodulation chip Si2176; Like this, can to the anolog TV signals of input, process by digital analog integrated tuner, also can carry out preliminary treatment to DTMB TV signal, for example, the DTMB processing television signals of input be become to digital intermediate frequency signal, thereby be convenient to subsequent treatment; Again for example, this digital analog integrated tuner can also be BLH-DBT-702 of Bethlehem company production etc.
Wherein, the LGS-8G42 that demodulator 112 can select ice flood science and technology to produce, this demodulator 112 is supported single carrier and two kinds of patterns of multicarrier, supports DTMB standard comprehensively; The digital intermediate frequency signal that demodulator 112 receiver turnings 111 are exported, then converts thereof into baseband signal, and after necessary channel demodulation and decoding FEC etc. are processed, output TS parallel or serial flows; In addition, this demodulator 112 can also utilize inner automatic gain control module output signal to control the gain of the inner intermediate frequency amplifier of digital analog integrated tuner, and the power of exporting digital intermediate frequency signal is in a certain specific scope; Certainly, demodulator 112 can also be selected LGS-8GL5 and LGS-8G75 etc.
In actual use, DTMB TV signal is after the processing of digital analog integrated tuner, output digital intermediate frequency signal is to demodulator 112, by demodulator 112, convert the digital intermediate frequency signal of reception to baseband signal, through system synchronization, signal demodulation, Fourier inversion, after the channel demodulation of discrete fourier inverse transformation and necessity and decoding FEC etc. are processed, output serial or parallel TS flow to DTMB process chip 11, high pass host processor chip 12 sending controling instructions are to DTMB process chip 11, the control command that DTMB process chip 11 sends according to high pass host processor chip 12, TS stream to input completes descrambling by demultiplexing unit 113 in DTMB process chip 11, demultiplexings etc. are processed rear output multi-channel digital code stream to decoding unit 114, by decoding unit 114, the digital code stream of input is carried out to AVS or MPEG-2 audio/video decoding, output anolog TV signals are to video processing unit 115, anolog TV signals are through the reprocessing of video processing unit 115, form composite video broadcast singal and input to high pass host processor chip 12, high pass host processor chip 12 is carried out image demonstration according to the composite video broadcast singal control display device receiving.
A kind of television system is also provided in the present embodiment; This television system comprises above-mentioned DTMB receiving terminal implement device; In addition, can also comprise display device, audio-frequence player device etc.; High pass host processor chip is carried out the CVBS signal receiving, after the processing such as analog-to-digital conversion, decoding convergent-divergent, to export vision signal to display device to show, is exported audio signal to audio-frequence player device to play; Wherein, display device can be liquid crystal display, OLED(Organic LightEmitting Diode, Organic Light Emitting Diode) display device, plasma display panel device etc.
In sum, DTMB process chip by independent setting in the present invention is processed DTMB digital television signal, and needn't depend on software decode, therefore can seamlessly realize DTMB function, and owing to having avoided the restriction of current related software disappearance, therefore can promote the decoding performance for DTMB digital television signal; In addition, owing to having reduced the workload of high pass host processor chip, therefore can reduce for the system of high pass host processor chip and take.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, be equal to replacement, improvement etc., within all should being included in the scope of protection of the invention.
Claims (10)
1. a DTMB receiving terminal implement device, is characterized in that, comprising:
High pass host processor chip, the composite video broadcast singal control display device receiving to described DTMB process chip and for basis for sending controling instruction carries out image demonstration;
DTMB process chip, for according to described control command, the DTMB digital television signal of input being processed and obtained composite video broadcast singal, and is sent to described high pass host processor chip by the composite video broadcast singal obtaining.
2. a DTMB receiving terminal implement device according to claim 1, is characterized in that, described DTMB process chip comprises the demultiplexing unit, decoding unit and the video processing unit that arrange in turn;
Described demultiplexing unit, for carrying out demultiplexing processing to the digital television signal of input;
Described decoding unit, for output anolog TV signals after the digital television signal decoding to demultiplexing;
Described video processing unit, for exporting composite video broadcast singal according to described anolog TV signals.
3. a DTMB receiving terminal implement device according to claim 2, is characterized in that, described decoding unit comprises AVS decoder.
4. a DTMB receiving terminal implement device according to claim 3, is characterized in that, described DTMB process chip is Availink chip.
5. one kind according to the DTMB receiving terminal implement device described in claim 1-4 any one, it is characterized in that, in the communication interface of described high pass host processor chip and DTMB process chip, be provided with asynchronous receiving-transmitting transmitter, described high pass host processor chip is by extremely described DTMB process chip of described asynchronous receiving-transmitting transmitter sending controling instruction.
6. a DTMB receiving terminal implement device according to claim 5, is characterized in that, described high pass host processor chip according to default serial communication protocol to described DTMB process chip sending controling instruction.
7. a DTMB receiving terminal implement device according to claim 5, is characterized in that, between described high pass host processor chip and DTMB process chip by any one or the multiple communication interaction of realizing in GPIO bus, I2C bus or spi bus.
8. a DTMB receiving terminal implement device according to claim 2, is characterized in that, also comprises the demodulator being connected with described demultiplexing unit.
9. a DTMB receiving terminal implement device according to claim 8, is characterized in that, also comprises the digital analog integrated tuner being connected with described demodulator.
10. a television system, is characterized in that, comprises according to the DTMB receiving terminal implement device described in claim 1-9 any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310632011.7A CN103731613A (en) | 2013-11-29 | 2013-11-29 | DTMB receiving end achieving device and television system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310632011.7A CN103731613A (en) | 2013-11-29 | 2013-11-29 | DTMB receiving end achieving device and television system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103731613A true CN103731613A (en) | 2014-04-16 |
Family
ID=50455523
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310632011.7A Pending CN103731613A (en) | 2013-11-29 | 2013-11-29 | DTMB receiving end achieving device and television system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103731613A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109246485A (en) * | 2018-10-17 | 2019-01-18 | 广东省南方数字电视无线传播有限公司 | Programme televised live signal transmitting method and system based on DTMB |
-
2013
- 2013-11-29 CN CN201310632011.7A patent/CN103731613A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109246485A (en) * | 2018-10-17 | 2019-01-18 | 广东省南方数字电视无线传播有限公司 | Programme televised live signal transmitting method and system based on DTMB |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP2355413B1 (en) | Cable set-top box with integrated cable tuner and MOCA support | |
| JP2006135987A (en) | Digital broadcasting data providing apparatus and method using wireless lan, and wireless terminal device | |
| KR101614862B1 (en) | Transmitting and receiving method of multimedia video data and corresponding device | |
| US12113994B2 (en) | Video decoder chipset | |
| CN103024441A (en) | Method for playing television programs by mobile terminal | |
| CN108965953A (en) | It is a kind of to receive DVB-C and DTMB simple two-way signal set-top-box system and method simultaneously | |
| CN103731613A (en) | DTMB receiving end achieving device and television system | |
| WO2017128622A1 (en) | Digital television and signal processing apparatus thereof | |
| CN107948701A (en) | A kind of intelligent transmitting device for digital television signal transmission | |
| US20110055888A1 (en) | Configurable television broadcast receiving system | |
| CN218006426U (en) | AVS2 ultra-high-definition network video and audio professional decoder | |
| CN204795442U (en) | Digital television receiving equipment | |
| CN112055228A (en) | Line card equipment supporting live broadcast of 4K or 8K television and application system thereof | |
| CN200990649Y (en) | Digital mobile television integrated machine | |
| CN210629669U (en) | Intelligent digital television | |
| EP2290942B1 (en) | A method and system for delivery of data to an end user | |
| CN101742141A (en) | Device and method for receiving and playing digital television signal and television set | |
| CN112383816A (en) | ATSC system signal analysis method and system based on android system intervention | |
| CN110312158B (en) | Embedded multi-picture monitoring method and device | |
| CN201018597Y (en) | Bidirectional multi-function chip | |
| CN208112821U (en) | A kind of top box of digital machine and data transmission system | |
| CN206602604U (en) | A kind of monitoring system of energy continuous presence coding | |
| TWI419074B (en) | Processing apparatus and processing method for digital television | |
| CN201479266U (en) | TV signal receiving and processing circuit and integrated digital TV set | |
| JP2011004064A (en) | Broadcasting receiving device and broadcasting switching control method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20140416 |