CN103731055A - Simplified three-level space vector modulation method - Google Patents
Simplified three-level space vector modulation method Download PDFInfo
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- CN103731055A CN103731055A CN201410024246.2A CN201410024246A CN103731055A CN 103731055 A CN103731055 A CN 103731055A CN 201410024246 A CN201410024246 A CN 201410024246A CN 103731055 A CN103731055 A CN 103731055A
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Abstract
The invention discloses a simplified three-level space vector modulation method. The method comprises the following steps of (1) obtaining a reference voltage synthesizing vector according to the three-phase voltage of a control system; (2) determining a large sector which the reference voltage synthesizing vector belongs to; (3) determining a small sector which the reference voltage synthesizing vector belongs to (4) calculating the action time of the reference voltage synthesizing vector in the small sector; (5) arranging the switching sequence of every vector in the small sector which the reference voltage synthesizing vector; (6) calculating the duty ratio according to the switching sequence. According to the simplified three-level space vector modulation method, by deprecating 6 large vectors and dividing voltage vector space through the other 21 fundamental space vectors, the quantity of the voltage vectors and sectors can be reduced, the space complexity can be reduced, the algorithm running time can be effectively shortened, the running efficiency can be improved and popularization and application of the three-level space vector modulation technology can be facilitated.
Description
Technical field
The invention belongs to electric and electronic technical field, relate to a kind of 3 level space vector modulator approach.
Background technology
For three-phase inverter, conventional modulator approach mainly contains SPWM Technique SPWM and space vector pulse width modulation SVPWM.SPWM technology be by pulse duration, by sinusoidal rule, change and and the break-make of switching device in the PWM waveform control of inverter circuit of sinusoidal wave equivalence, simply effective, easily realize; SVPWM technology is to do suitable switching according to the different switching modes of three-phase inverter, thereby form PWM ripple, make formed actual flux linkage vector follow the trail of its accurate magnetic linkage circle, need extra computing time, but can improve the utilance of DC bus-bar voltage, in electric machine speed regulation field, be widely used especially.According to space vector pulse width modulation, reference vector can be synthesized by fundamental space vector arbitrarily.In order to reduce switching frequency and switching loss, reduce the harmonic content of output voltage vector simultaneously, general employing nearest three fundamental space vectors adjacent with reference vector synthesize.
In three-level inverter, generally vector space is divided into 6 large sectors, each large sector is divided into again 4 little sectors, has formed 24 fundamental triangle regions, and each delta-shaped region consists of three fundamental space vectors.So just have 27 fundamental space vectors, according to the length of space vector, can be divided into: large vector, middle vector, small vector and zero vector.The length of large vector is 2/3V
dc, have altogether 6; The length of middle vector is
, have altogether 6; The length of small vector is 1/3V
dc, have altogether 12; Zero vector length is 0, amounts to 3.
More common problem of three-level inverter: all pressures of DC bus capacitor.When DC capacitor voltage, all press failure, can affect output voltage waveforms, in serious situation, will damage device for power switching.Research and analyse and show: large vector zero vector can not cause DC capacitor voltage imbalance, but middle vector small vector will cause that DC capacitor voltage is unbalanced, and small vector is contrary to the effect of capacitance voltage in pairs.Therefore, existing space vector modulating method is mainly the equilibrium that realizes capacitance voltage by being controlled to right small vector.In fact, large vector neither affects the equilibrium of DC capacitor voltage, does not restrict again the utilance of direct voltage, little to whole control action, has increased on the contrary the complexity in space.
Summary of the invention
Technical problem: in order to overcome the shortcoming of above-mentioned prior art, the invention provides a kind of can impact and control effect, effectively reduce vector, reduced the 3 level space vector modulator approach of the simplification of space complexity.
Technical scheme: the 3 level space vector modulator approach of a kind of simplification of the present invention, comprises the following steps:
(1) according to the three-phase voltage of control system, obtain reference voltage resultant vector;
(2) judge the large sector of space vector at reference voltage resultant vector place, the large sector of space vector is after 6 large vectors in three dimensional vector diagram are abandoned, and with remaining 21 vectors, divides and obtains;
(3) judge the little sector of space vector at reference voltage resultant vector place, after the large vector of large sector, Shi Jiang place, the little sector of space vector is abandoned, with remaining vector, divide and to obtain;
(4) action time of three fundamental space vectors in the little sector of computing reference voltage resultant vector place space vector;
(5) on off sequence of three fundamental space vectors in the arrangement little sector of space vector, reference voltage resultant vector place;
(6) according to the on off sequence computed duty cycle arranging in step (5), the then driving signal using duty ratio as power device.
In the step (2) of the inventive method, the large sector of space vector is divided and is obtained as follows:
(A) abandon 6 large vectors in three dimensional vector diagram, obtain remaining 21 voltage vectors, be respectively 3 zero vectors, 12 small vectors and 6 middle vectors;
(B) 6 large vectors based on abandoning in step (A) find two adjacent nearest middle vectors of each large vector of abandoning from three dimensional vector diagram;
(C) obtain as follows the large sector of all space vectors: the large vector of abandoning is adjacent to two nearest middle vectors and connects, two middle vectors of zero vector in three dimensional vector diagram and this are connected, and the region surrounding is a large sector of space vector;
In the step (3) of the inventive method, the little sector of space vector is divided and is obtained as follows:
(a) find the small vector comprising in the large sector of each space vector;
(b) in the large sector of each space vector, small vector is connected with zero vector and two middle vectors respectively, three regions that large space vector sector is split to form are the little sector in the large sector of three dimensional vector diagram.
Beneficial effect: compared with prior art, the present invention has the following advantages:
1. the 3 level space vector modulator approach of a kind of simplification provided by the present invention, when having overcome traditional 3 level space vector modulator approach and judging little sector, owing to adopting trigonometric function, judges more complicated, the problem that time delay is larger.When method provided by the present invention judges little sector, first 3 level space vector is transformed into two level space vectors, then in the two level conditions little sector that judges, the determination methods that now adopted with judge that large sector method is consistent, after being transformed into like this under two level conditions, evaluation algorithm that need not be extra, thus deterministic process simplified, improved reliability; Determination methods only has arithmetic simultaneously, does not exist trigonometric function to calculate, and has reduced computation delay, has improved real-time; Last because fundamental space vector also calculates action time under two level conditions, so can directly calculate the action time of fundamental space vector, need not repeat conversion, thereby further reduce the algorithm time.
2. the 3 level space vector modulator approach of a kind of simplification provided by the present invention, has solved the problem of the more and subregion complexity of traditional 3 level space vector modulator approach vector.There are 27 kinds of basic voltage vectors in tradition 3 level space vector modulator approach, be respectively 3 zero vectors, 12 small vectors, 6 large vectors of 6 middle vectors, generally that space vector of voltage is divided into 6 large sectors, each large sector is divided into again 4 little sectors, 24 fundamental triangle regions have been formed, each delta-shaped region consists of three fundamental space vectors, method provided by the present invention, consider that large vector neither affects the equilibrium of DC capacitor voltage, do not restrict again the utilance of direct voltage, after 6 large vectors are abandoned, utilizing 21 fundamental space vectors of residue is 6 large sectors again by voltage vector spatial division, each large sector is divided into 3 little sectors, 18 polygonal regions have been formed, so not only can not affect the effect of control system, but also can effectively reduce the quantity of voltage vector and sector, reduce space complexity, reduce Riming time of algorithm, improve operational efficiency, be conducive to applying of 3 level space vector modulation technique.
Accompanying drawing explanation
Fig. 1 is the space vector of voltage block plan of the inventive method.
Fig. 2 is conventional voltage space vector block plan.
Fig. 3 is the large sector of the I transition diagram of the inventive method.
Fig. 4 is the large sector of the I on off sequence figure of the inventive method, and wherein Fig. 4 (a) is the little sector on off sequence figure of the large sector of I I 1, and Fig. 4 (b) is the little sector on off sequence figure of the large sector of I I 2, and Fig. 4 (c) is the large sector of I I
3little sector on off sequence figure.
Fig. 5 is three-level inverter structure chart.
In figure, have: zero vector V
z, the first small vector V
s1, the second small vector V
s2, the 3rd small vector V
s3, the 4th small vector V
s4, the 5th small vector V
s5, the 6th small vector V
s6, vector V in first
m1, vector V in second
m2, vector V in the 3rd
m3, vector V in the 4th
m4, vector V in the 5th
m5, vector V in the 6th
m6, first vector V
l1, second largest vector V
l2, the third-largest vector V
l3, the fourth-largest vector V
l4, the fifth-largest vector V
l5, the sixth-largest vector V
l6, vector V after zero vector conversion
4, vector V after the first small vector conversion
0, vector V after vector conversion in first
2, vector V after vector conversion in the 6th
6, reference voltage resultant vector V
ref, the reference voltage resultant vector V after conversion
ref1.
Embodiment
Below in conjunction with Figure of description and embodiment, the present invention is further described.
The 3 level space vector modulator approach of simplification of the present invention, consider that large vector neither affects the equilibrium of DC capacitor voltage, do not restrict again the utilance of direct voltage, therefore consider to be removed, so not only can not affect control effect, and reduce space complexity.Fig. 1 is the space vector of voltage block plan of the inventive method, Fig. 2 is conventional voltage space vector block plan, comparison diagram 1 and Fig. 2 are known: the 3 level space vector modulator approach of a kind of simplification provided by the present invention makes effective vector reduce to 21 from 27, effective coverage reduces to 18 from 24, reduced space complexity, be conducive to applying of 3 level space vector modulation technique, the method mainly comprises the following steps:
(1) according to the three-phase voltage of control system, obtain reference voltage resultant vector;
(2) judge the large sector of space vector at reference voltage resultant vector place, the large sector of space vector is after 6 large vectors in three dimensional vector diagram are abandoned, and with remaining 21 vectors, divides and obtains;
(3) judge the little sector of space vector at reference voltage resultant vector place, after the large vector of large sector, Shi Jiang place, the little sector of space vector is abandoned, with remaining vector, divide and to obtain;
(4) action time of three fundamental space vectors in the little sector of computing reference voltage resultant vector place space vector;
(5) on off sequence of three fundamental space vectors in the arrangement little sector of space vector, reference voltage resultant vector place;
(6) according to the on off sequence computed duty cycle arranging in step (5), the then driving signal using duty ratio as power device.
The large sector of space vector in step (2) is divided and is obtained as follows:
(A) abandon 6 large vectors in three dimensional vector diagram, obtain remaining 21 voltage vectors, be respectively 3 zero vectors, 12 small vectors and 6 middle vectors, wherein 3 zero vectors overlap on locus, 12 small vectors overlap between two on locus, formed the vector pair mutually opposing on 6 groups of locus, 6 middle vectors are separate on locus;
(B) 6 large vectors based on abandoning in step (A) find two adjacent nearest middle vectors of each large vector of abandoning from three dimensional vector diagram;
(C) obtain as follows the large sector of all space vectors: the large vector of abandoning is adjacent to two nearest middle vectors and connects, two middle vectors of zero vector in three dimensional vector diagram and this are connected, and the region surrounding is a large sector of space vector.
The large sector of three dimensional vector diagram division result is: the large sector of three dimensional vector diagram I is by zero vector V
z, vector V in first
m1, first vector V
l1with the 6th in vector V
m6the sealing quadrilateral area forming; The large sector of three dimensional vector diagram II is by zero vector V
z, vector V in second
m2, second largest vector V
l2with first in vector V
m1the sealing quadrilateral area forming; The large sector of three dimensional vector diagram III is by zero vector V
z, vector V in the 3rd
m3, the third-largest vector V
l3with second in vector V
m2the sealing quadrilateral area forming; The large sector of three dimensional vector diagram IV is by zero vector V
z, vector V in the 4th
m4, the fourth-largest vector V
l4with the 3rd in vector V
m3the sealing quadrilateral area forming; The large sector of three dimensional vector diagram V is by zero vector V
z, vector V in the 5th
m5, the fifth-largest vector V
l5with the 4th in vector V
m4the sealing quadrilateral area forming; The large sector of three dimensional vector diagram VI is by zero vector V
z, vector V in the 6th
m6, the sixth-largest vector V
l6with the 5th in vector V
m5the sealing quadrilateral area forming.
The little sector of space vector in step (3) is divided and is obtained as follows:
(a) find the small vector comprising in the large sector of each space vector;
(b) in the large sector of each space vector, small vector is connected with zero vector and two middle vectors respectively, three regions that large space vector sector is split to form are the little sector in the large sector of three dimensional vector diagram.
The little sector of three dimensional vector diagram division result is: the large sector of three dimensional vector diagram I I
1little sector is by the first small vector V
s1, measure V in first
m1, first vector V
l1with the 6th in vector V
m6the sealing quadrilateral area forming, I
2little sector is by zero vector V
z, vector V in first
m1with the first small vector V
s1the sealing delta-shaped region forming, I
3little sector is by zero vector V
z, the first small vector V
s1with the 6th in vector V
m6the sealing delta-shaped region forming; The large sector of three dimensional vector diagram II II
1little sector is by the second small vector V
s2, measure V in second
m2, second largest vector V
l2with first in vector V
m1the sealing quadrilateral area forming, II
2little sector is by zero vector V
z, vector V in second
m2with the second small vector V
s2the sealing delta-shaped region forming, II
3little sector is by zero vector V
z, the second small vector V
s2with first in vector V
m1the sealing delta-shaped region forming; The large sector of three dimensional vector diagram III III
1little sector is by the 3rd small vector V
s3, measure V in the 3rd
m3, the third-largest vector V
l3with second in vector V
m2the sealing quadrilateral area forming, III
2little sector is by zero vector V
z, vector V in the 3rd
m3with the 3rd small vector V
s3the sealing delta-shaped region forming, III
3little sector is by zero vector V
z, the 3rd small vector V
s3with second in vector V
m2the sealing delta-shaped region forming; The large sector of three dimensional vector diagram IV IV
1little sector is by the 4th small vector V
s4, measure V in the 4th
m4, the fourth-largest vector V
l4with the 3rd in vector V
m3the sealing quadrilateral area forming, IV
2little sector is by zero vector V
z, vector V in the 4th
m4with the 4th small vector V
s4the sealing delta-shaped region forming, IV
3little sector is by zero vector V
z, the 4th small vector V
s4with the 3rd in vector V
m3the sealing delta-shaped region forming; The large sector of three dimensional vector diagram V V
1little sector is by the 5th small vector V
s5, measure V in the 5th
m5, the fifth-largest vector V
l5with the 4th in vector V
m4the sealing quadrilateral area forming, V
2little sector is by zero vector V
z, vector V in the 5th
m5with the 5th small vector V
s5the sealing delta-shaped region forming, V
3little sector is by zero vector V
z, the 5th small vector V
s5with the 4th in vector V
m4the sealing delta-shaped region forming; The large sector of three dimensional vector diagram VI VI
1little sector is by the 6th small vector V
s6, measure V in the 6th
m6, the sixth-largest vector V
l6with the 5th in vector V
m5the sealing quadrilateral area forming, VI
2little sector is by zero vector V
z, vector V in the 6th
m6with the 6th small vector V
s6the sealing delta-shaped region forming, VI
3little sector is by zero vector V
z, the 6th small vector V
s6with the 5th in vector V
m5the sealing delta-shaped region forming.
The idiographic flow that step (1) obtains reference voltage resultant vector according to the three-phase voltage of control system is:
According to following formula by a, b, c three-phase reference voltage is transformed into α β coordinate system:
In formula, v
afor a phase reference voltage, v
bfor b phase reference voltage, v
cfor c three-phase reference voltage, v
αfor the component of reference voltage resultant vector on α axle, v
βfor the component of reference voltage resultant vector on β axle.
Step (2) judges the large sector of space vector at reference voltage resultant vector place.
Judge as follows the large sector of space vector at reference voltage resultant vector place:
Work as v
av
bv
c>=0, A=1; Work as v
av
bv
c<0, A=0;
Work as v
a>=0, B=1; Work as v
a<0, B=0;
Work as v
b>=0, C=1; Work as v
b<0, C=0.
Make N=4A+2B+C, then according to the mapping table of following large sector S and N, determine the large sector of space vector at place:
The corresponding relation of the large sector S of table 1 and N
Step (3) judges the little sector of space vector at reference voltage resultant vector place.
First by three-phase reference voltage (v
a, v
b, v
c) carry out coordinate transform, obtain new three-phase reference voltage (v
a1, v
b1, v
c1), transformation for mula is:
(v
al,v
b1,v
c1)=(v
a,v
b,v
c)-(v
a0,v
b0,v
c0)(2)
In formula, v
a1for a phase reference voltage after Coordinate Conversion, v
b1for b phase reference voltage after Coordinate Conversion, v
c1for c three-phase reference voltage after Coordinate Conversion, (v
a0, v
b0, v
c0) numerical value as shown in the table:
Table 2(v
a0, v
b0, v
c0) numerical value
Then by the three-phase reference voltage (v after Coordinate Conversion
a1, v
b1, v
c1) be transformed under α β coordinate system, obtain the reference voltage (v under α β coordinate system
α 1, v
β 1), and order:
Work as v
1>=0, a=1; Work as v
1<0, a=0;
Work as v
2>=0, b=1; Work as v
2<0, b=0;
Work as v
3>=0, c=1; Work as v
3<0, c=0;
Make n=a+2b+4c, the corresponding relation that can obtain m and n is as shown in the table.
The corresponding relation of table 3m and n
The large sector S of last basis and m can judge the little sector s in resultant vector place:
The little sector s in table 4 resultant vector place
In summary, show the passable large sector S that obtains, the functional relation of m and little sector s:
Work as m=S||m=S+5||m=S-1, s=1;
Work as m=S+2||m=S+1||m=S-4||m=S-5, s=2;
Work as m=S+4||m=S+3||m=S-2||m=S-3, s=3;
The action time of three fundamental space vectors in the little sector of space vector, step (4) computing reference voltage resultant vector place.First by following formula by other sector rotation transformations to the large sector of I:
θ
1=θ-Sπ/3 (4)
In formula, θ is the actual argument of reference voltage resultant vector, θ
1for being transformed into the argument behind the large sector of I.
Then according to volt-second characteristic, reference voltage resultant vector adopts three fundamental space vectors of little sector, place to synthesize.Fig. 3 is the large sector of the present invention's I transition diagram, with the I of the large sector of I
1little sector is that example is carried out analytic explanation, and this sector adopts vector (V
m1, V
s1, V
m6) carry out synthesized reference voltage vector (V
ref=v
α+ j
v β).First by large I sector fundamental space vector (V
z, V
m1, V
s1, V
m6) deduct vector the first small vector V
s1(V
dc/ 3 ,-V
dc/ 6 ,-V
dc/ 6) obtain new space vector (V
4, V
2, V
0, V
6), new reference voltage vector is (V
ref1=v
α 1+ j
v β 1); Adopt new space vector (V
2, V
0, V
6) synthetic new reference voltage vector V
ref1, action time that can computer memory vector:
In formula, T
afor space vector V
2action time, T
bfor space vector V
0action time, T
cfor space vector V
6action time.
By known fundamental voltage space vector (V
2, V
0, V
6) expression formula above substitution, can obtain T
a, T
b, T
c.
In like manner can obtain reference voltage vector in the large sector of I I
2and I
3the action time of little sector:
The action time of the large sector of table 5 I resultant vector
The space vector action time that upper table is the large sector of I, in like manner can obtain action time of other large sectors.
Step (5) arranges the on off sequence of three fundamental space vectors in the little sector of space vector, reference voltage resultant vector place.Mainly according to following two principles, arrange on off sequence:
Principle one: reduce as far as possible the on-off times of power device, only have as far as possible an action mutually at every turn, avoid the conversion between same phase upper and lower bridge arm;
Principle two: make as far as possible the equilibrium of each phase power switch bear load.
The large sector of table 6 I on off sequence arranges
Upper table is the on off sequence of the large sector of I, in like manner can obtain the on off sequence of other large sectors.
Step (6) is according to the on off sequence computed duty cycle arranging in step (5), the then driving signal using duty ratio as power device.
Fig. 4 (a) and (b), (c) are respectively the large sector of I I
1, I
2and I
3the on off sequence figure of three little sectors, according to the large sector of I I
1the on off sequence figure of little sector can calculate each phase duty ratio:
Fig. 5 is three-level inverter structure chart, according to three-level inverter structure and above formula, can obtain the each duty ratio of each switch mutually of three level, and following table is I
1the each duty ratio of each switch mutually in little sector.
Table 7 I
1the each duty ratio of each switch mutually in little sector
In table, Ton
a1for three-level inverter power switch S
a1duty ratio, Ton
a2for three-level inverter power switch S
a2duty ratio, Ton
a3for three-level inverter power switch S
a3duty ratio, Ton
a4for three-level inverter power switch S
a4duty ratio, Ton
b1for three-level inverter power switch S
b1duty ratio, Ton
b2for three-level inverter power switch S
b2duty ratio, Ton
b3for three-level inverter power switch S
b3duty ratio, Ton
b4for three-level inverter power switch S
b4duty ratio, Ton
c1for three-level inverter power switch S
c1duty ratio, Ton
c2for three-level inverter power switch S
c2duty ratio, Ton
c3for three-level inverter power switch S
c3duty ratio, Ton
c4for three-level inverter power switch S
c4duty ratio.
According to above step, in like manner can obtain the each duty ratio of each power switch mutually in other sectors.
The 3 level space vector modulator approach of a kind of simplification provided by the present invention, abandon 6 large vectors, neither affect the equilibrium of DC capacitor voltage, do not restrict again the utilance of direct voltage, and make the effective vector in space reduce to 21 from 27, effectively vector area reduces to 18 from 24, reduced space complexity, reduce Riming time of algorithm, improved operational efficiency, be conducive to applying of 3 level space vector modulation technique.
Claims (2)
1. a 3 level space vector modulator approach for simplification, is characterized in that, the method comprises the following steps:
(1) according to the three-phase voltage of control system, obtain reference voltage resultant vector;
(2) judge the large sector of space vector at described reference voltage resultant vector place, the large sector of described space vector is after 6 large vectors in three dimensional vector diagram are abandoned, and with remaining 21 vectors, divides and obtains;
(3) judge the little sector of space vector at described reference voltage resultant vector place, after the large vector of large sector, Shi Jiang place, the little sector of described space vector is abandoned, with remaining vector, divide and to obtain;
(4) calculate action time of three fundamental space vectors in the little sector of space vector, described reference voltage resultant vector place;
(5) arrange the on off sequence of three fundamental space vectors in the little sector of space vector, described reference voltage resultant vector place;
(6) according to the on off sequence computed duty cycle arranging in described step (5), the then driving signal using duty ratio as power device.
2. the 3 level space vector modulator approach of a kind of simplification according to claim 1, is characterized in that, the large sector of space vector in described step (2) is divided and obtained as follows:
(A) abandon 6 large vectors in described three dimensional vector diagram, obtain remaining 21 voltage vectors, be respectively 3 zero vectors, 12 small vectors and 6 middle vectors;
(B) 6 large vectors based on abandoning in described step (A) find two adjacent nearest middle vectors of each large vector of abandoning from three dimensional vector diagram;
(C) obtain as follows the large sector of all space vectors: the large vector of abandoning is adjacent to two nearest middle vectors and connects, two middle vectors of zero vector in three dimensional vector diagram and this are connected, and the region surrounding is a large sector of space vector;
The little sector of space vector in described step (3) is divided and is obtained as follows:
(a) find the small vector comprising in the large sector of each space vector;
(b) in the large sector of each space vector, small vector is connected with zero vector and two middle vectors respectively, three regions that large space vector sector is split to form are the little sector in the large sector of three dimensional vector diagram.
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CN105450067A (en) * | 2014-08-18 | 2016-03-30 | 珠海格力电器股份有限公司 | Method for determining sectors in three-level inverter SVPWM control |
CN104702140A (en) * | 2015-03-20 | 2015-06-10 | 山东大学 | Parallel circulating-current restraining and neutral-point balancing method of T-type three-level photovoltaic grid-connected inverter |
CN105356775A (en) * | 2015-11-23 | 2016-02-24 | 深圳市海亿达能源科技股份有限公司 | Method and device for modulating three-level inverter SVPWM |
WO2020082762A1 (en) * | 2018-10-22 | 2020-04-30 | 山东大学 | Pwm method, modulator and system for three-level rectifier suppressing common mode voltage |
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