CN103729867A - Hardware accelerator based on BP back-projection imaging algorithm and data processing method - Google Patents
Hardware accelerator based on BP back-projection imaging algorithm and data processing method Download PDFInfo
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Abstract
The invention relates to a hardware accelerator based on a BP back-projection imaging algorithm. The hardware accelerator comprises a pulse storage used for storing a large amount of pulse data, an image data storage module which comprising at least two continuous image data storages used for storing source data and result data around every back-projection operation, a back-projection operation unit used for conducting back-projection operation to achieve a delaying adjusting and coherent accumulation function and an AHB connector used for integrating the pulse storages, the image data storages and the back-projection operation units to finish information interaction among the pulse storages, the image data storages and the AHB bus. The hardware accelerator has the advantages of adopting fixed points with proper bit wide to replace double-accuracy floating points commonly used to conduct calculation, operation errors and logic resource use are reduced, and phase error is reduced from 11.25 degrees to 1.4 degree. A back-projection imaging data processing method is provided to achieve seamless joint of assembly lines, the high data throughput rate is obtained, and the parallelization of algorithm is effectively achieved.
Description
Technical field
The present invention relates to computerized tomography technology, relate in particular to a kind of hardware accelerator and data processing method based on BP back projection imaging algorithm.
Background technology
Back-projection algorithm (BPA:Back-Projection Algorithm) comes from computerized tomography technology.BP algorithm is a kind of imaging algorithm of processing based on time domain, and as shown in Figure 1, its TDC imaging formula is its algorithm flow chart:
（1）
T wherein
ufor the slow time,
that signal launching site is positioned at (x (t
u) ,-Y
t), image sampling point is positioned at (x
i, y
i) round trip echo time delay.Therefore to obtain the output f (x of image slices vegetarian refreshments
i, y
j), need only the fast time-domain filtering waveform of all orientation u at time delay t
i, j(t
u) numerical value located is relevant cumulative, the BP algorithm of standard that Here it is, the matched filtering of in fact namely having processed orientation phase by time domain is processed, to reach orientation high resolving power.But be subject to the constraint of the Calculation bottleneck that algorithm operation quantity is large, larger to computing hardware arithmetic speed and system performance requirement, and also power consumption is also very large.
Summary of the invention
The object of the invention is to overcome the deficiency of above prior art, and a kind of hardware accelerator and data processing method based on BP back projection imaging algorithm is provided, and improves arithmetic speed and system performance, and reduces and calculate power consumption, specifically has following technical scheme to realize:
The described hardware accelerator based on BP back projection imaging algorithm, comprises
Pulse accumulator, for storing a large amount of pulse datas;
View data memory module, comprises at least two continuous image data memories, for storing source data and the result data of each backprojection operation front and back;
Back projection arithmetic element, for carrying out backprojection operation, realizes time delay adjustment and coherent accumulation function;
And AHB interface, for integrated described pulse accumulator, image data memory and back projection arithmetic element, complete the information interaction between three and ahb bus.
The further design of the described hardware accelerator based on BP back projection imaging algorithm is, described every image data memory is comprised of two block memories, in order to ping-pong operation.
The further design of the described hardware accelerator based on BP back projection imaging algorithm is, described view data memory module also comprises that a data selector is for selecting deposit data position.
As described in hardware accelerator based on BP back projection imaging algorithm a kind of data processing method based on BP back-projection algorithm is proposed, comprise
Time delay is adjusted: backprojection operation unit calculates the distance R of each pixel distance signal launching site, by time delay computing formula t=2R/c, obtains pulse signal time delay value t, and wherein c is the light velocity; According to described time delay value, read in the pulse echo signal collecting in pulse accumulator the signal value corresponding to this distance, and calculate phase factor exp(j*2 π * f*t according to this time delay value), wherein f is sample frequency;
Coherent accumulation: the backprojection operation unit phase factor that adjustment obtains according to time delay and the corresponding pulse data of time delay value obtain the pixel value of single pulse corresponding pixel points by coherent accumulation computing, obtains the final pixel value of this pixel to all pulses through adding up.
The further design of the described data processing method based on BP back-projection algorithm is, described coherent accumulation computing is added with source image data after pulse signal Echo Rating and phase factor are multiplied each other.
The further design of the described data processing method based on BP back-projection algorithm is, in described coherent accumulation computing source image data read and the storage of pulse accumulation pixel value is all undertaken by the access rule of setting.
The further design of the described data processing method based on BP back-projection algorithm is, the storage rule of described setting will comprise when backprojection operation unit will carry out back projection's calculating to even number subpulse, from the source data storage block of image data memory, read source image data, the view data after back projection is calculated is stored in the result data storage block of next image data memory; Will carry out when back projection is calculated view data being stored in the source data storage block of next image data memory after back projection is calculated from reading source image data the result data storage block of image data memory to odd number subpulse, meanwhile when backprojection operation cell processing data, can to another, in vacant memory bank, carry data by direct memory access, form table tennis water operation.
The further design of the described data processing method based on BP back-projection algorithm is, the involved source image data in described backprojection operation unit is fixed-point number.
The further design of the described data processing method based on BP back-projection algorithm is, the integral part bit wide of described fixed-point number is 17, and fraction part bit wide is 14.
Advantage of the present invention is as follows:
(1) adopt the fixed-point number of suitable bit wide to replace the double-precision floating points of general use to calculate, the benefit of doing is like this use that has reduced arithmetic eror and logical resource.Its phase error is reduced to 1.4 ° by 11.25 °; On Xilinx FPGA V6-550t device, experimental result is to have saved approximately 50% hardware resource, logical resource LUT consume by before 25000 be reduced to 12000.
(2) back projection imaging data processing method has been proposed, for each backprojection operation unit, deal with data amount is identical, therefore operation time is also identical, therefore phase mutually synchronization between each backprojection operation unit, realize each level production line slitless connection, obtain higher data throughput, effectively the parallelization of implementation algorithm.
Accompanying drawing explanation
Fig. 1 is described BP imaging algorithm process flow diagram.
Fig. 2 is the module diagram of the hardware accelerator based on BP back projection imaging algorithm.
Fig. 3 is the data access rule (burst process, anti-phase project number of times are even number) of back projection arithmetic element.Fig. 4 is the data access rule (burst process number of times is that even number, anti-phase project number of times are odd number) of back projection arithmetic element.
Fig. 5 is the data access rule (burst process number of times is that odd number, anti-phase project number of times are even number) of back projection arithmetic element.
Fig. 6 is the data access rule (burst process, anti-phase project number of times are odd number) of back projection arithmetic element.Fig. 7 is backprojection operation unit detailed process design diagram.
Embodiment
Below in conjunction with accompanying drawing, the present invention program is elaborated.
The architecture design of the hardware accelerator based on BP back projection imaging algorithm that the present embodiment provides as shown in Figure 2, comprises pulse accumulator, view data memory module, back projection arithmetic element and AHB interface.Pulse accumulator, for storing a large amount of pulse datas.View data memory module, comprises two continuous image data memories, for storing source data and the result data of each backprojection operation front and back.Back projection arithmetic element, for carrying out backprojection operation, realizes time delay adjustment and coherent accumulation function.AHB interface, for integrated pulse accumulator, image data memory and back projection arithmetic element, completes the information interaction between three and ahb bus.
The present embodiment comprises two image data memories, and label is Mem0, Mem1 respectively, and Mem0, Mem1 are used alternatingly to reach parallelization, in order to save the time of deal with data.Because last view data will be through repeatedly adding up and obtain, therefore storer Mem0 and Mem1 store respectively the view data of cumulative front and back, it selects deposit data position by data selector Mem_Switch.Every image data memory is comprised of two block memories, and the Mem0 of take is denoted as Mem0_0, Mem0_1 as example, in order to ping-pong operation.
Deposit principle as follows: in Mem0_0, view data leaves in Mem1_1 after the computing of BP accelerator module, meanwhile when BP accelerator module deal with data, can to another, in vacant memory bank Mem0_1, carry source data by DMA; In like manner in Mem0_1, view data leaves in Mem1_0 after the computing of back projection arithmetic element, meanwhile when BP accelerator module deal with data, can to another, in vacant memory bank Mem0_0, carry data by DMA.By such table tennis water operation obfuscated data handling time, thereby reduce Riming time of algorithm.
According to the hardware accelerator based on BP back projection imaging algorithm, propose a kind of data processing method based on BP back-projection algorithm, comprise
Time delay is adjusted: backprojection operation unit calculates the distance R of each pixel distance signal launching site, by time delay computing formula t=2R/c, obtains pulse signal time delay value t, and wherein c is the light velocity; According to time delay value, read in the pulse echo signal collecting in pulse accumulator the signal value corresponding to this distance, and calculate phase factor exp(j*2 π * f*t according to this time delay value), wherein f is sample frequency;
Coherent accumulation: the backprojection operation unit phase factor that adjustment obtains according to time delay and the corresponding pulse data of time delay value obtain the pixel value of single pulse corresponding pixel points by coherent accumulation computing, obtains the final pixel value of this pixel to all pulses through adding up.Coherent accumulation computing is added with source image data after pulse signal Echo Rating and phase factor are multiplied each other.
The detailed process design of backprojection operation unit, as shown in Figure 7.In figure, x_init, x_step, y_init, y_step difference presentation video sampled point and signal launching site are apart from horizontal ordinate initial value and step-length and ordinate initial value and step-length; In figure, 17.14 represent that data integer number positional is 17, and decimal digits is 14, and all the other in like manner; Wherein the effect of f2d module is that fixed-point number (34.28) is converted into double-precision floating points, and the effect of sqrt module is extracting operation, and the effect of d2f module is that double-precision floating points is converted into fixed-point number (32.28).The output of d2f module is the distance of image sampling point and signal launching site.
In two dotted line frames of Fig. 7, be difference computation delay and phase factor (reff).According to calculate time delay from pulse accumulator, read pulse data, itself and phase factor are multiplied each other, then the result obtaining are added on original pixel value, obtain final pixel.In figure, in left side dotted line frame, wherein the effect of Sincos module is to ask sine value and cosine value; The effect of sincos_fix2float module is by fix a point (3.28), to be converted into single precision floating datum by obtaining the sin cos functions value of coming.
In the present invention, due to the big data quantity of algorithm itself and the characteristic of macrooperation amount, for addressing this problem, a kind of access rule has been proposed.In coherent accumulation computing source image data read and the storage of pulse accumulation pixel value is all undertaken by the access rule of setting.The access rule that back projection's accelerator uses (has omitted Mem_Switch) as shown in Fig. 3-6 in figure.After flowing water is set up, for the processing procedure of N=2n group pulse, as shown in Figure 3,4.Fig. 3 is corresponding to the computing of the M=2m time BP group, the memory bank that backprojection operation unit is 0 from label reads source image data, after backprojection operation, it is 1 memory bank that result images data are stored in label, pulse like this and carry out said process in each backprojection operation unit, data stream is constantly pulsed to DDR2 from DDR1; Meanwhile DMA from DDR1 to Mem0 label be 1 memory bank is carried BP group computing source image data the M=2m+1 time, and the DMA memory bank that label is 0 from Mem1 is organized operation result view data to carrying the M=2m time BP in DDR2.Fig. 4 is corresponding to the computing of the M=2m+1 time BP group, the memory bank that backprojection operation unit is 1 from label reads source image data, after backprojection operation, it is 0 memory bank that result images data are stored in label, pulses and carry out said process like this in each backprojection operation unit; Meanwhile DMA from DDR1 to Mem0 label be 0 memory bank is carried BP group computing source image data the M=2m time, and the DMA memory bank that label is 1 from Mem1 is organized operation result view data to carrying the M=2m time BP in DDR2.Processing procedure for N=2n+1 group pulse, as shown in Figure 5,6, it is a contrary process completely that its Data Stream Processing is compared with the Data Stream Processing of N=2n group pulse, data stream is constantly pulsed to DDR1 from DDR2, this be due to every group pulse all must back projection to all target images, and every group pulse is to walk abreast independently separately.
For each backprojection operation unit, deal with data amount is identical, so operation time is also identical, therefore phase mutually synchronization between each backprojection operation unit realizes each level production line slitless connection, obtains higher data throughput, effectively the parallelization of implementation algorithm.
Through back projection of the present invention accelerator, process the image of a 8k*4k, 220s consuming time, the image resolution ratio of generation is high, the image comparison by it with C model (CUDA) generation, its similarity reaches 99.48%.
For precision and area requirements, the present embodiment adopts fixed-point number input, floating number output, the reason that adopts this way is phase factor exp(j*2 π * f*t)=cos (2 π * f*t)+i*sin (2 π * f*t) is sin cos functions, sin cos functions is to take the periodic function that 2 π are the cycle, therefore the error of phase factor is that absolute error by phase place determines, if the absolute error of phase place is too large, the result of calculation of phase factor may be completely incorrect.
Floating number, single precision floating datum and the double-precision floating points of two kinds of forms in IEEE754 standard, have been stipulated.The scale-of-two number of significant figures that can represent due to single precision floating datum is 24, and the scale-of-two number of significant figures that double-precision floating point can represent is 53.Therefore the relative error of single precision floating datum is 2
-24, the relative error of double-precision floating points is 2
-53, in fact, due to the unsteady characteristic of the radix point of floating number, floating number can guarantee relative error, but can not guarantee its absolute error.So absolute error while being maximal value in order to determine the precision of the present invention's needs, must to calculate phase place.
From introducing above, the computing formula of phase place is
Φ=2π*f*t=2π*f*2R/c（2）
F=9.6*10 in the present invention wherein
9, c=3.0*10
8,
Φ=2π*64R=360*64R° （3）
The computing formula of R is
The maximal value of algorithm source data y is 30464 in the present invention, is about 2
15, y
2maximal value be 2
30therefore, y
2max value of error is y
2 max* relative error, is expressed as 2 with double-precision floating points
30* 2
-53=2
-22, from the maximum error of the known R of (4) formula, be about 2
-11, by the maximum error of the known phase place Φ of (3) formula, be decided by R maximum error, therefore the maximum error of phase place is
360×64×2
-11=11.25°
Just because of adopt double-precision floating points to have very large error, therefore adopt fixed-point representation.Due to y
2maximal value be 230, so fixed-point number integral part bit wide should be greater than 30, fraction part bit wide is 22 can reach the maximum absolute error representing with double-precision floating points.But for further departure, by y
2fraction part bit wide expands to 28, can make final maximum phase error be less than 1.4 °; For preventing overflowing, by y
2integral part bit wide expands to 34.Therefore y integral part bit wide is 17, fraction part bit wide is 14.The integral part bit wide of final definite fixed-point number is 17, and fraction part bit wide is 14.
Claims (9)
1. the hardware accelerator based on BP back projection imaging algorithm, is characterized in that comprising
Pulse accumulator, for storing a large amount of pulse datas;
View data memory module, comprises at least two continuous image data memories, for storing source data and the result data of each backprojection operation front and back;
Back projection arithmetic element, for carrying out backprojection operation, realizes time delay adjustment and coherent accumulation function;
And AHB interface, for integrated described pulse accumulator, image data memory and back projection arithmetic element, complete the information interaction between three and ahb bus.
2. the hardware accelerator based on BP back projection imaging algorithm according to claim 1, is characterized in that, described every image data memory is comprised of two block memories, in order to ping-pong operation.
3. the hardware accelerator based on BP back projection imaging algorithm according to claim 1, is characterized in that, described view data memory module also comprises that a data selector is for selecting deposit data position.
4. as the hardware accelerator based on BP back projection imaging algorithm of claim 1-3 proposes a kind of data processing method based on BP back-projection algorithm, it is characterized in that comprising
Time delay is adjusted: backprojection operation unit calculates the distance R of each pixel distance signal launching site, by time delay computing formula t=2R/c, obtains pulse signal time delay value t, and wherein c is the light velocity; According to described time delay value, read in the pulse echo signal collecting in pulse accumulator the signal value corresponding to this distance, and calculate phase factor exp(j*2 π * f*t according to this time delay value), wherein f is sample frequency;
Coherent accumulation: the backprojection operation unit phase factor that adjustment obtains according to time delay and the corresponding pulse data of time delay value obtain the pixel value of single pulse corresponding pixel points by coherent accumulation computing, obtains the final pixel value of this pixel to all pulses through adding up.
5. the data processing method based on BP back-projection algorithm according to claim 4, is characterized in that being added with source image data after pulse signal Echo Rating and phase factor are multiplied each other in described coherent accumulation computing.
6. the data processing method based on BP back-projection algorithm according to claim 5, it is characterized in that source image data in described coherent accumulation computing read and the storage of pulse accumulation pixel value is all undertaken by the access rule of setting.
7. the data processing method based on BP back-projection algorithm according to claim 6, the storage rule that it is characterized in that described setting will comprise when backprojection operation unit will carry out back projection's calculating to even number subpulse, from the source data storage block of image data memory, read source image data, the view data after back projection is calculated is stored in the result data storage block of next image data memory; In the time of will carrying out back projection's calculating to odd number subpulse, from the result data storage block of image data memory, read source image data, after calculating, back projection view data is stored in the source data storage block of next image data memory, meanwhile when backprojection operation cell processing data, can to another, in vacant memory bank, carry data by direct memory access, form table tennis water operation.
8. the data processing method based on BP back-projection algorithm according to claim 6, is characterized in that the involved source image data in described backprojection operation unit is fixed-point number.
9. the data processing method based on BP back-projection algorithm according to claim 6, the integral part bit wide that it is characterized in that described fixed-point number is 17, fraction part bit wide is 14.
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Application publication date: 20140416 |