CN103683951B - A kind of inverter of full wave type difference output - Google Patents

A kind of inverter of full wave type difference output Download PDF

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CN103683951B
CN103683951B CN201310590723.7A CN201310590723A CN103683951B CN 103683951 B CN103683951 B CN 103683951B CN 201310590723 A CN201310590723 A CN 201310590723A CN 103683951 B CN103683951 B CN 103683951B
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switching tube
inverter
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side winding
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CN103683951A (en
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邓焰
彭浩
吕自波
李楚杉
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Zhejiang University ZJU
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Abstract

The invention discloses a kind of inverter of full wave type difference output, comprise two isolated form DC-DC conversion circuit; The former limit of DC-DC conversion circuit is full-bridge circuit structure, and secondary is full-wave rectifying circuit structure; The output of two DC-DC conversion circuit secondary is connected to load two ends respectively to form differential configuration.Duty-cycle loss phenomenon is not had during inverter of the present invention work, thus the voltage waveform distortion fundamentally eliminating dead band and bring; Inverter adopts the structure of difference output, eliminates the wave distortion that the non-ideal characteristic due to side circuit brings further, also has very high common mode disturbances rejection ability simultaneously, thus obtain the extremely low output voltage of irregularity of wave form.In addition, inverter of the present invention exports between input mutually isolated with high frequency transformer, reduces the electromagnetic interference of input to load.

Description

A kind of inverter of full wave type difference output
Technical field
The invention belongs to electric and electronic technical field, be specifically related to a kind of inverter of full wave type difference output.
Background technology
Along with the progress of modern science and technology, there is increasing precision instrument and equipment in all trades and professions, mechanical arm system (being commonly called as Leonardo da Vinci's operating robot) as other in bed used on clinical medicine, wafer fab chip production line equipment, and various precision processing machine.Precision instrument and equipment proposes very high requirement to power supply, not only requires that supply power voltage is stable, frequency departure is little, irregularity of wave form is low, also requires that the electromagnetic interference of power supply unit to instrument is little simultaneously.Therefore, the power supply of precision instrument and equipment directly can not adopt civil power, and needs custom-designed reliable and stable and irregularity of wave form meets the requirements of inverter.
On the other hand, along with growth in the living standard, high-quality stereo set is more and more common in the life of people.In stereo set, audio power amplifying circuit is crucial part.High quality audio power amplifier not only wants the distortion factor little, and audio-frequency noise is low, and requires that frequency response bandwidth scope is large, proposes demand to bandwidth, circuit that output waveform aberration rate is low.The sonar set similarly detecting under water and be widely used in military field.Active sonar sends the underwater sound signal of certain frequency by underwater acoustic transducer and detects echo and carry out detecting underwater object, and underwater acoustic transducer requires that the irregularity of wave form of power supply is extremely low, proposes severe challenge to traditional variable frequency power supply.
Traditional bridge-type inverter structure is simple, technology maturation, is widely used in conventional ac power supply apparatus.But in the above-mentioned application scenario needing high accuracy inverter, bridge-type inverter encounters the difficulty being difficult to overcome.Bridge inverter main circuit leading directly to operationally in order to avoid brachium pontis, must add Dead Time between the switching signal of upper and lower switching tube.The introducing of Dead Time can cause exporting fundamental voltage and reduce, and low-order harmonic voltage increases, and wave distortion is serious.In order to solve the wave distortion problem brought in dead band, Seon-Hwan.HandK.Jang-Mok is DeadTimeCompensationMethodforVoltage-FedPWMInverter.Ener gyConversion(IEEETransactionson at title, 2010.25 (1): propose in document p.1-10.) and add dead area compensation mechanism in the controlling, but this way needs to detect output current, by judging that the polarity of electric current decides the increase and decrease of duty ratio.And be difficult to accomplish accurately to the detection of current polarity near current zero-crossing point in reality.
Lihua.CandZ.P.Fang is Dead-TimeEliminationforVoltageSourceInverters.PowerElect ronics(IEEETransactionson at title, 2008.23 (2): in document p.574-580), propose the control strategy adopted without Dead Time, leading directly in order to avoid brachium pontis in this control strategy, need the on off state judging switching tube accurately, in practical application, generally judged the on off state of switching tube by detection filter inductive current or the anti-and conducting state of diode of switching tube; But because inductive current exists ripple, add the impact of various disturbing factor, make the validity of method have a greatly reduced quality, the reliability of device also reduces greatly.In a word, existing various scheme, owing to needing to detect accurately some variable in circuit, is thus difficult to apply in actual device.
In addition, traditional bridge-type inverter is a kind of structure of non-isolation type, and during work, output is easy to the impact of the electromagnetic interference be subject to from input; And switching tube is difficult to realize Sofe Switch, which has limited circuit realiration high frequency.
Summary of the invention
For the above-mentioned technical problem existing for prior art, the present invention proposes a kind of inverter of full wave type difference output, the duty-cycle loss brought by dead band in this inverter course of work is very little, just can be resolved by simple compensation way, thus fundamentally solve a difficult problem for conventional inverter; The wave distortion simultaneously adopting the structure of difference output can eliminate the non-ideal characteristic due to side circuit further to bring, also has very high common mode disturbances rejection ability simultaneously, thus obtains the extremely low output voltage of irregularity of wave form.
An inverter for full wave type difference output, is made up of two electronic circuits, and described electronic circuit is isolated form DC-DC conversion circuit; The former limit of described DC-DC conversion circuit is full-bridge circuit structure, and secondary is full-wave rectifying circuit structure;
The output of two electronic circuit secondary is connected to inverter load two ends respectively to form difference output structure;
Described electronic circuit is used for VD DC input voitage be transformed to alternating current component, and two groups of VD that two electronic circuits are corresponding are made difference and obtained ac output voltage at inverter load two ends.The initial phase of the alternating current component in two groups of VD independently controls respectively.
Preferably, the former limit of two electronic circuits shares a brachium pontis; This not only reduces two power switch pipes, former limit circuit is simplified, and be conducive to the Sofe Switch that inverter realizes all switching tubes of former limit circuit.
The former limit of described electronic circuit comprises a former limit winding and two brachium pontis in parallel, and each brachium pontis is the anti-and switching tube S of diodes by two bands 1~ S 2be composed in series; The Same Name of Ends of former limit winding is connected with the intermediate node of a wherein brachium pontis, and different name end is connected with the intermediate node of another brachium pontis.
Preferably, the either end of described former limit winding is connected with the intermediate node of corresponding brachium pontis by capacitance; The magnetic biasing problem of high frequency transformer can being improved, the anti-saturation ability of magnetic core of transformer can be improved when not changing circuit working state greatly.
Save the capacitance on the former limit of described electronic circuit, inverter can be made to be applicable to transformer magnetic biasing problem and obtained the fine occasion solved; In addition save capacitance, better output waveform can be obtained.
Preferably, two switching tube S 1~ S 2source electrode be all parallel with buffer capacitor with drain electrode two ends, described buffer capacitor is the parasitic capacitance of switching tube inside or is an external electric capacity additional on the basis of parasitic capacitance; This buffer capacitor is conducive to switching tube and realizes Sofe Switch, avoids the various electromagnetic interference problems because switching tube hard switching brings.
Described electronic circuit secondary comprises the switching tube S of two anti-also diodes of band 3~ S 4, a filter inductance L 1, two vice-side winding N 1~ N 2with a filter capacitor C o1; Wherein: filter inductance L 1one end and filter capacitor C o1one end be connected in described output, filter inductance L 1the other end and vice-side winding N 1different name end and vice-side winding N 2same Name of Ends be connected, vice-side winding N 1same Name of Ends and switching tube S 3drain electrode be connected, vice-side winding N 2different name end and switching tube S 4drain electrode be connected, filter capacitor C o1the other end and switching tube S 3source electrode and switching tube S 4source electrode be connected and ground connection, two switching tube S 3~ S 4grid all receive the control signal that external control circuit provides, two vice-side winding N 1~ N 2the number of turn identical.
According to actual conditions, described inverter load two ends are parallel with filter capacitor C o3; Filter capacitor C o3under being operated in exchange status, coordinate the filter capacitor C of two DC-DC conversion circuit secondary o1work can obtain better output waveform.
As another embodiment: described electronic circuit secondary comprises the switching tube S of two anti-also diodes of band 3~ S 4with two vice-side winding N 1~ N 2; Wherein: vice-side winding N 1different name end and vice-side winding N 2same Name of Ends be connected in described output, vice-side winding N 1same Name of Ends and switching tube S 3drain electrode be connected, vice-side winding N 2different name end and switching tube S 4drain electrode be connected, switching tube S 3source electrode and switching tube S 4source electrode be connected and ground connection, two switching tube S 3~ S 4grid all receive the control signal that external control circuit provides, two vice-side winding N 1~ N 2the number of turn identical, described inverter load two ends are parallel with filter capacitor C o3, the either end of inverter load is by filter inductance L 0be connected with the output of corresponding electronic circuit secondary.This secondary circuit topology is simplified, and decreases the usage quantity of filter capacitor, can improve the reliability of device; Filter inductance number reduces simultaneously, is conducive to the loss reducing magnetic core element.
Inverter hinge structure of the present invention has the following advantages:
(1) inverter of the present invention in the course of the work duty-cycle loss after difference output structure, become very little, adopt simple control strategy can to the ultralow interchange output waveform of an aberration rate.
(2) power switch pipe in inverter of the present invention is easy to realize Sofe Switch, avoids the various electromagnetic interference problems because switching tube hard switching brings, is easy to the high frequency of realizing circuit, is conducive to the raising of circuit efficiency simultaneously.
(3) the former secondary circuit of inverter of the present invention is mutually isolated by high frequency transformer, inhibits input to the interference of output.
(4) inverter of the present invention is based upon on ripe technical foundation, and electronic circuit is traditional DC-DC circuit, and former limit is full bridge structure, and secondary is full-wave rectification structure; Circuit adopts traditional phase-shifting full-bridge PWM method, and the method principle is simple, technology maturation.
Inverter of the present invention can be used for powering to precision instrument, or is used as the power amplifier of high-quality sound equipment.
Accompanying drawing explanation
Fig. 1 is the structural representation of the first execution mode of inverter of the present invention.
Fig. 2 is the structural representation of inverter the second execution mode of the present invention.
Fig. 3 is the structural representation of the third execution mode of inverter of the present invention.
Fig. 4 is the structural representation of inverter of the present invention 4th kind of execution mode.
Fig. 5 is the structural representation of inverter of the present invention 5th kind of execution mode.
Fig. 6 is the structural representation of inverter of the present invention 6th kind of execution mode.
Fig. 7 is the waveform schematic diagram of inverter output voltage of the present invention.
Fig. 8 is that the THD of inverter output voltage waveform of the present invention analyzes schematic diagram.
Embodiment
In order to more specifically describe the present invention, below in conjunction with the drawings and the specific embodiments, technical scheme of the present invention and relative theory thereof are described in detail.
An inverter for full wave type difference output, comprises two isolated form DC-DC conversion circuit; The former limit of DC-DC conversion circuit is full-bridge circuit structure, and secondary is full-wave rectifying circuit structure; The former limit of two DC-DC conversion circuit shares a brachium pontis, and the output of two DC-DC conversion circuit secondary is connected to load two ends respectively to form differential configuration.
As shown in Figure 1, former limit circuit comprises:
(1) the first former limit branch road in parallel with input power, by band anti-paralleled diode D s1the first power switch tube S 1, band anti-paralleled diode D s2the second power switch tube S 2, the first buffer capacitor C s1, the second buffer capacitor C s2composition; Wherein be with anti-paralleled diode D s1the first power switch tube S 1drain electrode be connected with the positive pole of power supply, band anti-paralleled diode D s1the first power switch tube S 1source electrode and band anti-paralleled diode D s2the second power switch tube S 2drain electrode be connected in A point, band anti-paralleled diode D s2the second power switch tube S 2source electrode be connected with the negative pole of power supply, the first buffer capacitor C s1two ends respectively with band anti-paralleled diode D s1the first power switch tube S 1drain electrode be connected with source electrode, the second buffer capacitor C s2two ends respectively with band anti-paralleled diode D s2the second power switch tube S 2drain electrode be connected with source electrode;
(2) the second former limit branch road in parallel with input power, by band anti-paralleled diode D s3the 3rd power switch tube S 3, band anti-paralleled diode D s4the 4th power switch tube S 4, the 3rd buffer capacitor C s3, the 4th buffer capacitor C s4composition; Wherein be with anti-paralleled diode D s4the 4th power switch tube S 4drain electrode be connected with the positive pole of power supply, band anti-paralleled diode D s4the 4th power switch tube S 4source electrode and band anti-paralleled diode D s3the 3rd power switch tube S 3drain electrode be connected in B point, band anti-paralleled diode D s3the 3rd power switch tube S 3source electrode be connected with the negative pole of power supply, the 4th buffer capacitor C s4two ends respectively with band anti-paralleled diode D s4the 4th power switch tube S 4drain electrode be connected with source electrode, the 3rd buffer capacitor C s3two ends respectively with band anti-paralleled diode D s3the 3rd power switch tube S 3drain electrode be connected with source electrode;
(3) the 3rd former limit branch road in parallel with input power, by band anti-paralleled diode D s5the 5th power switch tube S 5, band anti-paralleled diode D s6the 6th power switch tube S 6, the 5th buffer capacitor C s5, the 6th buffer capacitor C s6composition; Wherein be with anti-paralleled diode D s5the 5th power switch tube S 5drain electrode be connected with the positive pole of power supply, band anti-paralleled diode D s5the 5th power switch tube S 5source electrode and band anti-paralleled diode D s6the 6th power switch tube S 6drain electrode be connected in C point, band anti-paralleled diode D s6the 6th power switch tube S 6source electrode be connected with the negative pole of power supply, the 5th buffer capacitor C s5two ends respectively with band anti-paralleled diode D s5the 5th power switch tube S 5drain electrode be connected with source electrode, the 6th buffer capacitor C s6two ends respectively with band anti-paralleled diode D s6the 6th power switch tube S 6drain electrode be connected with source electrode;
(4) first isolating transformer T 1former limit winding N 11, the first capacitance C p1; Wherein the first isolating transformer T 1former limit winding N 11same Name of Ends and band anti-paralleled diode D s1the first power switch tube S 1source electrode and band anti-paralleled diode D s2the second power switch tube S 2drain electrode be connected to A point altogether, the first isolating transformer T 1former limit winding N 11the other end and the first capacitance C p1one end be connected, the first capacitance C p1the other end and band anti-paralleled diode D s4the 4th power switch tube S 4source electrode and band anti-paralleled diode D s3the 3rd power switch tube S 3drain electrode be connected to B point altogether;
(5) second isolating transformer T 2former limit winding N 21, the second capacitance C p2; Wherein the second isolating transformer T 2former limit winding N 21different name end end and band anti-paralleled diode D s4the 4th power switch tube S 4source electrode and band anti-paralleled diode D s3the 3rd power switch tube S 3drain electrode be connected to B point altogether, the second isolating transformer T 2former limit winding N 21same Name of Ends and the second capacitance C p2one end be connected, the second capacitance C p2the other end and band anti-paralleled diode D s5the 5th power switch tube S 5source electrode and band anti-paralleled diode D s6the 6th power switch tube S 6drain electrode be connected to C point altogether;
Secondary circuit comprises:
(1) the first full-wave circuit between output port anode D and ground, by band anti-paralleled diode D s7the 7th power switch tube S 7, band anti-paralleled diode D s8the 8th power switch tube S 8, the first isolating transformer T 1the first vice-side winding N 12, the first isolating transformer T 1the second vice-side winding N 13, the first filter inductance L 1composition; Wherein the first filter inductance L 1one end be connected with output port anode D, the first filter inductance L 1the other end and the first isolating transformer T 1the first vice-side winding N 12different name end and the first isolating transformer T 1the second vice-side winding N 13same Name of Ends connect altogether, the first isolating transformer T 1the first vice-side winding N 12same Name of Ends and band anti-paralleled diode D s7the 7th power switch tube S 7drain electrode be connected, band anti-paralleled diode D s7the 7th power switch tube S 7source electrode with ground connect, the first isolating transformer T 1the second vice-side winding N 13different name end and band anti-paralleled diode D s8the 8th power switch tube S 8drain electrode be connected, band anti-paralleled diode D s8the 8th power switch tube S 8source electrode with ground connect;
(2) the second full-wave circuit between output port negative terminal E and ground, by band anti-paralleled diode D s9the 9th power switch tube S 9, band anti-paralleled diode D s10the tenth power switch tube S 10, the second isolating transformer T 2the first vice-side winding N 22, the second isolating transformer T 2the second vice-side winding N 23, the second filter inductance L 2composition; Wherein the second filter inductance L 2one end be connected with output port negative terminal E, the second filter inductance L 2the other end and the second isolating transformer T 2the first vice-side winding N 22same Name of Ends and the second isolating transformer T 2the second vice-side winding N 23different name end connect altogether, the second isolating transformer T 2the first vice-side winding N 22different name end and band anti-paralleled diode D s9the 9th power switch tube S 9drain electrode be connected, band anti-paralleled diode D s9the 9th power switch tube S 9source electrode with ground connect, the second isolating transformer T 2the second vice-side winding N 23same Name of Ends and band anti-paralleled diode D s10the tenth power switch tube S 10drain electrode be connected, band anti-paralleled diode D s19the tenth power switch tube S 10source electrode with ground connect;
(3) first filter capacitor C o1, the second filter capacitor C o2; Wherein the first filter capacitor C o1be connected across between output port anode D and ground, the second filter capacitor C o2be connected across between the negative terminal E of output port and ground.
First buffer capacitor C in Fig. 1 s1, the second buffer capacitor C s2, the 3rd buffer capacitor C s3, the 4th buffer capacitor C s4, the 5th buffer capacitor C s5, the 6th buffer capacitor C s6be made up of independent capacitor, or by the anti-also diode D of band s1the first power switch tube S 1parasitic capacitance between drain electrode and source electrode, be with instead also diode D s2the second power switch tube S 2parasitic capacitance between drain electrode and source electrode, be with instead also diode D s3the 3rd power switch tube S 3parasitic capacitance between drain electrode and source electrode, be with instead also diode D s4the 4th power switch tube S 4parasitic capacitance between drain electrode and source electrode, be with instead also diode D s5the 5th power switch tube S 5parasitic capacitance between drain electrode and source electrode, be with instead also diode D s6the 6th power switch tube S 6parasitic capacitance between drain electrode and source electrode is formed.
As another kind of execution mode, as shown in Figure 2, the former limit circuit of inverter can simplify.The first capacitance C in Fig. 1 p1with the second capacitance C p2can be removed.The secondary circuit of inverter remains unchanged simultaneously.
As another kind of execution mode, as shown in Figure 3, the secondary circuit of inverter is compared with the first execution mode shown in Fig. 1, has met the 3rd filter capacitor C at D, E two ends of output port o3, former limit circuit is identical with the former limit circuit shown in Fig. 1.
As another kind of execution mode, as shown in Figure 4, the secondary circuit of inverter is compared with the second execution mode shown in Fig. 2, has met the 3rd filter capacitor C at D, E two ends of output port o3, former limit circuit is identical with the former limit circuit shown in Fig. 2.
As another kind of execution mode, as shown in Figure 5, the secondary circuit of inverter is compared with the first execution mode shown in Fig. 1, eliminates the first filter capacitor C o1, the second filter capacitor C o2, meanwhile met the 3rd filter capacitor C at D, E two ends of output port o3, two filter inductances merge into a filter inductance L, and former limit circuit is identical with the former limit circuit shown in Fig. 1.
As another kind of execution mode, as shown in Figure 6, the secondary circuit of inverter is compared with the second execution mode shown in Fig. 2, eliminates the first filter capacitor C o1, the second filter capacitor C o2, meanwhile met the 3rd filter capacitor C at D, E two ends of output port o3, two filter inductances merge into a filter inductance L, and former limit circuit is identical with the former limit circuit shown in Fig. 2.
In figure, band anti-paralleled diode D s1the first power switch tube S 1, band anti-paralleled diode D s2the second power switch tube S 2, band anti-paralleled diode D s3the 3rd power switch tube S 3, band anti-paralleled diode D s4the 4th power switch tube S 4, band anti-paralleled diode D s5the 5th power switch tube S 5, band anti-paralleled diode D s6the 6th power switch tube S 6, band anti-paralleled diode D s7the 7th power switch tube S 7, band anti-paralleled diode D s8the 8th power switch tube S 8, band anti-paralleled diode D s9the 9th power switch tube S 9, band anti-paralleled diode D s10the tenth power switch tube S 10common MOSFET all can be adopted to realize.
Inverter of the present invention adopts traditional phase-shifting full-bridge PWM method, and secondary circuit adopts the structure of difference output, and former secondary circuit is mutually isolated by high-frequency isolation transformer.For the first embodiment shown in Fig. 1, output voltage is made to be V in, the duty ratio of two phase-shifting full-bridge DC-DC circuit is respectively d 1, d 2, transformer turns ratio is N.Then according to the feature of full wave type DC-DC circuit, the voltage expression can releasing D, E 2 is respectively v D = d 1 V in N , v E = d 2 V in N , So output voltage v o = v D - v E = ( d 1 - d 2 ) V in N . Work as d 1, d 2by a DC quantity (D), (amplitude is A, and angular frequency is ω, and initial phase angle is respectively with of ac ) superimposed formation and direct current biasing equal time, namely then can obtain this is defeated, and to be an amplitude be frequency is initial phase angle is alternating voltage.Because the duty-cycle loss in circuit working process becomes very little via impact after difference output structure, therefore this ac output voltage has high waveform quality.
Fig. 7 is the simulation waveform of the first embodiment of inverter shown in Fig. 1, ordinate v in figure orepresent output voltage, unit volt (V), abscissa representing time, unit microsecond (ms), output voltage frequency is 1000 hertz (Hz).Fig. 8 is the analysis result of the total harmonic distortion factor (THD) of the output voltage waveforms shown in Fig. 7.Wherein ordinate represents voltage magnitude, unit volt (V), and abscissa is harmonic number.F 1represent frequency, v 1mtable is fundamental voltage amplitude.This inverter output waveforms aberration rate extremely low (THD=0.29) can be found out from the analysis result of Fig. 7 and Fig. 8, demonstrate feasibility and the advantage of technical solution of the present invention.

Claims (5)

1. an inverter for full wave type difference output, is characterized in that: be made up of two electronic circuits, and described electronic circuit is isolated form DC-DC conversion circuit; The former limit of described DC-DC conversion circuit is full-bridge circuit structure, and secondary is full-wave rectifying circuit structure;
The output of two electronic circuit secondary is connected to inverter load two ends respectively to form difference output structure;
Described electronic circuit is used for VD DC input voitage be transformed to alternating current component, and the VD of one of them electronic circuit is the VD of another electronic circuit is d 1and d 2be respectively the duty ratio of two electronic circuits, and
Two groups of VD that two electronic circuits are corresponding are made difference and are obtained ac output voltage at inverter load two ends
Wherein: A is the amplitude of alternating current component, ω is the angular frequency of alternating current component, with correspond to the initial phase angle of alternating current component in the VD of two electronic circuits, D is the DC component of VD, and t is the time, and N is the turn ratio of transformer in isolated form DC-DC conversion circuit, V infor described DC input voitage;
One of them electronic circuit secondary comprises the switching tube S of two anti-also diodes of band 7~ S 8, a filter inductance L 1, two vice-side winding N 12~ N 13with a filter capacitor C o1; Wherein: filter inductance L 1one end and filter capacitor C o1one end be connected in the output of this electronic circuit secondary, filter inductance L 1the other end and vice-side winding N 12different name end and vice-side winding N 13same Name of Ends be connected, vice-side winding N 12same Name of Ends and switching tube S 7drain electrode be connected, vice-side winding N 13different name end and switching tube S 8drain electrode be connected, filter capacitor C o1the other end and switching tube S 7source electrode and switching tube S 8source electrode be connected and ground connection, two switching tube S 7~ S 8grid all receive the control signal that external control circuit provides, two vice-side winding N 12~ N 13the number of turn identical;
Another electronic circuit secondary comprises the switching tube S of two anti-also diodes of band 9~ S 10, a filter inductance L 2, two vice-side winding N 22~ N 23with a filter capacitor C o2; Wherein: filter inductance L 2one end and filter capacitor C o2one end be connected in the output of this electronic circuit secondary, filter inductance L 2the other end and vice-side winding N 23different name end and vice-side winding N 22same Name of Ends be connected, vice-side winding N 23same Name of Ends and switching tube S 10drain electrode be connected, vice-side winding N 22different name end and switching tube S 9drain electrode be connected, filter capacitor C o2the other end and switching tube S 9source electrode and switching tube S 10source electrode be connected and ground connection, two switching tube S 9~ S 10grid all receive the control signal that external control circuit provides, two vice-side winding N 22~ N 23the number of turn identical.
2. inverter according to claim 1, is characterized in that: the former limit of described electronic circuit comprises a former limit winding and two brachium pontis in parallel, and by two bands, the anti-and switching tube of diodes is composed in series each brachium pontis; The Same Name of Ends of former limit winding is connected with the intermediate node of a wherein brachium pontis, and different name end is connected with the intermediate node of another brachium pontis; The former limit of two electronic circuits shares a brachium pontis, and the different name end of electronic circuit former limit winding is connected with the intermediate node of public brachium pontis.
3. inverter according to claim 2, is characterized in that: the either end of described former limit winding is connected with the intermediate node of corresponding brachium pontis by capacitance.
4. the inverter according to Claims 2 or 3, it is characterized in that: the switching tube source electrode in brachium pontis is parallel with buffer capacitor with drain electrode two ends, described buffer capacitor is the parasitic capacitance of switching tube inside or is an external electric capacity additional on the basis of parasitic capacitance.
5. inverter according to claim 1, is characterized in that: described inverter load two ends are parallel with filter capacitor C o3.
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差动Buck直流斩波器型高频链逆变器研究;宋福根等;《电工电气》;20110630(第6期);第1-3页 *

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