CN103680461A - Display frame cache switching realizing method and display system - Google Patents
Display frame cache switching realizing method and display system Download PDFInfo
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Abstract
The invention discloses a display frame cache switching realizing method. The method comprises the steps that a current Nth display frame is read from a main display frame cache and is sent to a display for display; data in a standby display frame cache is updated into a (N+1)th frame; after the standby display frame cache is updated, whether a switching condition is met is judged according to the condition that the current Nth display frame in the main display frame cache is read; and if the switching condition is met, switching between the standby display frame cache in a drive program and the main display frame cache is carried out. The invention further discloses a display system. According to the method and the system, which are provided by the invention, the time of the switching between the standby display frame cache and the main display frame cache can be shortened; the minimum time scope limited by video image processing is expanded; in some cases, data in the prepared standby display frame cache can be displayed on the display earlier; display delay can be shortened; and display frame updating is speeded up.
Description
Technical field
The invention belongs to image and show field, relate in particular to a kind of method and display system that display frame buffer memory switches that realize.
Background technology
Video memory, is also called frame buffer, and its effect is for storing the data of playing up that video card chip was processed or be about to extract.As the internal memory of computing machine, video memory is for storing the parts of graphical information to be processed.The picture that we see on display screen is to consist of pixel one by one, and each pixel with 4 to 32 even the data of 64 control its brightness and color, these data must be preserved by video memory, transfer to again display chip and CPU allotment, finally operation result is converted into figure and outputs on display device.Video memory is the same with mainboard internal memory, carries out the function of storage, but its storage to similarly being the information that video card outputs to each pixel on display device.Video memory is the very important ingredient of video card, display chip can be saved in data in video memory after handling data, then by RAMDAC(digital to analog converter) from video memory, read out data and digital signal is converted to simulating signal, out by screen display finally.Image acquisition is the important step that realtime graphic is processed.In image acquisition process, for video switch technology, generally adopt CPU to control two block caches with ping-pong work, realize the high-speed transfer of video data stream in system.As two block caches in figure comprise: main display frame buffer memory and standby display frame buffer memory.
Traditional video switch scheme is, when standby display frame buffer update well after, wait for field sync signal pulse, after receiving field sync signal pulse, interrupt to occur, once display controller receive field sync signal in have no progeny, just by main display frame buffer memory with for display frame buffer memory, switch.This scheme is just switched main display frame buffer memory and standby display frame buffer memory after need to waiting until and interrupting occurring.In some cases, if standby display frame buffer update is after receiving field sync signal well, after needing wait to receive next field sync signal, interrupt again, likely cause the switching time of main display frame buffer memory and standby display frame buffer memory can be longer, cause the display frame in off-the-shelf standby display frame buffer memory on display device, to show too late, display delayed is larger.
The defect of this scheme is that in two display frame buffer memorys, the renewal of picture frame is controlled according to predetermined pulse, is typically according to field sync signal pulse.In this case, when standby display frame buffer update well after, wait for field sync signal, after receiving field sync signal, interrupt occurring, once display controller receive field sync signal in have no progeny, just will switch for display frame buffer memory and main display frame buffer memory.During upgrading a display frame, only have a moment can trigger the renewal of new display frame.In other words, if being synchronous signal impulse on the scene, upgrades soon afterwards standby display frame buffer memory, the renewal of display frame, and the switching between main display frame buffer memory and standby display frame buffer memory can only be from subsequent fields synchronous signal impulse.This long delay that display frame upgrades can cause beating of the image that shows on display device.
Summary of the invention
In view of this, an object of the present invention is to provide a kind of method and display system that display frame buffer memory switches that realize, thereby shorten the switching time of two display frame buffer memorys.For there is to a basic understanding some aspects of the embodiment disclosing, provided simple summary below.This summary part is not to comment general, neither determine key/critical component or describe the protection domain of these embodiment.Its sole purpose is to present some concepts by simple form, usings this preamble as following detailed description.
An object of the present invention is to provide a kind of method of switching for realizing display frame buffer memory, comprising:
From main display frame buffer memory, read current N display frame, and send to display and show;
By the Data Update in standby display frame buffer memory, it is (N+1) individual frame;
After described standby display frame buffer update completes, according to current N the situation that display frame is read in described main display frame buffer memory, judge whether switching condition meets;
If described switching condition meets, described standby display frame buffer memory and described main display frame buffer memory in driver are switched.
In some optional embodiments, also comprise:
After described standby display frame buffer update completes, central processing unit sends one to described display controller and switches the order of display frame buffer memory, by described display controller, judges whether switching condition meets.
In some optional embodiments, also comprise:
When described switching condition meets, described display controller produces interrupt request, and this interrupt request is sent to described central processing unit; Described central processing unit responds this interrupt request, indication blocked operation.
In some optional embodiments, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and does not arrive looking ahead constantly of (N+1) individual display frame.
In some optional embodiments, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and by described display device, has all been shown, and does not arrive looking ahead constantly of (N+1) individual display frame.
In some optional embodiments, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read the data of current N the display frame in switching standby display frame buffer memory, if read, reads (N+1) the individual display frame in the main display frame buffer memory after switching, and sends to display device to show.
In some optional embodiments, described switching condition is:
The partial data of N display frame in described main display frame buffer memory has been read into display controller.
In some optional embodiments, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if do not read, after first reading the remaining data of N display frame, read again (N+1) the individual display frame in the main display frame buffer memory after switching, and send to display device to show.
Another object of the present invention is to provide a kind of display system, comprising: central processing unit, memory device, display controller, display device and miscellaneous equipment; Wherein, described memory device at least comprises main display frame buffer memory and standby display frame buffer memory;
Described central processing unit, for controlling described display controller, also for described main display frame buffer memory and described standby display frame buffer memory are switched;
Described memory device, for storing display frame;
Described display controller for from described main display frame buffer memory reading displayed frame, sends to described display device after certain processing; Also for generating interrupt request, and send it to central processing unit;
Described display device, for being shown as image by display frame;
Described main display frame buffer memory, for storing current N the display frame that is being read and is showing;
Described standby display frame buffer memory, for storing (N+1) individual display frame;
Described display controller reads current N display frame from described main display frame buffer memory, and sends to described display and show;
Described central processing unit or described miscellaneous equipment are (N+1) individual frame by the Data Update in described standby display frame buffer memory, after renewal completes, described display controller, according to current N the situation that display frame is read in described main display frame buffer memory, judges whether switching condition meets;
If described switching condition meets, described central processing unit switches described standby display frame buffer memory and described main display frame buffer memory in driver.
In some optional embodiments, after described standby display frame buffer update completes, described central processing unit sends one to described display controller and switches the order of display frame buffer memory;
Described display controller is received after this order, judges whether switching condition meets.
In some optional embodiments, when described switching condition meets, described display controller produces interrupt request, and this interrupt request is sent to described central processing unit;
Described central processing unit responds this interrupt request, indication blocked operation.
In some optional embodiments, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and does not arrive looking ahead constantly of (N+1) individual display frame.
In some optional embodiments, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and by described display device, has all been shown, and does not arrive looking ahead constantly of (N+1) individual display frame.
In some optional embodiments, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if read, reads (N+1) the individual display frame in the main display frame buffer memory after switching, and sends to display device to show.
In some optional embodiments, described switching condition is:
The partial data of N display frame has been read into display controller.
In some optional embodiments, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if do not read, after first reading the remaining data of N display frame, read again (N+1) the individual display frame in the main display frame buffer memory after switching, and send to display device to show.
In some optional embodiments, also comprise:
Described main display frame buffer memory does not allow to be updated, and, when described main display frame buffer memory is read, does not allow write operation.
Adopt scheme provided by the invention, can shorten the switching time of main display frame buffer memory (front display frame buffer memory, Front Frame Buffeer) and standby display frame buffer memory (rear display frame buffer memory Back Frame Buffer), do not need to wait for synchronous signal impulse; Expand video image and process the minimum time scope limiting.In some cases, can make the data more demonstration of morning on display device in off-the-shelf standby display frame buffer memory, that is to say and can shorten display delayed (Display Latency), accelerate the renewal of display frame.
For above-mentioned and relevant object, one or more embodiment comprise below by the feature that describes in detail and particularly point out in the claims.Explanation below and accompanying drawing describe some illustrative aspects in detail, and its indication is only some modes in the utilizable variety of way of principle of each embodiment.Other benefit and novel features consider the detailed description along with below by reference to the accompanying drawings and become obviously, and the disclosed embodiments are to comprise being equal to of all these aspects and they.
figure of description
Fig. 1 is the structural representation of a kind of display system of providing of the embodiment of the present invention one;
Fig. 2 is a kind of method flow diagram of realizing the switching of display frame buffer memory that the embodiment of the present invention two provides;
Fig. 3 is that the another kind that the embodiment of the present invention three provides is realized the method flow diagram that display frame buffer memory switches;
Fig. 4 is that the another kind that the embodiment of the present invention four provides is realized the method flow diagram that display frame buffer memory switches.
Embodiment
The following description and drawings illustrate specific embodiment of the invention scheme fully, to enable those skilled in the art to put into practice them.Other embodiments can comprise structure, logic, electric, process and other change.Embodiment only represents possible variation.Unless explicitly requested, otherwise independent assembly and function are optional, and the order of operation can change.The part of some embodiments and feature can be included in or replace part and the feature of other embodiments.The scope of embodiment of the present invention comprises the gamut of claims, and all obtainable equivalent of claims.In this article, these embodiments of the present invention can be represented with term " invention " individually or always, this is only used to conveniently, and if in fact disclose the invention that surpasses, is not that the scope that will automatically limit this application is any single invention or inventive concept.
Embodiment mono-
In some optional embodiments, provide a kind of display system.Fig. 1 is that the present invention is the structural representation of a kind of display system of providing of embodiment mono-.
As shown in Figure 1, this display system at least comprises: central processing unit 101, memory device 102, display controller 103, display device 104, and other equipment 105.Wherein, in memory device 102, at least comprise two block caches: main display frame buffer memory 1021 and standby display frame buffer memory 1022.
Wherein, central processing unit 101, for controlling display controller 103; Preferably, for example can control display controller 103 display mode, the condition of having switched interruption is set, and the switching etc. of controlling display frame buffer memory; Also for accessing storage device 102 and read and write data; Preferably, central processing unit 101 is also for sending control command (switching the order of display frame buffer memory) to display controller 103, also, for responding interrupt request, indication blocked operation, switches the main display frame buffer memory in driver 1021 and standby display frame buffer memory 1022.
Preferably, in video switch process, adopt the concrete treatment scheme of ping-pong operation as follows: data stream is assigned to data buffer: in main display frame buffer memory 1021 and standby display frame buffer memory 1022.At first buffer circle, the data flow cache of input is arrived to main display frame buffer memory 1021.At second buffer circle, by the switching of display controller 103, the data flow cache of input is arrived to standby display frame buffer memory 1022, meanwhile, by 1021 data of main display frame buffer memory (the first field picture data), by the selection of display controller 103, deliver to display device 104 and show.At the 3rd buffer circle, by the switching again of display controller 103, the data flow cache of input is arrived to main display frame buffer memory 1021, meanwhile, the data (the second field picture data) of standby display frame buffer memory, by the switching of display controller 103, are delivered to display device 104 and shown.So circulation, goes round and begins again.
The maximum feature of ping-pong operation is by display controller 103, by beat, switch, by delivering to without a break display device 104 through the data stream of buffering, shows with cooperatively interacting.The main display frame buffer memory 1021 of ping-pong operation and standby display frame buffer memory 1022 are used as to an integral body, the input traffic at its two ends and output stream are all continuously, without any pause, be therefore applicable to very much carrying out pipeline, complete seamless buffering and the processing of data.
Page-flip method (being sometimes referred to as table tennis buffering), rather than copy data, two buffer zones are to show (these two is all at VRAM).In any one time, a monitoring that buffering is being shown energetically, and other rear buffer zone is attracted.After completing, two people's role transforming.The data that the pointer being normally worth by modification that page-flip completes starts are presented at video memory.
This page-flip is far away faster than copy data, and can guarantee to tear by can not be in sight, as long as the page switches in the vertical blanking time interval of monitor---and do not have video data to be attracted blank period.Current enlivening with visible buffer zone is called main display frame buffer memory, and background pages is known as " standby display frame buffer memory ".
In computer graphics, double buffering technology shows there is no (or still less) flicker for graphing.
It is a very difficult program, draws one and shows so that pixel does not change more than once.The text that for example upgrades the page is easy cleaning full page more, then mail than eliminating in some way all pixels, no matter be old and new alphabetical.Yet this intermediate image is seen as flicker by user.In addition the continuous visible video page (about 60 times/second) again of computer display device, therefore, even if a perfect renewal can be seen that moment is the image of the separatrix " newly " between level and the image of un-redrawn " old ", is called and tears.
All mapping operations that software is realized double buffering are stored their result at the system RAM of certain areas; Any such area is commonly called one " going back to buffer zone ".When all mapping operations are considered to complete, whole distract (or just having changed part) copies to video-ram (buffer zone above); This grating light beam that copies normally synchronous display device is torn avoiding.Double buffering necessarily needs more video memory and CPU time than unmarried buffering, because video memory is distributed to back buffer zone, replicate run time, the time is waited for synchronous.
Synthesis window manager often, in conjunction with " copying " operation and " synthesizing " window for position, is converted into scale or distortion effect, makes partially transparent.Therefore the buffer zone before may only comprise combination picture and appear in screen, although the image that has different " going back to buffer zone " every non-composited window to comprise whole windows content.
Preferably, display controller 103 reads current N display frame from main display frame buffer memory 1021, and sends to display 104 and show;
If switching condition meets, central processing unit 101 switches the standby display frame buffer memory in driver 1022 and main display frame buffer memory 1021.
Preferably, after standby display frame buffer memory 1022 has upgraded, central processing unit 101 sends one to display controller 103 and switches the order of display frame buffer memory;
Preferably, when switching condition meets, display controller 103 produces interrupt request, and this interrupt request is sent to central processing unit 101;
Preferably, switching condition is:
The total data of N display frame in main display frame buffer memory 1021 has been read into display controller 103, and does not arrive looking ahead constantly of (N+1) individual display frame.
Preferably, switching condition is:
The total data of N display frame in main display frame buffer memory 1021 has been read into display controller 103, and by display device 104, has all shown, and do not arrive looking ahead constantly of (N+1) individual display frame.
Preferably, display controller 103 produces interrupt request, and after this interrupt request is sent to central processing unit 101, also comprises:
Preferably, switching condition is:
The partial data of N display frame has been read into display controller.
Preferably, display controller 103 produces interrupt request, and after this interrupt request is sent to central processing unit 101, also comprises:
Preferably, also comprise:
Main display frame buffer memory 1021 does not allow to be updated, and, when main display frame buffer memory 1021 is read, does not allow write operation.
Therefore, the display system that adopts the embodiment of the present invention one to provide, does not need to wait for field sync signal pulse, can shorten the switching time of main display frame buffer memory and standby display frame buffer memory; Expand video image and process the minimum time scope limiting.In some cases, can make the data more demonstration of morning on display device in off-the-shelf standby display frame buffer memory, that is to say and can shorten display delayed, accelerate the renewal of display frame.
Embodiment bis-
In some optional embodiments, a kind of method of switching for realizing display frame buffer memory is provided, as shown in Figure 2, comprising:
Step S201, display controller 103 reads current N display frame from main display frame buffer memory 1021, and sends to display 103 and show; Central processing unit 101 or miscellaneous equipment 105 are (N+1) individual frame by the Data Update of standby display frame buffer memory 1022;
Step S202, after in standby display frame buffer memory 1022, the display frame of storage has upgraded, CPU101 sends one to display controller 103 and switches the order of display frame buffer memory, by display controller 103, judges whether switching condition meets;
Step S203, after display controller 103 is received this switching display frame buffer memory order, according to current N the situation that display frame is read in main display frame buffer memory 1021, judges whether switching condition meets;
If switching condition meets, display controller 103 produces interrupt request, and this interrupt request is sent to central processing unit 103;
Step S204, central processing unit 101 is received after this interrupt request, responds this interrupt request, indication blocked operation, switches the standby display frame buffer memory in driver 1022 and main display frame buffer memory 1021.
Preferably, switching condition can be:
The total data of N display frame in main display frame buffer memory 1021 has been read into display controller 103, and does not arrive looking ahead constantly of (N+1) individual display frame.
Preferably, switching condition can be:
The total data of N display frame in main display frame buffer memory 1021 has been read into display controller 103, and by display device 104, has all shown, and do not arrive looking ahead constantly of (N+1) individual display frame.
Step S205, display controller 103 judges whether to have read the data of current N the display frame in switching standby display frame buffer memory (main display frame buffer memory before switching), if read, read (N+1) the individual display frame in the main display frame buffer memory (standby display frame buffer memory before switching) after switching, and send to display device 104 to show, therefore, (N+1) individual display frame of display device 104 is by (N+1) the individual display frame in the main display frame buffer memory showing after switching.
So circulation, goes round and begins again.
Therefore, the method that adopts the embodiment of the present invention two to provide, does not need to wait for field sync signal pulse, can shorten the switching time of main display frame buffer memory and standby display frame buffer memory; Expand video image and process the minimum time scope limiting.In some cases, can make the data more demonstration of morning on display device in off-the-shelf standby display frame buffer memory, that is to say and can shorten display delayed, accelerate the renewal of display frame.
Embodiment tri-
In some optional embodiments, a kind of method of switching for realizing display frame buffer memory is provided, as shown in Figure 3, comprising:
Step S301, display controller 103 reads current N display frame from main display frame buffer memory 1021, and sends to display 103 and show; Central processing unit 101 or miscellaneous equipment 105 are (N+1) individual frame by the Data Update of standby display frame buffer memory 1022;
Step S302, after in standby display frame buffer memory 1022, the display frame of storage has upgraded, CPU101 sends one to display controller 103 and switches the order of display frame buffer memory, by display controller 103, judges whether switching condition meets;
Step S303, after display controller 103 is received this switching display frame buffer memory order, according to current N the situation that display frame is read in main display frame buffer memory 1021, judges whether switching condition meets;
If switching condition meets, display controller 103 produces interrupt request, and this interrupt request is sent to central processing unit 103;
Step S304, central processing unit 101 is received after this interrupt request, responds this interrupt request, indication blocked operation, switches the standby display frame buffer memory in driver 1022 and main display frame buffer memory 1021.
Preferably, different from embodiment bis-, switching condition is:
The partial data of N display frame in main display frame buffer memory 1021 has been read into display controller 103;
Step S305, display controller 103 judges whether to have read the data of current N the display frame in switching standby display frame buffer memory (main display frame buffer memory before switching), if do not read, after first reading the remaining data of N display frame, read again (N+1) the individual display frame in the main display frame buffer memory (standby display frame buffer memory before switching) after switching, and send to display device 104 to show, therefore, (N+1) individual display frame of display device 104 is by (N+1) the individual display frame in the main display frame buffer memory showing after switching.
So circulation, goes round and begins again.
Therefore, the method that adopts the embodiment of the present invention two to provide, does not need to wait for field sync signal pulse, can shorten the switching time of main display frame buffer memory and standby display frame buffer memory; Expand video image and process the minimum time scope limiting.In some cases, can make the data more demonstration of morning on display device in off-the-shelf standby display frame buffer memory, that is to say and can shorten display delayed, accelerate the renewal of display frame.And, do not need to have read total data and just can switch, thereby the space that has not been read data can be partially updated, improved the efficiency of system.
Embodiment tetra-
In some optional embodiments, a kind of method that display frame buffer memory switches that realizes is also provided, Fig. 4 is a kind of method flow diagram that display frame buffer memory switches of realizing.Display system based on described in embodiment mono-, the method is different from the method for side described in embodiment bis-and embodiment tri-: the method is separated central processing unit and display controller work to be separately described, as shown in Figure 4, the dotted line left side is the work that central processing unit completes, and dotted line the right is the work that display controller completes.The specific descriptions of the method are as follows:
Display controller 103:
From main display frame buffer memory 1021, read current N display frame, and send to display 104 and show;
Central processing unit 101:
By the Data Update in standby display frame buffer memory 1022, it is (N+1) individual frame;
After renewal completes, CPU101 sends one to display controller 103 and switches the order of display frame buffer memory, by display controller 103, judges whether switching condition meets;
Display controller 103:
After receiving this switching display frame buffer memory order, according to current N the situation that display frame is read in main display frame buffer memory 1021, judge whether switching condition meets;
If the condition of switching meets, produce interrupt request, and this interrupt request is sent to central processing unit 101.
The display frame of the main display frame buffer memory after the demonstration of the then data of reading displayed frame, and preparation is switched.
Central processing unit:
Wait for new interrupt request, if receive after this interrupt request, respond this interrupt request, and indicate blocked operation, the main display frame buffer memory in driver 1021 and standby display frame buffer memory 1022 are switched;
If do not receive, continue to wait for.
Therefore, adopt the embodiment of the embodiment of the present invention four, do not need to wait for field sync signal pulse, can shorten the switching time of main display frame buffer memory and standby display frame buffer memory; Expand video image and process the minimum time scope limiting.In some cases, can make the data more demonstration of morning on display device in off-the-shelf standby display frame buffer memory, that is to say and can shorten display delayed, accelerate the renewal of display frame.
Unless otherwise specific statement, term such as processing, calculating, computing, determine, show etc. that action and/or the process that can refer to one or more processing or computing system or similar devices, described action and/or process will be expressed as the register of disposal system or the data manipulation of the physics in memory device (as electronics) amount and be converted into other data of the physical quantity in memory device, register or other this type of information storages, transmitting or the display device that is expressed as similarly disposal system.Information and signal can be with any expressions the in multiple different technology and method.For example, data, instruction, order, information, signal, bit, symbol and the chip of mentioning in the description on run through can represent by voltage, electric current, electromagnetic wave, magnetic field or particle, light field or particle or its combination in any.
Should be understood that the particular order of the step in disclosed process or the example that level is illustrative methods.Based on design preference, should be appreciated that, the particular order of the step in process or level can be rearranged in the situation that not departing from protection domain of the present disclosure.Appended claim to a method has provided the key element of various steps with exemplary order, and is not to be limited to described particular order or level.
In above-mentioned detailed description, various features are combined in single embodiment together, to simplify the disclosure.This open method should be interpreted as reflecting such intention, that is, the embodiment of theme required for protection needs the more feature of feature of clearly stating in each claim.On the contrary, as reflected in appending claims, the present invention is in the state fewer than whole features of disclosed single embodiment.Therefore, appending claims is clearly merged in detailed description hereby, and wherein every claim is alone as the independent preferred embodiment of the present invention.
Those skilled in the art it is also understood that various illustrative box, module, circuit and the algorithm steps in conjunction with embodiment herein, described all can be embodied as electronic hardware, computer software or its combination.For the interchangeability between hardware and software is clearly described, above various illustrative parts, frame, module, circuit and step have all been carried out usually describing around its function.As for this function, be embodied as hardware or be embodied as software, depend on specific application and the design constraint that whole system is applied.Those skilled in the art can realize described function in flexible mode for each application-specific, still, thisly realize decision-making and should not be construed as and deviate from protection domain of the present disclosure.
In conjunction with the described method of embodiment herein or the step of algorithm, can directly be presented as hardware, the software module of being carried out by processor or its combination.Software module can be arranged in the storage medium of RAM memory device, flash memory, ROM memory device, EPROM memory device, EEPROM memory device, register, hard disk, mobile disk, CD-ROM or any other form well known in the art.Exemplary storage medium is connected to a processor, thereby makes the processor can be from this read information, and can be to this storage medium writing information.Certainly, storage medium can be also the ingredient of processor.Processor and storage medium can be arranged in ASIC.This ASIC can be arranged in user terminal.Certainly, processor and storage medium also can be used as discrete assembly and are present in user terminal.
For software, realize, the technology of describing in the application can for example, realize by the module (, process, function etc.) of function described in execution the application.These software codes can be stored in memory device unit and be carried out by processor.Memory device unit can be realized in processor, also can realize outside processor, and under latter event, it is coupled to processor by correspondence via various means, and these are all well known in the art.
Description above comprises giving an example of one or more embodiment.Certainly, all possible combination of describing parts or method in order to describe above-described embodiment is impossible, but those of ordinary skills should be realized that, each embodiment can do further combinations and permutations.Therefore, embodiment described herein is intended to contain all such changes, modifications and variations in the protection domain that falls into appended claims.In addition, with regard to the term using in instructions or claims, " comprise ", the mode that contains of this word is similar to term and " comprises ", and that just as " comprising, ", explains in the claims as link word is such.In addition, use any one term in the instructions of claims " or " be to represent " non-exclusionism or ".
Claims (17)
1. a method of switching for realizing display frame buffer memory, is characterized in that, comprising:
From main display frame buffer memory, read current N display frame, and send to display and show;
By the Data Update in standby display frame buffer memory, it is (N+1) individual frame;
After described standby display frame buffer update completes, according to current N the situation that display frame is read in described main display frame buffer memory, judge whether switching condition meets;
If described switching condition meets, described standby display frame buffer memory and described main display frame buffer memory in driver are switched.
2. the method for claim 1, is characterized in that, also comprises:
After described standby display frame buffer update completes, central processing unit sends one to described display controller and switches the order of display frame buffer memory, by described display controller, judges whether switching condition meets.
3. the method for claim 1, is characterized in that, also comprises:
When described switching condition meets, described display controller produces interrupt request, and this interrupt request is sent to described central processing unit; Described central processing unit responds this interrupt request, indication blocked operation.
4. method as claimed in claim 3, is characterized in that, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and does not arrive looking ahead constantly of (N+1) individual display frame.
5. method as claimed in claim 3, is characterized in that, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and by described display device, has all been shown, and does not arrive looking ahead constantly of (N+1) individual display frame.
6. the method as described in claim 4 or 5, is characterized in that, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read the data of current N the display frame in switching standby display frame buffer memory, if read, reads (N+1) the individual display frame in the main display frame buffer memory after switching, and sends to display device to show.
7. method as claimed in claim 3, is characterized in that, described switching condition is:
The partial data of N display frame in described main display frame buffer memory has been read into display controller.
8. method as claimed in claim 7, is characterized in that, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if do not read, after first reading the remaining data of N display frame, read again (N+1) the individual display frame in the main display frame buffer memory after switching, and send to display device to show.
9. a display system, is characterized in that, comprising: central processing unit, memory device, display controller, display device and miscellaneous equipment; Wherein, described memory device at least comprises main display frame buffer memory and standby display frame buffer memory;
Described central processing unit, for controlling described display controller, also for described main display frame buffer memory and described standby display frame buffer memory are switched;
Described memory device, for storing display frame;
Described display controller for from described main display frame buffer memory reading displayed frame, sends to described display device after certain processing; Also for generating interrupt request, and send it to central processing unit;
Described display device, for being shown as image by display frame;
Described main display frame buffer memory, for storing current N the display frame that is being read and is showing;
Described standby display frame buffer memory, for storing (N+1) individual display frame;
Described display controller reads current N display frame from described main display frame buffer memory, and sends to described display and show;
Described central processing unit or described miscellaneous equipment are (N+1) individual frame by the Data Update in described standby display frame buffer memory, after renewal completes, described display controller, according to current N the situation that display frame is read in described main display frame buffer memory, judges whether switching condition meets;
If described switching condition meets, described central processing unit switches described standby display frame buffer memory and described main display frame buffer memory in driver.
10. display system as claimed in claim 9, is characterized in that,
After described standby display frame buffer update completes, described central processing unit sends one to described display controller and switches the order of display frame buffer memory;
Described display controller is received after this order, judges whether switching condition meets.
11. display systems as claimed in claim 9, is characterized in that,
When described switching condition meets, described display controller produces interrupt request, and this interrupt request is sent to described central processing unit;
Described central processing unit responds this interrupt request, indication blocked operation.
12. display systems as claimed in claim 11, is characterized in that, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and does not arrive looking ahead constantly of (N+1) individual display frame.
13. display systems as claimed in claim 11, is characterized in that, described switching condition is:
The total data of N display frame in described main display frame buffer memory has been read into described display controller, and by described display device, has all been shown, and does not arrive looking ahead constantly of (N+1) individual display frame.
14. display systems as described in claim 12 or 13, is characterized in that, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if read, reads (N+1) the individual display frame in the main display frame buffer memory after switching, and sends to display device to show.
15. display systems as claimed in claim 11, is characterized in that, described switching condition is:
The partial data of N display frame has been read into display controller.
16. display systems as claimed in claim 15, is characterized in that, described display controller produces interrupt request, and after this interrupt request is sent to described central processing unit, also comprises:
Described display controller judges whether to have read current N the display frame in switching standby display frame buffer memory, if do not read, after first reading the remaining data of N display frame, read again (N+1) the individual display frame in the main display frame buffer memory after switching, and send to display device to show.
17. display systems as claimed in claim 9, is characterized in that, also comprise:
Described main display frame buffer memory does not allow to be updated, and, when described main display frame buffer memory is read, does not allow write operation.
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