CN103678080A - Backboard device and control method based on PXI architecture - Google Patents
Backboard device and control method based on PXI architecture Download PDFInfo
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- CN103678080A CN103678080A CN201310687612.8A CN201310687612A CN103678080A CN 103678080 A CN103678080 A CN 103678080A CN 201310687612 A CN201310687612 A CN 201310687612A CN 103678080 A CN103678080 A CN 103678080A
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Abstract
The invention provides a backboard device and control method based on a PXI architecture. The backboard device comprises a PXI interface slot, a power supply switching circuit, an FPGA circuit and a connector. The PXI interface slot is used for providing control signals and a power supply; the power supply switching circuit is used for achieving PXI interface control; the FPGA circuit is used for achieving a 100M clock, triggering and synchronization; the connector is used for providing a 3.3V voltage, a 5.0V voltage, a -12.0V voltage and a 12.0V voltage. Due to the adoption of the technical scheme, universality of the backboard device based on the PXI architecture is achieved, and development is carried out by a developer just once to meet most using requirements; due to intelligent control, power supply interference can be reduced.
Description
Technical field
The invention belongs to technical field of measurement and test, in particular a kind of back board device and control method based on PXI framework.
Background technology
From over 1998, PXI industry standard promptly obtains in Auto-Test System field and adopts and broad development, and related field is from military and Aero-Space, consumer electronics product, and communication system is to process control and industrial automation etc.The feature small-sized, efficient, synthetic instrument of PXI module instrument is firmly got liking of user, and the demand in market causes original a lot of desk-top instrument need use the modular implementation of PXI now, and this brings very large difficulty to projector.It is 10cm * 16cm that PXI framework requires the physical size of each board, and the actual space that can be used for wiring, mask placement device can not be greater than 9.5cm * 14.5cm, and each plug-in card also needs to provide the general character circuit such as power supply, bus interface, can may be lower than 9.5cm * 10cm for the area of Functional Design.And a lot of instruments complexity very just needed the combination of polylith board originally, it is just more difficult under the framework of PXI, to realize.Particularly PXI framework requires the element height at the back side can not be greater than 2mm, and a lot of devices all may limit higher than this.Multiple situation causes, and PXI framework need to design the very board of polylith in design during complex instrument, needs interconnectedly frequently between board, for high-performance instrument, is catastrophic.The present invention, by a kind of general back board device of design, has expanded free space greatly, the interconnected frequent degree of board of reduction, and general character function is integrated, improve greatly development efficiency, reduce costs, improved the reliability of product.
Current technical scheme is mainly two kinds: the first string is that a lot of functional circuits are integrated into a front panel, and general character circuit is proposed; Second scheme is configuration circuit as required, general character circuit do not proposed.
The first string in such scheme, is integrated into a front panel by a lot of functional circuits, and general character circuit is proposed, also increased the usage space of circuit, but make the modules can not be independent, do not meet the synthetic instrument feature of the requirement of modular instrument, reduced the dirigibility of using.
Second scheme in such scheme, design circuit, can cause much the same circuit repeatedly to design as required, has reduced reliability, has increased and has designed abnormal Unpredictability.And the structural requirement of restricted and PXI framework, can not maximizedly utilize space, make circuit when wiring mask placement device, bring great trouble.
Above-mentioned two schemes also have the shortcoming of a general character be exactly all not by maximize may use about general character circuit design such as power supply, interfaces, become a general device, the triggering of backboard, clock, the signal such as synchronous are not connected to front panel yet.
Therefore, there is defect in prior art, needs to improve.
Summary of the invention
Technical matters to be solved by this invention is for the deficiencies in the prior art, and a kind of back board device and control method based on PXI framework is provided.
Technical scheme of the present invention is as follows:
A back board device based on PXI framework, wherein, comprises at least one PXI interface slot, power-switching circuit, FPGA circuit and connector; Described PXI interface slot, for providing control signal and power supply; Described power-switching circuit, controls for realizing PXI interface; Described FPGA circuit, for realizing 100M clock, triggering, synchronous; Described connector, for the 3.3V, the 5.0V that provide and ± four voltages of 12.0V.
The described back board device based on PXI framework, wherein, described power-switching circuit, for by 3.3V, 5.0V and ± 12.0V is converted to 6.1V, 9.0V, 3.3V, ± 12.0V, ± 28.0V ,-7V, 1.2V, ± 15.0V, 2.5V, ± 16.0V and 29V voltage.
The described back board device based on PXI framework, wherein, described PXI interface slot is integrated in FPGA inside circuit.
The described back board device based on PXI framework, wherein, described power-switching circuit, for being connected to connector by the power supply converting; Described FPGA circuit, reaches connector for resolving to single I/O control pin or converting universal serial bus to.
The described back board device based on PXI framework, wherein, described PXI interface slot comprises function version and backboard, between described backboard and feature board, distance is 10mm; The space that retains 4mm between the edge of feature board and PXI interface slot; Between the edge of backboard and PXI interface slot, according to standard, retain 2mm.
The described back board device based on PXI framework, wherein, between feature board and backboard, the space of 2mm has on average been reserved in both sides, and with the space of the reserved 15mm of PXI interface slot.
A back board device control method based on PXI framework, wherein, comprises the following steps:
Step 1, goes here and there the data of PXI bus and address command and changes by FPGA, resolve to serial or I/0 control signal;
Step 2, arranges the timing requirement of 3.5ms in FPGA inside, by the data of monitoring temperature, regularly to host computer, send, and obliterated data when PXI interface is busy is set, and waits for the arbitration of FPGA;
Step 3, the digital signal order according to host computer through the input of PXI bus, selects disconnected or logical power supply;
Step 4, whether the digital signal order according to host computer through PXI bus input, select to trigger, derivation and the calibration of 100M clock and synchronizing signal.
Control method as claimed in claim 7, is characterized in that, the described calibration in described step 4 is to realize by the delayed clock of modulation FPGA inside or the constraint of IO pin.
Adopt such scheme, realized the versatility of PXI fabric backplane device, make developer only need primary development, just can meet most uses, and the control of intelligence, the interference of power supply can be reduced; The structural design of optimizing, the space of the PXI board that extended, the expansion in space, has facilitated the design of shielding box and the placement of device; The front panel of backboard signal is derived, and has facilitated the combination of system, and the on/off based on FPGA or calibration are controlled, and have reduced the interference of signal, and postpones arbitrarily to control; Temperature every 3.5mm reads, and can reflect accurately the variation of temperature, can reduce again bus and occupy.
Accompanying drawing explanation
Fig. 1 is that back board device of the present invention is realized block diagram.
Fig. 2 is the back board device structure side view of one embodiment of the invention.
Fig. 3 is the back board device structure front elevation of one embodiment of the invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
As Figure 1-3, signal, the power-switching circuit 10 that apparatus of the present invention will be provided by PXI interface slot (not shown), for interface, control, power-switching circuit can be any type, and 100M clock, triggering, FPGA circuit 11 and the connector 12 of controlling such as synchronous form.Ultimate principle illustrates with an embodiment: be 3.3V, 5.0V that the standard connector of PXI is provided and ± four voltages of 12.0V, convert 6.1V, 9.0V, 3.3V, ± 12.0V, ± 28.0V ,-7V, 1.2V, ± 15.0V, 2.5V, ± 16.0V and 29V to, the concrete circuit that offers feature board 20 by connector 12 is used.FPGA11 realize inside PXI interface, and realize and to convert PXI interface content to SPI universal serial bus and to realize the Based Intelligent Control of power supply and clock, triggering, synchronous calibration and control.
Intelligent power mainly refers to disconnection or the connection that can realize a certain road power supply, can, by arranging, the power supply converting be all connected to connector 12; Also, for control command is resolved by FPGA, can be construed to the control pin of single IO, also can convert universal serial bus to, reach connector 12.The clock of 100MHz, isopachics signal, realize the switching of PXI interface and front panel by FPGA11, can realize on/off, and the calibration and the adjusting that according to the different needs of user, postpone.Temperature sensor converts the temperature information of perception to digital signal serial and delivers to FPGA, then shows or other application.
Of the present invention is mainly versatility, comprising: comprehensively power supply conversion, the structural design of optimizing, the front panel of backboard signal are derived and signal resolution by FPGA of the calibration of these signals based on FPGA or delay technology, PXI interface signal or serial conversion, the interval temperature of 3.5 seconds are changed in real time and read.
Comprehensively power supply conversion, refers to the power supply electrical level that 6.1V, 9.0V, 3.3V, ± 12.0V, ± 28.0V ,-7V, 1.2V, ± 15.0V, 2.5V, ± 16.0V and 29V are provided.
The optimizing structure design of mentioning in above-mentioned, as shown in Figure 2, described PXI interface slot comprises backboard 30 and function version 20, a plurality of for drawing together in this device of PXI interface slot more, and the structure of each PXI interface slot is all identical.The space that has retained 10mm between backboard 30 and function version 20, the another side of function version 20 and groove edge retain the space of 4mm; As shown in Figure 3, the front of apparatus structure, the space of 2mm has on average been reserved in the both sides between function version 20 and backboard 30, and the space of the reserved 15mm of the top of function version and PXI interface slot or proximity.
The front panel of the backboard signal in above-mentioned is derived and calibration or the delay technology of these signals based on FPGA, by the 100M clock signal of backboard, isopachics signal by backboard fexible unit, from front panel, derive, and delay or the rated capacity of the signal based on FPGA are provided, and have strengthened driving by level conversion.
Embodiment 2
On the basis of above-described embodiment, as shown in Figure 1-Figure 3, back board device of the present invention is further illustrated, back board device, comprises at least one PXI interface slot, power-switching circuit 10, FPGA circuit 11 and connector 12; Described PXI interface slot, for providing control signal and power supply; Described power-switching circuit 10, controls for realizing PXI interface; Described FPGA circuit 11, for realizing 100M clock, triggering, synchronous; Described connector 12, for the 3.3V, the 5.0V that provide and ± four voltages of 12.0V.
Described power-switching circuit 10, for by 3.3V, 5.0V and ± 12.0V is converted to 6.1V, 9.0V, 3.3V, ± 12.0V, ± 28.0V ,-7V, 1.2V, ± 15.0V, 2.5V, ± 16.0V and 29V voltage.
Described PXI interface slot is integrated in FPGA circuit 11 inside.
Described power-switching circuit 10, for being connected to connector by the power supply converting; Described FPGA circuit 11, reaches connector for resolving to single I/O control pin or converting universal serial bus to.
Described PXI interface slot comprises function version 20 and backboard 30, and between described backboard 30 and feature board 20, distance is 10mm; The space that retains 4mm between the edge of feature board 20 and PXI interface slot; Between the edge of backboard 30 and PXI interface slot, according to standard, retain 2mm.
Between feature board 20 and backboard 30, the space of 2mm has on average been reserved in both sides, and with the space of the reserved 15mm of PXI interface slot.
Embodiment 3
On the basis of above-described embodiment, the present invention also provides a kind of general back board device control method based on PXI framework, comprises the following steps:
Step 1, goes here and there the data of PXI bus and address command and changes by FPGA, resolve to serial or I/0 control signal;
Step 2, arranges the timing requirement of 3.5ms in FPGA inside, by the data of monitoring temperature, regularly to host computer, send, and obliterated data when PXI interface is busy is set, and waits for the arbitration of FPGA;
Step 3, the digital signal order according to host computer through the input of PXI bus, selects disconnected or logical power supply;
Step 4, whether the digital signal order according to host computer through PXI bus input, select to trigger, derivation and the calibration of 100M clock and synchronizing signal.
Described calibration in described step 4 is to realize by the delayed clock of modulation FPGA inside or the constraint of IO pin.
Adopt such scheme, realized the versatility of PXI fabric backplane device, make developer only need primary development, just can meet most uses, and the control of intelligence, the interference of power supply can be reduced; The structural design of optimizing, the space of the PXI board that extended, the expansion in space, has facilitated the design of shielding box and the placement of device; The front panel of backboard signal is derived, and has facilitated the combination of system, and the on/off based on FPGA or calibration are controlled, and have reduced the interference of signal, and postpones arbitrarily to control; Temperature every 3.5mm reads, and can reflect accurately the variation of temperature, can reduce again bus and occupy.
Should be understood that, for those of ordinary skills, can be improved according to the above description or convert, and all these improvement and conversion all should belong to the protection domain of claims of the present invention.
Claims (8)
1. the back board device based on PXI framework, is characterized in that, comprises at least one PXI interface slot, power-switching circuit, FPGA circuit and connector; Described PXI interface slot, for providing control signal and power supply; Described power-switching circuit, controls for realizing PXI interface; Described FPGA circuit, for realizing 100M clock, triggering, synchronous; Described connector, for the 3.3V, the 5.0V that provide and ± four voltages of 12.0V.
2. the back board device based on PXI framework as claimed in claim 1, it is characterized in that, described power-switching circuit, for by 3.3V, 5.0V and ± 12.0V is converted to 6.1V, 9.0V, 3.3V, ± 12.0V, ± 28.0V ,-7V, 1.2V, ± 15.0V, 2.5V, ± 16.0V and 29V voltage.
3. the back board device based on PXI framework as claimed in claim 1, is characterized in that, described PXI interface slot is integrated in FPGA inside circuit.
4. the back board device based on PXI framework as claimed in claim 1, is characterized in that, described power-switching circuit, for being connected to connector by the power supply converting; Described FPGA circuit, reaches connector for resolving to single I/O control pin or converting universal serial bus to.
5. the back board device based on PXI framework as claimed in claim 1, is characterized in that, described PXI interface slot comprises function version and backboard, and between described backboard and feature board, distance is 10mm; The space that retains 4mm between the edge of feature board and PXI interface slot; Between the edge of backboard and PXI interface slot, according to standard, retain 2mm.
6. the back board device based on PXI framework as claimed in claim 1, is characterized in that, between feature board and backboard, the space of 2mm has on average been reserved in both sides, and with the space of the reserved 15mm of PXI interface slot.
7. the back board device control method based on PXI framework, is characterized in that, comprises the following steps:
Step 1, goes here and there the data of PXI bus and address command and changes by FPGA, resolve to serial or I/0 control signal;
Step 2, arranges the timing requirement of 3.5ms in FPGA inside, by the data of monitoring temperature, regularly to host computer, send, and obliterated data when PXI interface is busy is set, and waits for the arbitration of FPGA;
Step 3, the digital signal order according to host computer through the input of PXI bus, selects disconnected or logical power supply;
Step 4, whether the digital signal order according to host computer through PXI bus input, select to trigger, derivation and the calibration of 100M clock and synchronizing signal.
8. control method as claimed in claim 7, is characterized in that, the described calibration in described step 4 is to realize by the delayed clock of modulation FPGA inside or the constraint of IO pin.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310687612.8A CN103678080A (en) | 2013-12-16 | 2013-12-16 | Backboard device and control method based on PXI architecture |
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| CN201310687612.8A CN103678080A (en) | 2013-12-16 | 2013-12-16 | Backboard device and control method based on PXI architecture |
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Cited By (2)
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| CN107291643A (en) * | 2017-06-24 | 2017-10-24 | 北京华睿集成科技有限公司 | modular substrate and modular instrument |
| CN109496178A (en) * | 2017-06-01 | 2019-03-19 | 深圳配天智能技术研究院有限公司 | Multiaxis driver, numerical control system and multi-axis robot |
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Application publication date: 20140326 |