CN103676933A - MVB (multifunction vehicle bus) analysis device - Google Patents
MVB (multifunction vehicle bus) analysis device Download PDFInfo
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- CN103676933A CN103676933A CN201310594554.4A CN201310594554A CN103676933A CN 103676933 A CN103676933 A CN 103676933A CN 201310594554 A CN201310594554 A CN 201310594554A CN 103676933 A CN103676933 A CN 103676933A
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Abstract
The invention discloses an MVB (multifunction vehicle bus) analysis device comprising an interface conversion module, an FPGA module, an STM32 microcontroller chip and a serial port communication module. The STM32 microcontroller chip is used for acquiring and encoding data to be transmitted and transmitting the data to be transmitted, to an MVB through the port conversion module. The FPGA module is further used for acquiring data frames which are transmitted in the MVB, and transforming the format. The STM32 microcontroller chip is further used for decoding the acquired data frames and transmitting the decoded data frames to an upper computer. The MVB analysis device has the advantages that monitoring response data frames of equipment on the MVB is achieved, multiple MVB devices can be automatically monitored in real time, faults of the MVB devices can be found quickly, and the efficiency in monitoring MVB devices can be greatly improved.
Description
Technical field
The present invention relates to a kind of MVB bus analysis equipment.
Background technology
MVB bus is MVB, is that a kind of being mainly used in (but being also not exclusively used in) is to there being the serial data communications busses between interoperability and the interconnect equipment of interchangeability requirement.MVB bus is main a kind of communication bus agreement of using on modern railway transportation vehicle.And due to the increasing of subway MVB equipment, the monitoring of MVB equipment is become to more and more important for the normal operation of modern railway transportation vehicle.Meanwhile, for the detection of MVB equipment, still must manually to MVB equipment, detect one by one, to determine whether each MVB equipment normally works, and this need to expend a large amount of manpower and materials, and detection efficiency is low.
Summary of the invention
The technical problem to be solved in the present invention is to the monitoring of MVB equipment, must carry out one by one artificial detection in order to overcome in prior art for MVB equipment, could determine whether each MVB equipment normally works, thereby expend a large amount of manpower and materials, the low defect of detection efficiency, a kind of MVB bus analysis equipment is proposed.
The present invention solves above-mentioned technical matters by following technical proposals:
The invention provides a kind of MVB bus analysis equipment, its feature is, comprises interface modular converter, FPGA module, STM32 microcontroller chip and serial communication module.STM32 microcontroller chip is for obtaining data to be sent and be data encoding to be sent, data to be sent transmitting control signal and encode to FPGA module then from host computer via serial communication module, FPGA module for the data to be sent after coding are converted to MVB data frame format, and according to the control signal receiving via interface modular converter the data to be sent to MVB bus transfer MVB data frame format.FPGA module is also for gather the MVB Frame that MVB bus transmits the Frame that MVB Frame is converted to a default numeral system via interface modular converter, and STM32 microcontroller chip is also for obtaining the Frame of this default numeral system and decoding, then decoded Frame be sent to host computer via serial communication module from FPGA module.
Data transmission in MVB bus adopts Synchronization (Manchester Encoding) mode.Electric level signal low level in a transmission cycle represents code element " 1 " to the saltus step of high level, and level signal high level in a transmission cycle represents code element " 0 " to low level saltus step.The Frame transmitting in MVB bus can be divided into prime frame and from frame two classes.Above-mentionedly by STM32 microcontroller chip, from host computer, obtain data to be sent, and by FPGA, the data to be sent after coding are converted to MVB data frame format to the process of the data to be sent of MVB bus transfer, be equivalent to send the process of prime frame.Above-mentioned FPGA gathers MVB Frame conversion, and then STM32 microcontroller chip, by the process of obtaining Frame and decode and be sent to host computer, is equivalent to gather parsing from the process of frame.
Wherein, prime frame mainly plays the function of data inquiry and status poll, and the responsive data frame that is prime frame from frame.Prime frame structure is followed successively by: start delimiter, 16 prime frame data (comprising the information such as status function word and port address), 8 Cyclic Redundancy Check sequences and stop delimiter; From frame structure, be followed successively by: start delimiter, frame data (figure place can be 16,32,64 or 128), CRC check sequence and termination delimiter.
Those skilled in the art are to be understood that, due to FPGA(field programmable gate array) module via interface modular converter the data to be sent to MVB bus transfer MVB data frame format, therefore this part data to be sent is for other equipment in MVB bus and bus and in the MVB bus of making peace, the form of the data of transmission is identical originally, and other equipment in MVB bus can be made a response to this part data to be sent in a usual manner.Such as corresponding equipment returns to the responsive data frame corresponding with data to be sent by MVB bus.On the other hand, the MVB Frame that FPGA module is also transmitted for gathering MVB bus, the MVB Frame being equivalent to transmitting in MVB bus is monitored.If the equipment in MVB bus breaks down, can in bus, transmit corresponding Frame, and after gathering, carry out conversion and the decoding of STM32 microcontroller chip to Frame of Frame, make the host computer can be more directly to data analysis, thereby judge whether the equipment in MVB bus breaks down.
Wherein, this serial communication module can adopt RS232 interface.STM32 microcontroller chip is a serial chip product based on aiming at the custom-designed ARM Cortex-M3 of the Embedded Application kernel that requires high-performance, low cost, low-power consumption.
Preferably, FPGA module is for being converted to the data to be sent of MVB data frame format to meet the speed of MVB consensus standard to MVB bus transfer.
So just make FPGA consistent with the transfer rate of other data of transmitting in MVB bus to the transfer rate of MVB bus transfer data via interface modular converter, thereby avoid producing any interference for the original data transmission of MVB bus.
Preferably, the integral multiple code check that the speed that meets MVB consensus standard described in is 1.5Mbit/s.
Preferably, STM32 microcontroller chip is for being data encoding to be sent according to IEC61375 agreement.
It will be appreciated by those skilled in the art that Mbit/s is code check unit, i.e. MBPS, and IEC61375 agreement is a kind of international standard protocol about train bus-line.
Preferably, after the MVB Frame that FPGA module is used for transmitting in collection MVB bus, first the frame start delimiter in MVB Frame and frame are stopped to delimiter removal, and then MVB Frame is converted to the Frame of this default numeral system.
Remove frame start delimiter and frame and stopped, after delimiter, can effectively reducing the size of MVB Frame, still retained the effective information in Frame simultaneously.
Preferably, this present count is made as 16 systems.
The MVB Frame of 2 systems is converted to after 16 systems, and the data of transmitting between FPGA module, STM32 microcontroller chip, serial communication module and host computer become less, can complete quickly data transmission.
Preferably, this MVB bus analysis equipment also comprises uCOS-II real time operating system, for controlling FPGA module and STM32 microcontroller chip.That is to say, by uCOS-II real time operating system, dispatch each function that realizes FPGA module and STM32 microcontroller chip.UCOS-II is to be a kind of the Realtime Operating System Nucleus of the Embedded Application design of computing machine specially, its most codes C language compilation.
Meeting on the basis of this area general knowledge, above-mentioned each optimum condition, can combination in any, obtains the preferred embodiments of the invention.
Positive progressive effect of the present invention is:
MVB bus analysis equipment of the present invention obtains data to be sent coding by STM32 microcontroller chip, and by FPGA module the data to be sent to MVB bus transfer MVB data frame format, MVB Frame simultaneously that transmit in FPGA module acquisition and processing MVB bus, and by after the decoding of STM32 microcontroller chip, Frame being sent to host computer analysis, realized the monitoring to the responsive data frame of the equipment in MVB bus, thereby a plurality of MVB equipment of Real-Time Monitoring automatically, find rapidly the fault of MVB equipment, greatly improved the monitoring efficiency of MVB equipment.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the MVB bus analysis equipment of a preferred embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, provide preferred embodiment of the present invention, to describe technical scheme of the present invention in detail, but therefore do not limit the present invention among described scope of embodiments.
As shown in Figure 1, the MVB bus analysis equipment of a preferred embodiment of the present invention, comprises interface modular converter 1, FPGA module 2, STM32 microcontroller chip 3 and serial communication module 4.The MVB bus analysis equipment of the present embodiment is also included as a power module of above-mentioned module and chip power supply, and for controlling the uCOS-II real time operating system (not shown in figure 1) of FPGA module 2 and STM32 microcontroller chip 3.
FPGA module 2 is also for gathering MVB Frame that MVB bus transmits via interface modular converter 1, and first the frame start delimiter in MVB Frame and frame being stopped to the Frame that this 16 system was removed and then MVB Frame was converted to delimiter, and STM32 microcontroller chip 3 is also for obtaining the Frame of this 16 system and decoding, then decoded Frame be sent to host computer via serial communication module 4 from FPGA module 2.
The Frame transmitting in MVB bus can be divided into prime frame and from frame two classes.Above-mentionedly by STM32 microcontroller chip 3, from host computer, obtain data to be sent, and by FPGA module 2, the data to be sent after coding are converted to MVB data frame format to the process of the data to be sent of MVB bus transfer, be equivalent to send the process of prime frame.Above-mentioned FPGA module 2 gathers MVB Frame conversion, and then STM32 microcontroller chip 3 obtains Frame and decodes and is sent to the process of host computer, is equivalent to gather the process of resolving from frame.Wherein, prime frame mainly plays the function of data inquiry and status poll, and the responsive data frame that is prime frame from frame.
In the situation that the device fails in MVB bus, it can transmit corresponding Frame in bus, and after FPGA module 2 has gathered corresponding Frame and carry out after the conversion of Frame, the decoding of 3 pairs of Frames of STM32 microcontroller chip, the data that obtain after decoding make the host computer can be more directly to data analysis, thereby judge whether the equipment in MVB bus breaks down.
In the present embodiment, FPGA module 2 is for to meet the speed of MVB consensus standard, particularly, with the integral multiple code check of 1.5Mbit/s, is converted to the data to be sent of MVB data frame format to MVB bus transfer.STM32 microcontroller chip 3 is for being data encoding to be sent according to IEC61375 agreement.
Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited by appended claims.Those skilled in the art is not deviating under the prerequisite of principle of the present invention and essence, can make various changes or modifications to these embodiments, but these changes and modification all fall into protection scope of the present invention.
Claims (7)
1. a MVB bus analysis equipment, is characterized in that, comprises interface modular converter, FPGA module, STM32 microcontroller chip and serial communication module;
STM32 microcontroller chip is for obtaining data to be sent and be data encoding to be sent, data to be sent transmitting control signal and encode to FPGA module then from host computer via serial communication module, FPGA module for the data to be sent after coding are converted to MVB data frame format, and according to the control signal receiving via interface modular converter the data to be sent to MVB bus transfer MVB data frame format;
FPGA module is also for gather the MVB Frame that MVB bus transmits the Frame that MVB Frame is converted to a default numeral system via interface modular converter, and STM32 microcontroller chip is also for obtaining the Frame of this default numeral system and decoding, then decoded Frame be sent to host computer via serial communication module from FPGA module.
2. MVB bus analysis equipment as claimed in claim 1, is characterized in that, FPGA module is for being converted to the data to be sent of MVB data frame format to meet the speed of MVB consensus standard to MVB bus transfer.
3. MVB bus analysis equipment as claimed in claim 1, is characterized in that, it is data encoding to be sent according to IEC61375 agreement that STM32 microcontroller chip is used for.
4. MVB bus analysis equipment as claimed in claim 2, is characterized in that, described in meet the integral multiple code check that the speed of MVB consensus standard is 1.5Mbit/s.
5. MVB bus analysis equipment as claimed in claim 1, it is characterized in that, after the MVB Frame that FPGA module is used for transmitting in collection MVB bus, first the frame start delimiter in MVB Frame and frame are stopped to delimiter removal, and then MVB Frame is converted to the Frame of this default numeral system.
6. MVB bus analysis equipment as claimed in claim 1, is characterized in that, this present count is made as 16 systems.
7. MVB bus analysis equipment as claimed in claim 1, is characterized in that, this MVB bus analysis equipment also comprises uCOS-II real time operating system, for controlling FPGA module and STM32 microcontroller chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310594554.4A CN103676933A (en) | 2013-11-21 | 2013-11-21 | MVB (multifunction vehicle bus) analysis device |
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| CN201310594554.4A CN103676933A (en) | 2013-11-21 | 2013-11-21 | MVB (multifunction vehicle bus) analysis device |
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| CN103676933A true CN103676933A (en) | 2014-03-26 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106982199A (en) * | 2016-05-06 | 2017-07-25 | 深圳市永联科技股份有限公司 | A kind of Manchester code communications protocol adaptive approach based on FPGA and CPLD |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106982199A (en) * | 2016-05-06 | 2017-07-25 | 深圳市永联科技股份有限公司 | A kind of Manchester code communications protocol adaptive approach based on FPGA and CPLD |
| CN106982199B (en) * | 2016-05-06 | 2020-04-14 | 深圳市永联科技股份有限公司 | Manchester code communication protocol self-adaption method based on FPGA and CPLD |
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Application publication date: 20140326 |