CN103647258A - Battery protection-used chip cascade structure - Google Patents

Battery protection-used chip cascade structure Download PDF

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CN103647258A
CN103647258A CN201310613738.0A CN201310613738A CN103647258A CN 103647258 A CN103647258 A CN 103647258A CN 201310613738 A CN201310613738 A CN 201310613738A CN 103647258 A CN103647258 A CN 103647258A
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circuit unit
signal
pin
chip
additives
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CN103647258B (en
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尹航
王钊
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Wuxi Vimicro Corp
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Wuxi Vimicro Corp
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Abstract

The invention relates to a battery protection-used chip cascade structure. The battery protection-used chip cascade structure includes a first chip and at least one second chip; the first chip includes a first tube core and a first encapsulation tube shell; the first tube core includes a load current detection circuit unit and a charging state detection circuit unit; the input of the load current detection circuit unit is connected with a current detection tube pin of the first encapsulation tube shell through an encapsulation lead line; the input of the charging state detection circuit unit is connected with a charging detection tube pin of the first encapsulation tube shell through an encapsulation lead line; the second chip includes a first tube core and a second encapsulation tube shell; the input of the load current detection circuit unit and the input of the charging state detection circuit unit are connected with a grounding tube pin of the second encapsulation tube shell through encapsulation lead lines; the first chip and the at least one second chip are connected in series with each other so as to respectively detect the voltage of series-connected battery cores of batteries; and the first chip detects the output current of the batteries.

Description

Chip cascade structure for battery protection
Technical field
The present invention relates to the integrated circuit unit design field in microelectronic, especially for the chip cascade structure of battery protection.
Background technology
Lithium battery is widely used in every field as novel energy.In the charge and discharge process of lithium battery, require all can effectively to protect for situations such as charging overvoltage, electric discharge under voltage, overcurrents, avoid battery to damage.
Fig. 1 is an example of a kind of protective circuit of many series connection battery core lithium batteries in prior art of the present invention.In Fig. 1, adopt two identical chip MM3474 to connect to realize and carry out battery protection to thering is the lithium battery of 10 battery cores.Lower square chip controls output pin OV by charging and control of discharge output pin DCHG controls respectively conducting or the cut-off of charging controlling filed effect transistor (Charge control Field effect transistor) and control of discharge field-effect transistor (Discharge control Field effect transistor), thereby allows or do not allow described external circuit unit to carry out charge and discharge to described battery.And adopt charging to detect pin V-and detect voltage to determine whether connecting charger, adopt overcurrent to detect pin CS and detect cell load state, determine whether generation overcurrent.Because in the battery structure of battery core series connection; only need a protection chip to cell load state and whether connect charging to detect; therefore the V-pin and the CS pin that in top series connection chip, exist become redundancy pin; in the prior art; conventionally the V-pin in other chips the chip except being directly connected with control of discharge field-effect transistor with charging controlling filed effect transistor and CS pin are directly passed through to cabling ground connection on circuit board; additionally increase circuit unit plate cabling, caused the waste that accounts for plate area and cost.
Summary of the invention
The object of the invention is the defect for prior art, a kind of chip cascade structure for battery protection is provided, by by the input of load current detection circuit unit and the input of charging state detection circuit unit in the protection chip of other cascades the protection chip except being directly connected with control of discharge field-effect transistor with the controlling filed effect transistor that charges directly when the chip package, by package lead, be connected with the ground pin of encapsulating package, thereby can on encapsulating package, remove V-and the CS pin of redundancy, can make the size of encapsulating package further dwindle, also avoided the ground connection cabling of chip exterior simultaneously, thereby that has saved chip accounts for plate area, also saved cost.
In first aspect, the embodiment of the present invention provides a kind of chip cascade structure for battery protection, comprising:
The first chip, comprising: the first tube core and the first encapsulating package; Described the first tube core comprises load current detection circuit unit and charging state detection circuit unit; The input of described load current detection circuit unit is connected by package lead with the current sense pin of described the first encapsulating package; The input of described charging state detection circuit unit detects pin with the charging of described the first encapsulating package and is connected by package lead;
At least one second chip, described the second chip comprises: the first tube core and the second encapsulating package; The input of the input of described load current detection circuit unit and described charging state detection circuit unit, is connected with the ground pin of described the second encapsulating package by package lead;
Described the first chip and at least one second chip are connected in series, and respectively the voltage of the series connection battery core of battery are detected; Described the first chip detects the output current of described battery.
Preferably, described the first tube core also comprises:
Voltage sampling circuit unit, the input of described voltage sampling circuit unit is connected with the voltage detecting pin of the described first or second encapsulating package, for the voltage of described series connection battery core battery core is sampled;
Reference voltage circuit unit, the input of described reference voltage circuit unit is connected with the supply voltage input pin of the described first or second encapsulating package, for generation of reference voltage;
Comparison circuit unit, the input of described comparison circuit unit is connected with reference voltage circuit unit with described sampled voltage circuit unit, and the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
Treatment circuit unit, with described comparison circuit unit, the additives for overcharge protection signal input tube pin of the first or second encapsulating package, over signal input tube pin, described load current detection circuit unit is connected with described charging state detection circuit unit, according to described comparison signal, the signal of additives for overcharge protection signal input tube pin input, the signal of over signal input tube pin input, the output signal of the output signal of load current detection circuit unit and described charging state detection circuit unit, generating additives for overcharge protection drives signal and over to drive signal,
The first drive circuit unit, drives signal to generate additives for overcharge protection control signal according to described additives for overcharge protection; Described additives for overcharge protection control signal is by the additives for overcharge protection signal output pin of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit the first transistor, thereby allow or do not allow described external circuit unit to charge to described battery; Or, described additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin of another the second chip that described the second chip is connected, or the additives for overcharge protection signal input tube pin of described the first chip;
The second drive circuit unit, drives signal to generate over control signal according to described over; Described over control signal is by the over signal output pin of described the first encapsulating package, described over control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit transistor seconds, thereby allow or do not allow described external circuit unit to described battery discharge; Or; described over control signal; by the over signal output pin of described the second encapsulating package; described over control signal is exported to the over signal input tube pin of another the second chip that described the second chip is connected, or the over signal input tube pin of described the first chip.
Preferably, the number of pin of described the second encapsulating package is than the number of pin of described the first encapsulating package few two.
In second aspect, the embodiment of the present invention provides the another kind of chip cascade structure for battery protection, comprising:
The first chip, comprising: the first tube core and the first encapsulating package; Described the first tube core comprises load current detection circuit unit and charging state detection circuit unit; The input of described load current detection circuit unit is connected by package lead with the current sense pin of described the first encapsulating package; The input of described charging state detection circuit unit detects pin with the charging of the shell of described the first package tube and is connected by package lead;
At least one second chip, described the second chip comprises: the second tube core and the second encapsulating package; Described the second tube core comprises: in described the first tube core, remove the remaining circuit unit outside described charging state detection circuit unit and load current detection circuit unit;
Described the first chip and at least one second chip are connected in series, and respectively the voltage of the series connection battery core of battery are detected; Described the first chip detects the output current of described battery.
Preferably, described the first tube core also comprises:
The first voltage sampling circuit unit, the input of described the first voltage sampling circuit unit is connected with the voltage detecting pin of described the first encapsulating package, for the voltage of described series connection battery core battery core is sampled;
The first reference voltage circuit unit, the input of described the first reference voltage circuit unit is connected with the supply voltage input pin of described the first encapsulating package, for generation of reference voltage;
The first comparison circuit unit, the input of described the first comparison circuit unit is connected with the first reference voltage circuit unit with described the first sampled voltage circuit unit, the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
The first treatment circuit unit, with described the first comparison circuit unit, the additives for overcharge protection signal input tube pin of the first encapsulating package, over signal input tube pin, described load current detection circuit unit is connected with described charging state detection circuit unit, according to described comparison signal, the signal of additives for overcharge protection signal input tube pin input, the signal of over signal input tube pin input, the output signal of the output signal of load current detection circuit unit and described charging state detection circuit unit, generating additives for overcharge protection drives signal and over to drive signal,
The first drive circuit unit, according to described additives for overcharge protection, drive signal to generate additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit the first transistor, thereby allow or do not allow described external circuit unit to charge to described battery;
The second drive circuit unit; according to described over, drive signal to generate over control signal; by the over signal output pin of described the first encapsulating package; described over control signal is exported to external circuit unit; for controlling conducting or the cut-off of external circuit unit transistor seconds, thereby allow or do not allow described external circuit unit to described battery discharge.
Preferably, described the second tube core specifically comprises:
Second voltage sample circuit unit, the input of described second voltage sample circuit unit is connected with the voltage detecting pin of described the second encapsulating package, for the voltage of described series connection battery core battery core is sampled;
The second reference voltage circuit unit, the input of described the second reference voltage circuit unit is connected with the supply voltage input pin of described the second encapsulating package, for generation of reference voltage;
The second comparison circuit unit, the input of described the second comparison circuit unit is connected with the second reference voltage circuit unit with described the second sampled voltage circuit unit, the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
The second treatment circuit unit, be connected with over signal input tube pin with the additives for overcharge protection signal input tube pin of described the second comparison circuit unit, the second encapsulating package, according to the signal of the signal of described comparison signal, the input of additives for overcharge protection signal input tube pin and the input of over signal input tube pin, generate additives for overcharge protection and drive signal and over to drive signal;
The 3rd drive circuit unit, according to described additives for overcharge protection, drive signal to generate additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin of another the second chip that described the second chip is connected, or the additives for overcharge protection signal input tube pin of described the first chip;
The 4th drive circuit unit; according to described over, drive signal to generate over control signal; by the over signal output pin of described the second encapsulating package; described over control signal is exported to the over signal input tube pin of another the second chip that described the second chip is connected, or the over signal input tube pin of described the first chip.
Preferably, the number of pin of described the second encapsulating package is than the number of pin of described the first encapsulating package few two.
The chip cascade structure for battery protection that the embodiment of the present invention provides, by by the input of load current detection circuit unit and the input of charging state detection circuit unit in the protection chip of other cascades the protection chip except being directly connected with control of discharge field-effect transistor with the controlling filed effect transistor that charges directly when the chip package, by package lead, be connected with the ground pin of encapsulating package, thereby can on encapsulating package, remove V-and the CS pin of redundancy, can make the size of encapsulating package further dwindle, also avoided the ground connection cabling of chip exterior simultaneously, thereby that has saved chip accounts for plate area, also saved cost.
Accompanying drawing explanation
The schematic diagram of the protective circuit of a kind of many series connection battery core lithium batteries that Fig. 1 provides for prior art;
A kind of chip cascade structure for battery protection that Fig. 2 provides for the embodiment of the present invention;
The internal structure schematic diagram of the first chip that Fig. 3 provides for the embodiment of the present invention;
The internal structure schematic diagram of a kind of the second chip that Fig. 4 provides for the embodiment of the present invention;
The internal structure schematic diagram of another kind the second chip that Fig. 5 provides for the embodiment of the present invention.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
The embodiment of the present invention provides a kind of chip cascade structure for battery protection, comprising: the first chip and at least one second chip.Figure 2 shows that example, the first chip is the chip of downside in Fig. 2, and the second chip is the chip of upside in Fig. 2.The first chip and the second chip are connected in series.The pin title of the chip shown in Fig. 2 and label are only signal, and the pin title of non-limiting reality and the corresponding relation of label.
The first chip comprises: the first tube core and the first encapsulating package; Wherein, the first die package, within the first encapsulating package, only shows the pin signal of encapsulating package in Fig. 2.The syndeton of each pin and the first tube core in the first encapsulating package, and the circuit unit syndeton of the first tube core inside, the internal structure schematic diagram of chip shown in Figure 3.Described the first tube core comprises load current detection circuit unit 18 and charging state detection circuit unit 17; The input of described load current detection circuit unit 18 is connected by package lead with the current sense pin CS of described the first encapsulating package; The input of described charging state detection circuit unit 17 detects pin V-with the charging of the first encapsulating package and is connected by package lead;
The second chip comprises: the first tube core and the second encapsulating package; Wherein, the first die package, within the second encapsulating package, only shows the pin signal of encapsulating package in Fig. 2.The syndeton of each pin and the first tube core in the second encapsulating package, and the circuit unit syndeton of the first tube core inside, the internal structure schematic diagram of chip shown in Figure 4.The input of the input of described load current detection circuit unit 18 and described charging state detection circuit unit 17, is connected with the ground pin VSS (being the VSS1 and VSS2 in Fig. 2) of described the second encapsulating package by package lead.
Again as shown in Figure 2, the first chip and the second chip, respectively the voltage V to the series connection battery core of battery 1, V 2, V 3, V 4, V 5and V 6, V 7, V 8, V 9, V 10detect; The first chip detects the output current of described battery.
Concrete, the first tube core also comprises:
Voltage sampling circuit unit 11, the input of described voltage sampling circuit unit 11 is connected with voltage detecting pin V1, V2, V3, V4, the V5 of the described first or second encapsulating package, for to series connection battery core V 1-V 10in the voltage of one of them battery core sample;
Reference voltage circuit unit 12, the input of described reference voltage circuit unit 12 is connected with the supply voltage input pin VDD of the described first or second encapsulating package, for generation of reference voltage;
Further, reference voltage comprises that charging allows reference voltage and electric discharge to allow reference voltage;
Comparison circuit unit 13, the input of described comparison circuit unit 13 is connected with reference voltage circuit unit 12 with described sampled voltage circuit unit 11, and the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
Further, the voltage of the battery core that sampling is obtained allows reference voltage and electric discharge to allow reference voltage to compare with charging respectively, whether higher than charging, allows reference voltage, or allow reference voltage lower than electric discharge to differentiate the voltage of described battery core.
Treatment circuit unit 14, with described comparison circuit unit 13, the additives for overcharge protection signal input tube pin SOC of the first or second encapsulating package, over signal input tube pin SDC, described load current detection circuit unit 18 is connected with described charging state detection circuit unit 17, according to described comparison signal, the signal of additives for overcharge protection signal input tube pin SOC input, the signal of over signal input tube pin SDC input, the output signal of the output signal of load current detection circuit unit 18 and described charging state detection circuit unit 17, generating additives for overcharge protection drives signal and over to drive signal,
For example, when the voltage of battery core allows reference voltage higher than charging, comparison circuit unit 13 produces corresponding comparison signal, makes treatment circuit unit 14 produce additives for overcharge protection according to the comparison signal receiving and drives signal;
When the voltage of battery core allows reference voltage lower than electric discharge, comparison circuit unit 13 produces corresponding comparison signal, makes treatment circuit unit 14 produce over according to the comparison signal receiving and drives signal.
For example, when the signal of additives for overcharge protection signal input tube pin SOC input is " 1 ", treatment circuit unit 14 produces additives for overcharge protection according to the signal of the additives for overcharge protection signal input tube pin SOC input receiving and drives signal;
Served as the signal during for " 1 " that charges and discharge guard signal input pin SDC input, treatment circuit unit 14 produces over according to the signal of the over signal input tube pin SDC input receiving and drives signal.
Again for example, when the output signal of charging state detection circuit unit 17 is " 0 ", show not connecting charger of this battery.
Again for example, when the output signal of load current detection circuit unit 18 is " 1 ", show the overcurrent output of this battery, treatment circuit unit 14 produces over according to the output signal of the load current detection circuit unit 18 receiving and drives signal.
It should be noted that, above various only for illustrating this, technical scheme of the present invention is not formed and limited.
The first drive circuit unit 15, drives signal to generate additives for overcharge protection control signal according to described additives for overcharge protection;
Additives for overcharge protection control signal in the first chip, by the additives for overcharge protection signal output pin OV of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, be used for controlling conducting or the cut-off of external circuit unit the first transistor (be labeled as charging in Fig. 2 and control FET), thereby allow or do not allow described external circuit unit to charge to described battery;
Additives for overcharge protection control signal in the second chip, by the additives for overcharge protection signal output pin OV of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin SOC of another the second chip that described the second chip is connected, make treatment circuit unit 14 produce additives for overcharge protection and drive signal, and transmit by the cascade of a plurality of the second chips, the additives for overcharge protection signal output pin OV of final upper level the second chip by the first chip is transferred to the additives for overcharge protection signal input tube pin SOC of the first chip, and the treatment circuit unit 14 that makes the first chip produces additives for overcharge protection driving signal, by the additives for overcharge protection signal output pin OV of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, be used for controlling conducting or the cut-off of external circuit unit the first transistor (be labeled as charging in Fig. 2 and control FET), thereby allow or do not allow described external circuit unit to charge to described battery.
The second drive circuit unit 16, drives signal to generate over control signal according to described over;
Over control signal in the first chip, by the over signal output pin DCHG of described the first encapsulating package, described over control signal is exported to external circuit unit, be used for controlling conducting or the cut-off of external circuit unit transistor seconds (being labeled as discharge control FET in Fig. 2), thereby allow or do not allow described external circuit unit to described battery discharge;
Over control signal in the second chip, described over control signal, by the over signal output pin DCHG of described the second encapsulating package, described over control signal is exported to the over signal input tube pin SDC of another the second chip that described the second chip is connected, and transmit by the cascade of a plurality of the second chips, finally transfer to the over signal input tube pin SDC of described the first chip, and the treatment circuit unit 14 that makes the first chip produces over driving signal, by the over signal output pin DCHG of described the first encapsulating package, described over control signal is exported to external circuit unit, be used for controlling conducting or the cut-off of external circuit unit transistor seconds (being labeled as discharge control FET in Fig. 2), thereby allow or do not allow described external circuit unit to charge to described battery.
Therefore known, chip cascade structure for battery protection provided by the present invention, in the situation that not changing original chip design, the chip pin of redundancy is passed through to change tube core to the syndeton of encapsulating package, output on the tube core of redundancy is directly accessed to ground pin by package lead, make can save on chip-packaging structure V-and the CS pin of two redundancies, namely the number of pin of the second encapsulating package reduces two than the number of pin of described the first encapsulating package, can make like this size of the encapsulating package of the second chip further dwindle, also avoided the ground connection cabling of chip exterior simultaneously, improved reliability, that has saved chip accounts for plate area, also saved cost, in the structure of multi-stage cascade, more can embody remarkable result of the present invention.
The embodiment of the present invention also provides the another kind of chip cascade structure for battery protection, comprises the first chip and at least one second chip.In the situation that the second chip is one, Fig. 2 that the schematic diagram of this structure provides with above-described embodiment is identical.The first chip is the chip of downside in Fig. 2, and the second chip is the chip of upside in Fig. 2.The first chip and the second chip are connected in series.
The first chip comprises: the first tube core and the first encapsulating package; Wherein, the first die package, within the first encapsulating package, only shows the pin signal of encapsulating package in Fig. 2.The syndeton of each pin and the first tube core in the first encapsulating package, and the circuit unit syndeton of the first tube core inside, the internal structure schematic diagram of chip shown in Figure 3.Described the first tube core comprises load current detection circuit unit 8 and charging state detection circuit unit 7; The input of described load current detection circuit unit 8 is connected by package lead with the current sense pin CS of described the first encapsulating package; The input of described charging state detection circuit unit 7 detects pin V-with the charging of the first encapsulating package and is connected by package lead;
The second chip comprises: the second tube core and the second encapsulating package; Wherein, the second die package, within the second encapsulating package, only shows the pin signal of encapsulating package in Fig. 2.The syndeton of each pin and the second tube core in the second encapsulating package, and the circuit unit syndeton of the second tube core inside, the internal structure schematic diagram of chip shown in Figure 5.Described the second tube core comprises: in the first tube core as shown in Figure 3, remove the remaining circuit unit outside described charging state detection circuit unit 7 and load current detection circuit unit 8; That is to say, in the present embodiment, in the second tube core, do not comprise charged state observation circuit unit and load current detection circuit unit.
Again as shown in Figure 2, the first chip and the second chip, respectively the voltage V to the series connection battery core of battery 1, V 2, V 3, V 4, V 5and V 6, V 7, V 8, V 9, V 10detect; The first chip detects the output current of described battery.
Concrete, the first tube core is identical with the first tube core in above-described embodiment, therefore repeats no more herein.
The second tube core specifically comprises:
Second voltage sample circuit unit 21, the input of described second voltage sample circuit unit 21 is connected with voltage detecting pin V1, V2, V3, V4, the V5 of described the second encapsulating package, for the voltage of described series connection battery core battery core is sampled;
The second reference voltage circuit unit 22, the input of described the second reference voltage circuit unit 22 is connected with the supply voltage input pin VDD of described the second encapsulating package, for generation of reference voltage;
Further, reference voltage comprises that charging allows reference voltage and electric discharge to allow reference voltage;
The second comparison circuit unit 23, the input of described the second comparison circuit unit 23 is connected with the second reference voltage circuit unit 22 with described the second sampled voltage circuit unit 21, the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
Further, the voltage of the battery core that sampling is obtained allows reference voltage and electric discharge to allow reference voltage to compare with charging respectively, whether higher than charging, allows reference voltage, or allow reference voltage lower than electric discharge to differentiate the voltage of described battery core.
The second treatment circuit unit 24, be connected with over signal input tube pin SDC with the additives for overcharge protection signal input tube pin SOC of described the second comparison circuit unit 23, the second encapsulating package, according to the signal of the signal of described comparison signal, additives for overcharge protection signal input tube pin SOC input and over signal input tube pin SDC input, generate additives for overcharge protection and drive signal and over to drive signal;
For example, when the signal of additives for overcharge protection signal input tube pin SOC input is " 1 ", treatment circuit unit 14 produces additives for overcharge protection according to the signal of the additives for overcharge protection signal input tube pin SOC input receiving and drives signal;
Served as the signal during for " 1 " that charges and discharge guard signal input pin SDC input, treatment circuit unit 14 produces over according to the signal of the over signal input tube pin SDC input receiving and drives signal.
The 3rd drive circuit unit 25, according to described additives for overcharge protection, drive signal to generate additives for overcharge protection control signal, by the additives for overcharge protection signal output pin OV of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin SOC of another the second chip that described the second chip is connected, or the additives for overcharge protection signal input tube pin SOC of described the first chip;
The above-mentioned additives for overcharge protection control signal that exports the additives for overcharge protection signal input tube pin SOC of another the second chip to is transmitted through the cascade of a plurality of the second chips, and the additives for overcharge protection signal output pin OV of final upper level the second chip by the first chip is transferred to the additives for overcharge protection signal input tube pin SOC of the first chip;
The treatment circuit unit 14 of the first chip produces additives for overcharge protection according to the input signal of additives for overcharge protection signal input tube pin SOC and drives signal; by the additives for overcharge protection signal output pin OV of described the first encapsulating package; described additives for overcharge protection control signal is exported to external circuit unit; be used for controlling conducting or the cut-off of external circuit unit the first transistor (be labeled as charging in Fig. 2 and control FET), thereby allow or do not allow described external circuit unit to charge to described battery.
The 4th drive circuit unit 26, according to described over, drive signal to generate over control signal, by the over signal output pin DCHG of described the second encapsulating package, described over control signal is exported to the over signal input tube pin SDC of another the second chip that described the second chip is connected, or the over signal input tube pin DCHG of described the first chip;
The above-mentioned over control signal that exports the over signal input tube pin SDC of another the second chip to is transmitted through the cascade of a plurality of the second chips, and the additives for overcharge protection signal output pin OV of final upper level the second chip by the first chip is transferred to the over signal input tube pin SDC of the first chip;
The treatment circuit unit 14 of the first chip produced and charged and discharged protection driving signal according to the input signal of over signal input tube pin SDC; by the over signal output pin DCHG of described the first encapsulating package; described mistake is charged and discharged to protection control signal and export to external circuit unit; be used for controlling conducting or the cut-off of external circuit unit the first transistor (being labeled as discharge control FET in Fig. 2), thereby allow or do not allow described external circuit unit to described battery discharge.
Therefore known, chip cascade structure for battery protection provided by the present invention, by load current detection circuit unit and the charging state detection circuit unit of the redundancy got rid of in original chip design of the second chip, make can save on chip-packaging structure V-and the CS pin of two redundancies, namely the number of pin of the second encapsulating package reduces two than the number of pin of described the first encapsulating package, can make like this size of the encapsulating package of the second chip further dwindle, also avoided the ground connection cabling of chip exterior simultaneously, improved reliability, that has saved chip accounts for plate area, also saved cost, in the structure of multi-stage cascade, more can embody remarkable result of the present invention.
Professional should further recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with electronic hardware, computer software or the combination of the two, for the interchangeability of hardware and software is clearly described, composition and the step of each example described according to function in the above description in general manner.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can specifically should be used for realizing described function with distinct methods to each, but this realization should not thought and exceeds scope of the present invention.
The software module that the method for describing in conjunction with embodiment disclosed herein or the step of algorithm can use hardware, processor to carry out, or the combination of the two is implemented.Software module can be placed in the storage medium of any other form known in random asccess memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field.
Above-described embodiment; object of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only the specific embodiment of the present invention; the protection range being not intended to limit the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (7)

1. for a chip cascade structure for battery protection, it is characterized in that, described structure comprises:
The first chip, comprising: the first tube core and the first encapsulating package; Described the first tube core comprises load current detection circuit unit and charging state detection circuit unit; The input of described load current detection circuit unit is connected by package lead with the current sense pin of described the first encapsulating package; The input of described charging state detection circuit unit detects pin with the charging of described the first encapsulating package and is connected by package lead;
At least one second chip, described the second chip comprises: the first tube core and the second encapsulating package; The input of the input of described load current detection circuit unit and described charging state detection circuit unit, is connected with the ground pin of described the second encapsulating package by package lead;
Described the first chip and at least one second chip are connected in series, and respectively the voltage of the series connection battery core of battery are detected; Described the first chip detects the output current of described battery.
2. structure according to claim 1, is characterized in that, described the first tube core also comprises:
Voltage sampling circuit unit, the input of described voltage sampling circuit unit is connected with the voltage detecting pin of the described first or second encapsulating package, for the voltage of described series connection battery core battery core is sampled;
Reference voltage circuit unit, the input of described reference voltage circuit unit is connected with the supply voltage input pin of the described first or second encapsulating package, for generation of reference voltage;
Comparison circuit unit, the input of described comparison circuit unit is connected with reference voltage circuit unit with described sampled voltage circuit unit, and the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
Treatment circuit unit, with described comparison circuit unit, the additives for overcharge protection signal input tube pin of the first or second encapsulating package, over signal input tube pin, described load current detection circuit unit is connected with described charging state detection circuit unit, according to described comparison signal, the signal of additives for overcharge protection signal input tube pin input, the signal of over signal input tube pin input, the output signal of the output signal of load current detection circuit unit and described charging state detection circuit unit, generating additives for overcharge protection drives signal and over to drive signal,
The first drive circuit unit, drives signal to generate additives for overcharge protection control signal according to described additives for overcharge protection; Described additives for overcharge protection control signal is by the additives for overcharge protection signal output pin of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit the first transistor, thereby allow or do not allow described external circuit unit to charge to described battery; Or, described additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin of another the second chip that described the second chip is connected, or the additives for overcharge protection signal input tube pin of described the first chip;
The second drive circuit unit, drives signal to generate over control signal according to described over; Described over control signal is by the over signal output pin of described the first encapsulating package, described over control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit transistor seconds, thereby allow or do not allow described external circuit unit to described battery discharge; Or; described over control signal; by the over signal output pin of described the second encapsulating package; described over control signal is exported to the over signal input tube pin of another the second chip that described the second chip is connected, or the over signal input tube pin of described the first chip.
3. structure according to claim 1, is characterized in that, few two than the number of pin of described the first encapsulating package of the number of pin of described the second encapsulating package.
4. for a chip cascade structure for battery protection, it is characterized in that, described structure comprises:
The first chip, comprising: the first tube core and the first encapsulating package; Described the first tube core comprises load current detection circuit unit and charging state detection circuit unit; The input of described load current detection circuit unit is connected by package lead with the current sense pin of described the first encapsulating package; The input of described charging state detection circuit unit detects pin with the charging of the shell of described the first package tube and is connected by package lead;
At least one second chip, described the second chip comprises: the second tube core and the second encapsulating package; Described the second tube core comprises: in described the first tube core, remove the remaining circuit unit outside described charging state detection circuit unit and load current detection circuit unit;
Described the first chip and at least one second chip are connected in series, and respectively the voltage of the series connection battery core of battery are detected; Described the first chip detects the output current of described battery.
5. structure according to claim 4, is characterized in that, described the first tube core also comprises:
The first voltage sampling circuit unit, the input of described the first voltage sampling circuit unit is connected with the voltage detecting pin of described the first encapsulating package, for the voltage of described series connection battery core battery core is sampled;
The first reference voltage circuit unit, the input of described the first reference voltage circuit unit is connected with the supply voltage input pin of described the first encapsulating package, for generation of reference voltage;
The first comparison circuit unit, the input of described the first comparison circuit unit is connected with the first reference voltage circuit unit with described the first sampled voltage circuit unit, the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
The first treatment circuit unit, with described the first comparison circuit unit, the additives for overcharge protection signal input tube pin of the first encapsulating package, over signal input tube pin, described load current detection circuit unit is connected with described charging state detection circuit unit, according to described comparison signal, the signal of additives for overcharge protection signal input tube pin input, the signal of over signal input tube pin input, the output signal of the output signal of load current detection circuit unit and described charging state detection circuit unit, generating additives for overcharge protection drives signal and over to drive signal,
The first drive circuit unit, according to described additives for overcharge protection, drive signal to generate additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the first encapsulating package, described additives for overcharge protection control signal is exported to external circuit unit, for controlling conducting or the cut-off of external circuit unit the first transistor, thereby allow or do not allow described external circuit unit to charge to described battery;
The second drive circuit unit; according to described over, drive signal to generate over control signal; by the over signal output pin of described the first encapsulating package; described over control signal is exported to external circuit unit; for controlling conducting or the cut-off of external circuit unit transistor seconds, thereby allow or do not allow described external circuit unit to described battery discharge.
6. structure according to claim 4, is characterized in that, described the second tube core specifically comprises:
Second voltage sample circuit unit, the input of described second voltage sample circuit unit is connected with the voltage detecting pin of described the second encapsulating package, for the voltage of described series connection battery core battery core is sampled;
The second reference voltage circuit unit, the input of described the second reference voltage circuit unit is connected with the supply voltage input pin of described the second encapsulating package, for generation of reference voltage;
The second comparison circuit unit, the input of described the second comparison circuit unit is connected with the second reference voltage circuit unit with described the second sampled voltage circuit unit, the voltage of the described battery core obtaining according to more described reference voltage and sampling, generates comparison signal;
The second treatment circuit unit, be connected with over signal input tube pin with the additives for overcharge protection signal input tube pin of described the second comparison circuit unit, the second encapsulating package, according to the signal of the signal of described comparison signal, the input of additives for overcharge protection signal input tube pin and the input of over signal input tube pin, generate additives for overcharge protection and drive signal and over to drive signal;
The 3rd drive circuit unit, according to described additives for overcharge protection, drive signal to generate additives for overcharge protection control signal, by the additives for overcharge protection signal output pin of described the second encapsulating package, described additives for overcharge protection control signal is exported to the additives for overcharge protection signal input tube pin of another the second chip that described the second chip is connected, or the additives for overcharge protection signal input tube pin of described the first chip;
The 4th drive circuit unit; according to described over, drive signal to generate over control signal; by the over signal output pin of described the second encapsulating package; described over control signal is exported to the over signal input tube pin of another the second chip that described the second chip is connected, or the over signal input tube pin of described the first chip.
7. structure according to claim 4, is characterized in that, few two than the number of pin of described the first encapsulating package of the number of pin of described the second encapsulating package.
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CN104218925A (en) * 2014-08-22 2014-12-17 上海思立微电子科技有限公司 Automatic recovery circuit and method of fingerprint identification chip
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CN108382241A (en) * 2018-03-06 2018-08-10 上海炙云新能源科技有限公司 Redundancy detection protection system, method and the electric vehicle of battery core voltage
CN110309574B (en) * 2019-06-25 2023-01-06 北京智涵芯宇科技有限公司 PUF circuit capable of sensing physical integrity of chip circuit and chip
CN110309574A (en) * 2019-06-25 2019-10-08 北京智涵芯宇科技有限公司 The PUF circuit and chip of chip production manufacture and use circuit physical integrality can be perceived
US11489343B2 (en) 2020-06-02 2022-11-01 Inventus Power, Inc. Hardware short circuit protection in a large battery pack
US11552479B2 (en) 2020-06-02 2023-01-10 Inventus Power, Inc. Battery charge balancing circuit for series connections
US11588334B2 (en) 2020-06-02 2023-02-21 Inventus Power, Inc. Broadcast of discharge current based on state-of-health imbalance between battery packs
US11594892B2 (en) 2020-06-02 2023-02-28 Inventus Power, Inc. Battery pack with series or parallel identification signal
US11699908B2 (en) 2020-06-02 2023-07-11 Inventus Power, Inc. Large-format battery management system identifies power degradation
US11817723B2 (en) 2020-06-02 2023-11-14 Inventus Power, Inc. Large-format battery management system with in-rush protection using multiple thermistors
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US11705741B2 (en) 2020-07-24 2023-07-18 Inventus Power, Inc. Mode-based disabling of communication bus of a battery management system

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