CN103646874A - Silicon dioxide SAB removing method - Google Patents
Silicon dioxide SAB removing method Download PDFInfo
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- CN103646874A CN103646874A CN201310631394.6A CN201310631394A CN103646874A CN 103646874 A CN103646874 A CN 103646874A CN 201310631394 A CN201310631394 A CN 201310631394A CN 103646874 A CN103646874 A CN 103646874A
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- China
- Prior art keywords
- silicon dioxide
- sab
- flash memory
- memory wafer
- removal method
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 114
- 239000000377 silicon dioxide Substances 0.000 title claims abstract description 57
- 235000012239 silicon dioxide Nutrition 0.000 title claims abstract description 48
- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000010438 heat treatment Methods 0.000 claims abstract description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 229910019975 (NH4)2SiF6 Inorganic materials 0.000 abstract 3
- 210000004027 cell Anatomy 0.000 description 17
- 238000005530 etching Methods 0.000 description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 239000012528 membrane Substances 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910052914 metal silicate Inorganic materials 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- NCMAYWHYXSWFGB-UHFFFAOYSA-N [Si].[N+][O-] Chemical compound [Si].[N+][O-] NCMAYWHYXSWFGB-UHFFFAOYSA-N 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 101100373011 Drosophila melanogaster wapl gene Proteins 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 210000004483 pasc Anatomy 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000002912 waste gas Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
The invention discloses a silicon dioxide SAB removing method which comprises the following steps: providing a flash memory wafer, wherein a device on the flash chip is covered by silicon dioxide SAB; reacting NH3 and HF steam with silicon dioxide SAB on the flash memory wafer to generate (NH4)2SiF6; and heating the reacted flash memory wafer to volatilize (NH4)2SiF6 to obtain a flash memory wafer of which silicon dioxide SAB is removed. According to the method, first, NH3 and HF steam are reacted with a silicon dioxide SAB film on the flash memory wafer to generate (NH4)2SiF6, and then, the flash memory wafer is heated to remove the silicon dioxide SAB film, thereby reducing undercut and avoiding leakage risks.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to the removal method of silicon dioxide SAB a kind of.
Background technology
At present, along with the development of semiconductor device, self-aligned metal silicate is as next in autoregistration nickel SiClx, titanizing silicon method are introduced into, and for generation of silicide, can aim at the silicon (Si) of the source of exposing, leakage and polysilicon gate well.This be because metallic nickel (Ni), titanium (Ti) or cobalt (Co) can with pasc reaction, but can be with Si oxide as silicon dioxide (SiO
2), silicon nitride is as silicon nitride (Si
3n
4) or silicon nitrogen oxide (SiON) reaction.Therefore the part that Ni, Ti or Co only can search out silicon is reacted, and for by Si oxide as silicon dioxide (SiO
2), silicon nitride is as silicon nitride (Si
3n
4) or the part that covers of silicon nitrogen oxide (SiON), can not react, like Ni, Ti or the Co part to eka-silicon voluntarily.
Self-aligned metal silicate method (salicide) is a kind of program of contact metallization quite simply and easily, but in the manufacturing process of semiconductor device, there are some devices to need salicide process, and some device needs non-self-aligned metal silicate (non-salicide) process, for the device that needs non-salicide process, will utilize the characteristic of above-mentioned salicide, using can be with the material of metal reaction needing the device of non-salicide to cover.Thisly for covering the material of non-salicide device, be just called self-aligned silicide region blocks film (Silicide Area Block, be called for short SAB).
For some flash memory wafer, SAB adopts silica membrane, its etching technics is: first by plasma dry, etch away most of silica membrane, then adopt wet etching to remove bottom and the remaining silicon dioxide of sidewall, the chemical reagent that wet etching is used is the hydrofluoric acid solution of dilution.Because silica membrane thickness and the character of zones of different after dry etching are different, for example the silicon dioxide of memory cell Cell district sidewall and sidewall bottom is more easily by hf etching, there is etching rate faster, and thick thermal silicon dioxide film is contained in high tension apparatus region, its etching rate is lower, is difficult for being removed.In order to remove it, need to add considerable etch quantity, and this will certainly cause the etch quantity in memory cell Cell district excessive, cause over etching.Because silicon dioxide etching has isotropism, after the silicon dioxide of the complete sidewall of etching, can continue the silicon dioxide of etching sidewall bottom, form larger undercutting, cause the consequence of leaking electricity.
As shown in Fig. 1 a and 1b, Fig. 1 a is the pattern before silicon dioxide SAB wet etching, this flash memory wafer comprises silicon substrate 10, polysilicon 14, silicon nitride 15 and silica 16, wherein, silicon dioxide SAB comprises sidewall silica membrane 11 and sidewall bottom silica membrane 12, and Fig. 1 b is the pattern after wet etching, visible, the sidewall bottom silica membrane in memory cell Cell district, by over etching, forms undercutting 13.
To sum up, how improving existing technique, when removing flash memory wafer silicon dioxide SAB, reduce undercutting, thereby improve, even avoid electric leakage, is one of those skilled in the art's technical problem urgently to be resolved hurrily.
Summary of the invention
In order to solve the problem of above-mentioned prior art existence, the invention provides the removal method of silicon dioxide SAB a kind of, to reduce undercutting, avoid the risk of leaking electricity.
A kind of removal method that the invention provides silicon dioxide SAB, it comprises the following steps:
Step S01, provides a flash memory wafer, and the device on it is covered by silicon dioxide SAB;
Step S02, uses NH
3react with the silicon dioxide SAB on flash memory wafer with HF steam, generate (NH
4)
2siF
6;
Step S03, to reacted flash memory wafer heating, makes (NH
4)
2siF
6volatilization, obtains removing the flash memory wafer after silicon dioxide SAB.
Further, the reaction temperature of step S02 is 20-40 ℃.
Further, the reaction temperature of step S03 is 100-200 ℃.
Further, step S02 is placed in flash memory wafer on the reaction bench in reative cell, and the built-in constant temperature water pipe of this reaction bench passes into NH in this reative cell
3react with the silicon dioxide SAB on flash memory wafer with HF steam.
Further, step S03 is placed in flash memory wafer on the reaction bench of reative cell, and this reaction bench internal heater, to heat flash memory wafer.
Further, step S03 also comprises (the NH that discharges volatilization
4)
2siF
6, this reative cell also has exhaust extractor.
The present invention proposes the removal method of silicon dioxide SAB a kind of, by dry method chemical etching, replace wet etching and remove silicon dioxide SAB.Particularly, the present invention first uses NH
3silicon dioxide SAB film with HF steam on flash memory wafer reacts, and generates (NH
4)
2siF
6, utilize this product surpassing the characteristic that can be decomposed into gas at the temperature of 100 ℃, to the heating of flash memory wafer, by its removal; On the other hand, because dry method chemical etching has identical rate of etch for silicon dioxide of different nature, so removing completely under the thermal silicon dioxide film prerequisite in high tension apparatus region, can effectively reduce the loss of the silicon dioxide of sidewall bottom, thereby minimizing undercutting, avoids the risk of leaking electricity.
Accompanying drawing explanation
For can clearer understanding objects, features and advantages of the present invention, below with reference to accompanying drawing, preferred embodiment of the present invention is described in detail, wherein:
Fig. 1 a and Fig. 1 b are the cross-reference schematic diagrames of existing wet etching silicon dioxide SAB;
Fig. 2 is the first reaction chamber structure schematic diagram in first embodiment of the invention step S02;
Fig. 3 is the second reaction chamber structure schematic diagram in first embodiment of the invention step S03;
Fig. 4 is the structural representation of flash memory wafer after first embodiment of the invention completes.
Embodiment
the first embodiment
The silicon dioxide SAB removal method of the present embodiment, it comprises the following steps.
Step S01, provides a flash memory wafer, and the device on it is covered by silicon dioxide SAB.
Wherein, the described device in this step includes but are not limited to memory cell Cell district and high tension apparatus, and these devices are all covered by silicon dioxide SAB.
Step S02, uses NH
3react with the silicon dioxide SAB on flash memory wafer with HF steam, generate (NH
4)
2siF
6.
Wherein, the reaction temperature of this step is room temperature, 25 ℃, by realization is set below: as shown in Figure 2, above-mentioned flash memory wafer 2 is put on the first reaction bench 31 in the first reative cell 3, the first reaction bench 31 is built-in with constant temperature water pipe 32, by the water of 25 ℃ circulating, pass to the first reaction bench 31 surfaces, and make flash memory wafer 2 remain on 25 ℃ of left and right, namely reaction temperature; Meanwhile, the first reative cell 3 tops are provided with two steam pipes, and steam pipe is delivered to steam in the first reative cell 3 by part flow arrangement, and wherein, the first steam pipe 33 is connected with a plurality of the first part flow arrangements 34, for by NH
3steam is evenly delivered in the first reative cell 3, and the second steam pipe 35 is connected with a plurality of the second part flow arrangements 36, for HF steam is evenly delivered in the first reative cell 3.
Wherein, the chemical equation of this step comprises:
2NH
3+6HF+SiO
2→(NH
4)
2SiF
6+2H
2O
Wherein, the first reative cell 3 in this step is also provided with waste gas recovering device and waste liquid recovery apparatus (not shown).
Step S03, to reacted flash memory wafer heating, makes (NH
4)
2siF
6volatilization, obtains removing the flash memory wafer after silicon dioxide SAB.
Wherein, the reaction temperature of this step is 150 ℃, by realization is set below: as shown in Figure 3, reacted flash memory wafer 2 is put on the second reaction bench 41 in the second reative cell 4, and the second reaction bench 41 is built-in with heating wire 42, and this heating wire 42 is located at the place near table top, by the heating power of heating wire 42, pass to the second table top 41 surfaces, and make flash memory wafer 2 reach 150 ℃ of left and right, due to (NH
4)
2siF
6being decomposed into gas at the temperature of 100 ℃, it can be removed completely, thereby realize the object of removing silicon dioxide SAB on flash memory wafer.
Wherein, the chemical equation of this step comprises:
(NH
4)
2SiF
6→SiF
4+2NH
3+H
2O
Wherein, the second reative cell 4 in this step is also provided with exhaust extractor (not shown).
Please then consult Fig. 4, Fig. 4 is the flash memory chip architecture obtaining after the method for first embodiment of the invention, can see, and after this technique completes, the loss of silica of memory cell Cell district side wall bottom is less, effectively reduces undercutting.
Claims (6)
1. a removal method of silicon dioxide SAB, is characterized in that, it comprises the following steps:
Step S01, provides a flash memory wafer, and the device on it is covered by silicon dioxide SAB;
Step S02, uses NH
3react with the silicon dioxide SAB on flash memory wafer with HF steam, generate (NH
4)
2siF
6;
Step S03, to reacted flash memory wafer heating, makes (NH
4)
2siF
6volatilization, obtains removing the flash memory wafer after silicon dioxide SAB.
2. the removal method of silicon dioxide SAB according to claim 1, is characterized in that: the reaction temperature of step S02 is 20-40 ℃.
3. the removal method of silicon dioxide SAB according to claim 1, is characterized in that: the reaction temperature of step S03 is 100-200 ℃.
4. the removal method of silicon dioxide SAB according to claim 2, is characterized in that: step S02 is placed in flash memory wafer on the reaction bench in reative cell, and the built-in constant temperature water pipe of this reaction bench passes into NH in this reative cell
3react with the silicon dioxide SAB on flash memory wafer with HF steam.
5. the removal method of silicon dioxide SAB according to claim 3, is characterized in that: step S03 is placed in flash memory wafer on the reaction bench of reative cell, and this reaction bench internal heater, to heat flash memory wafer.
6. the removal method of silicon dioxide SAB according to claim 5, is characterized in that: step S03 also comprises (the NH that discharges volatilization
4)
2siF
6, this reative cell also has exhaust extractor.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110942987A (en) * | 2018-09-21 | 2020-03-31 | 长鑫存储技术有限公司 | Method for forming semiconductor structure |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5505816A (en) * | 1993-12-16 | 1996-04-09 | International Business Machines Corporation | Etching of silicon dioxide selectively to silicon nitride and polysilicon |
US6802322B2 (en) * | 2002-03-25 | 2004-10-12 | Macronix International Co., Ltd. | Method of fabricating a stringerless flash memory |
CN101231951A (en) * | 2007-01-11 | 2008-07-30 | 应用材料股份有限公司 | Oxide etch with NH3-NF3 chemical |
CN101740338A (en) * | 2008-11-24 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Method for removing film |
-
2013
- 2013-11-29 CN CN201310631394.6A patent/CN103646874A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5505816A (en) * | 1993-12-16 | 1996-04-09 | International Business Machines Corporation | Etching of silicon dioxide selectively to silicon nitride and polysilicon |
US6802322B2 (en) * | 2002-03-25 | 2004-10-12 | Macronix International Co., Ltd. | Method of fabricating a stringerless flash memory |
CN101231951A (en) * | 2007-01-11 | 2008-07-30 | 应用材料股份有限公司 | Oxide etch with NH3-NF3 chemical |
CN101740338A (en) * | 2008-11-24 | 2010-06-16 | 中芯国际集成电路制造(北京)有限公司 | Method for removing film |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110942987A (en) * | 2018-09-21 | 2020-03-31 | 长鑫存储技术有限公司 | Method for forming semiconductor structure |
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Application publication date: 20140319 |
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