CN103620558A

CN103620558A - A method for achieving correspondence of physical resource and virtual resource and a basic input output system

Info

Publication number: CN103620558A
Application number: CN201380001075.5A
Authority: CN
Inventors: 许利霞; 郭海涛; 卢广
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2013-05-21
Filing date: 2013-05-21
Publication date: 2014-03-05
Also published as: WO2014186945A1

Abstract

The embodiment of the invention discloses a method for achieving correspondence of physical resource and virtual resource. The method comprises: obtaining a corresponding relation between each central processing unit CPU in a host computer and positions thereof; generating a corresponding relation between the core in each CPU and the position of the CPU; transmitting the corresponding relation between the core in each CPU and the position of the CPU to a board management controller BMC to be saved; and reporting the corresponding relation between the core in each CPU and the position of the CPU to an operating system OS via CPU information. The embodiment of the invention also provides a basic input output system. By means of the method, accurate correspondence of physical resource and virtual resource can be achieved and fault management and energy saving management efficiency can be improved.

Description

Realize method and basic input-output system that physical resource and virtual resource are corresponding

Technical field

The present invention relates to device management techniques field, particularly a kind of physical resource and corresponding method and basic input-output system of virtual resource realized.　

Background technology

Along with the equipment of data center increases day by day, be utilization factor and other advantages that improves equipment, Intel Virtualization Technology is widely used.But, in the benefit of bringing at enjoyment Intel Virtualization Technology, also introduced and how can realize the problem to the unified management of the physical resource in Intel Virtualization Technology and virtual resource.

At present, more conventional device management method is: server management system (band external system) managing physical resource; Service resource management system (system in band) managing virtual resource, in virtualization applications, general use and the efficiency of management for lifting means, often virtual resource is carried out to pondization management, so service resource management system (system in band) is to the management of virtual resource managing virtual resource pool namely.In prior art, only can realize the corresponding relation between the virtual machine moving on managing physical node and this physical node, set up the correspondence relationship information of having moved which virtual machine on physical node and physical node, the associated granularity between virtual resource and physical resource is thicker.Here physical node can be the equipment such as server, workstation, client, the network user or personal computer.

And associated granularity between virtual resource and physical resource more slightly can cause in main frame the problems such as the administration of energy conservation of resource and the efficiency of fault management be lower, is mainly CPU and the memory source in main frame.For example, if detecting the virtual resource of CPU, service resource management system there is problem, but because virtual resource can not be directly corresponding with physical resource, maintainer cannot distinguish specifically problem has appearred in which parts of the physical equipment of CPU, giving fixes a breakdown brings obstacle; Again for example, if finding the physical resource of internal memory, server management system goes wrong, owing to can not accurately navigating to the virtual resource of affected internal memory, cannot realize the meticulous isolation in application, can only move whole virtual machine on this physical node, cause the wasting of resources, be unfavorable for energy-conservation.

Summary of the invention

The invention provides a kind of physical resource and corresponding method and basic input-output system of virtual resource realized, realize the accurate correspondence between virtual resource and physical resource, improve the efficiency of fault management and administration of energy conservation.

First aspect, provides a kind of physical resource and method corresponding to virtual resource of realizing, and described method comprises:

Obtain the corresponding relation between each central processor CPU and position in main frame;

Corresponding relation in described each CPU of generation between each core and the position of affiliated CPU;

Corresponding relation between described each core and the position of affiliated CPU is sent to baseboard management controller BMC and preserves, and the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

In the possible way of realization of the first of first aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

In conjunction with the possible way of realization of the first of first aspect or first aspect, in the possible way of realization of the second of first aspect, also comprise:

Obtain the corresponding relation between each memory bar and position in described main frame;

In conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address and the corresponding relation between memory bar position of described each memory bar, be sent to described BMC preservation.

In conjunction with the possible way of realization of the second of first aspect, in the third possible way of realization of first aspect, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

Second aspect, provides a kind of physical resource and method corresponding to virtual resource of realizing, and described method comprises:

Obtain the corresponding relation between each memory bar and position in main frame;

In conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address and the corresponding relation between memory bar position of described each memory bar, be sent to baseboard management controller BMC preservation.

In the possible way of realization of the first of second aspect, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

In conjunction with the possible way of realization of the first of second aspect or second aspect, in the possible way of realization of the second of second aspect, also comprise:

Obtain the corresponding relation between each central processor CPU and position in described main frame;

Corresponding relation between described each core and the position of affiliated CPU is sent to described BMC and preserves, and the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

In conjunction with the possible way of realization of the second of second aspect, in the third possible way of realization of second aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

The third aspect, provides a kind of physical resource and method corresponding to virtual resource of realizing, and described method comprises:

Obtain the unique number of each core in the corresponding relation between each central processor CPU and position in main frame and described each CPU;

Corresponding relation in described each CPU of generation between the unique number of each core and the position of affiliated CPU;

Corresponding relation between the unique number of described each core and the position of affiliated CPU is kept in basic input-output system BIOS.

In the possible way of realization of the first of the third aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

In conjunction with the possible way of realization of the first of the third aspect or the third aspect, in the possible way of realization of the second of the third aspect, also comprise:

Unique identification in unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar, be kept in described BIOS.

In conjunction with the possible way of realization of the second of the third aspect, in the third possible way of realization of the third aspect, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

Fourth aspect, provides a kind of physical resource and method corresponding to virtual resource of realizing, and described method comprises:

Unique identification in unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar, be kept in basic input-output system BIOS.

In the possible way of realization of the first of fourth aspect, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

In conjunction with the possible way of realization of the first of fourth aspect or fourth aspect, in the possible way of realization of the second of fourth aspect, also comprise:

Obtain the unique number of each core in the corresponding relation between each central processor CPU and position in described main frame and described each CPU;

Corresponding relation between the unique number of described each core and the position of affiliated CPU is kept in described BIOS.

In conjunction with the possible way of realization of the second of fourth aspect, in the third possible way of realization of fourth aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

The 5th aspect, provides a kind of basic input-output system, and described system comprises:

Acquiring unit, for obtaining the corresponding relation between each central processor CPU of main frame and position;

Processing unit, for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU;

Transmitting element, preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to baseboard management controller BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

In the possible way of realization of the first aspect the 5th, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

In conjunction with the possible way of realization of the first of the 5th aspect or the 5th aspect, in the possible way of realization of the second aspect the 5th,

Described acquiring unit, also for obtaining the corresponding relation between each memory bar of described main frame and position;

Described processing unit, also for according to the corresponding relation between described each memory bar and position, the physical address addressing method in conjunction with the internal memory of described main frame, generates the physical address of described each memory bar and the corresponding relation between memory bar position;

Described transmitting element, also preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to described BMC.

In conjunction with the possible way of realization of the second of the 5th aspect, in the third the possible way of realization aspect the 5th, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

The 6th aspect, provides a kind of basic input-output system, and described system comprises:

Acquiring unit, for obtaining the corresponding relation between each memory bar of main frame and position;

Processing unit, for according to the corresponding relation between described each memory bar and position, the physical address addressing method in conjunction with the internal memory of described main frame, generates the physical address of described each memory bar and the corresponding relation between memory bar position;

Transmitting element, preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to baseboard management controller BMC.

In the possible way of realization of the first aspect the 6th, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

In conjunction with the possible way of realization of the first of the 6th aspect or the 6th aspect, in the possible way of realization of the second aspect the 6th,

Described acquiring unit, also for obtaining the corresponding relation between each central processor CPU of described main frame and position;

Described processing unit, also for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU;

Described transmitting element, also preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to described BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

In conjunction with the possible way of realization of the second of the 6th aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

The 7th aspect, provides a kind of basic input-output system, and described system comprises:

Acquiring unit, for obtaining the unique number of each core in corresponding relation between each central processor CPU of main frame and position and described each CPU;

Processing unit, for according to the unique number of the corresponding relation between described each CPU and position and described each each core of CPU, generates the corresponding relation between the unique number of each core and the position of affiliated CPU in described each CPU;

Storage unit, for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

In the possible way of realization of the first aspect the 7th, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

In conjunction with the possible way of realization of the first of the 7th aspect or the 7th aspect, in the possible way of realization of the second aspect the 7th,

Described processing unit, also for according to the corresponding relation between described each memory bar and position, generate unique identification in the SPD information that serial that the module of described each memory bar exists detects unique identification in SPD information and the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar;

Described storage unit, also for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

In conjunction with the possible way of realization of the second of the 7th aspect, in the third the possible way of realization aspect the 7th, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

Eight aspect, provides a kind of basic input-output system, and described system comprises:

Processing unit, be used for according to the corresponding relation between described each memory bar and position the unique identification in the unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar;

Storage unit, for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

In the possible way of realization of the first of eight aspect, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

In conjunction with the possible way of realization of the first of eight aspect or eight aspect, in the possible way of realization of the second of eight aspect,

Described acquiring unit, also for obtaining the unique number of each core in corresponding relation between each central processor CPU of described main frame and position and described each CPU;

Described processing unit, also for according to the unique number of the corresponding relation between described each CPU and position and described each each core of CPU, generate the corresponding relation between the unique number of each core and the position of affiliated CPU in described each CPU;

Described storage unit, also for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

In conjunction with the possible way of realization of the second of eight aspect, in the third possible way of realization of eight aspect, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

By the method described in the embodiment of the present invention, realized the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Accompanying drawing explanation

In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.

Fig. 1 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention one;

Fig. 2 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention two;

Fig. 3 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention three;

Fig. 4 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention four;

Fig. 5 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention five;

Network topological diagram when Fig. 6 is separate unit server;

Fig. 7 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention six;

Fig. 8 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention seven;

Network topological diagram when Fig. 9 is multiple servers;

Figure 10 realizes physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention eight;

Figure 11 is the structural drawing of the basic input-output system described in the embodiment of the present invention one;

Figure 12 is the structural drawing of the basic input-output system described in the embodiment of the present invention two;

Figure 13 is the structural drawing of the basic input-output system described in the embodiment of the present invention three;

Figure 14 is the structural drawing of the basic input-output system described in the embodiment of the present invention four;

Figure 15 is the structural drawing of the another kind basis input-output system described in the embodiment of the present invention one;

Figure 16 is the structural drawing of the another kind basis input-output system described in the embodiment of the present invention two;

Figure 17 is the structural drawing of the another kind basis input-output system described in the embodiment of the present invention three;

Figure 18 is the structural drawing of the another kind basis input-output system described in the embodiment of the present invention four.

Embodiment

The core thinking of the method that the embodiment of the present invention provides is: utilize positional information, for example slot(groove position) mapping techniques realizes the correspondence of physical resource and virtual resource, solves the meticulous not problem of associated granularity in prior art.

In order to make those skilled in the art person understand better the technical scheme in the embodiment of the present invention, and the above-mentioned purpose of the embodiment of the present invention, feature and advantage can be become apparent more, below in conjunction with accompanying drawing, technical scheme in the embodiment of the present invention is described in further detail.

With reference to Fig. 1, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention one.As shown in Figure 1, said method comprising the steps of:

Step S101:BIOS(Basic Input Output System, basic input-output system) obtain each CPU(Central Processing Unit in main frame, central processing unit) and position between corresponding relation.

Step S102: the corresponding relation in described each CPU of described BIOS generation between each core and the position of affiliated CPU.

Step S103: described BIOS is sent to baseboard management controller BMC by the corresponding relation between described each core and the position of affiliated CPU and preserves, and the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to OS(Operating System, operating system).

Described in the embodiment of the present invention one in method, described BIOS processes the corresponding relation between each CPU and position in the main frame getting, generate the corresponding relation of each core respectively and between affiliated CPU position in each CPU, above-mentioned corresponding relation is sent to BMC and preserves and pass through CPU information reporting to operating system OS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention one, method has realized corresponding between virtual resource and physical resource for the CPU in main frame, and further, the method can also realize corresponding between virtual resource and physical resource for memory bar in main frame.

Concrete, described method can also comprise: obtain the corresponding relation between each memory bar and position in described main frame; In conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address and the corresponding relation between memory bar position of described each memory bar, be sent to described BMC preservation.

It should be noted that, the physical address addressing method of internal memory mentioned herein refers to the representation of the physical address of memory bar in main frame.In actual applications, when the addressing mode of internal memory is different, the form of expression of this physical address also can be distinguished to some extent.

Method described in the embodiment of the present invention one, further, described BIOS processes each memory bar in the main frame getting and the corresponding relation between position, generate the physical address of each memory bar in main frame and the corresponding relation between this memory bar position, and upper this corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Fig. 2, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention two.As shown in Figure 2, said method comprising the steps of:

Step S201:BIOS(Basic Input Output System, basic input-output system) obtain the corresponding relation between each memory bar and position in main frame.

Step S202: described BIOS, in conjunction with the physical address addressing method of the internal memory of described main frame, generates the physical address of described each memory bar and the corresponding relation between memory bar position, is sent to baseboard management controller BMC and preserves.

Described in the embodiment of the present invention two in method, described BIOS processes each memory bar in the main frame getting and the corresponding relation between position, generate the physical address of each memory bar in main frame and the corresponding relation between this memory bar position, and upper this corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention two, method has realized corresponding between virtual resource and physical resource for the memory bar in main frame, and further, the method can also realize for the CPU in main frame corresponding between virtual resource and physical resource.

Concrete, described method can also comprise: described BIOS obtains the corresponding relation between each central processor CPU and position in described main frame; Corresponding relation in described each CPU of generation between each core and the position of affiliated CPU; Corresponding relation between described each core and the position of affiliated CPU is sent to described BMC and preserves, and the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

Method described in the embodiment of the present invention two, further, described BIOS processes the corresponding relation between each CPU and position in the main frame getting, generate the corresponding relation of each core respectively and between affiliated CPU position in each CPU, above-mentioned corresponding relation is sent to BMC and preserves and pass through CPU information reporting to operating system OS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Fig. 3, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention three.As shown in Figure 3, said method comprising the steps of:

Step S301: basic input-output system BIOS obtains the unique number of each core in the corresponding relation between each central processor CPU and position in main frame and each CPU.

Step S302: the corresponding relation in described each CPU of described BIOS generation between the unique number of each core and the position of affiliated CPU.

Step S303: described BIOS is kept at the corresponding relation between the unique number of described each core and the position of affiliated CPU in described BIOS.

Described in the embodiment of the present invention three in method, described BIOS processes the corresponding relation between each CPU and position in the main frame getting, generate in main frame the unique number of each core and the corresponding relation between affiliated CPU position in each CPU, and above-mentioned corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention three, method has realized corresponding between virtual resource and physical resource for the CPU in main frame, and further, the method can also realize corresponding between virtual resource and physical resource for memory bar in main frame.

Concrete, described method can also comprise: obtain the corresponding relation between each memory bar and position in described main frame; Unique identification in unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar, be kept in described BIOS.

Method described in the embodiment of the present invention three, further, corresponding relation between each memory bar and position in the main frame getting is processed, unique identification in unique identification in generation main frame in the SPD information of each memory bar and the SPD information of the corresponding relation between this memory bar position and each memory bar and the corresponding relation between the physical address of this memory bar, and above-mentioned each corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Fig. 4, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention four.As shown in Figure 4, said method comprising the steps of:

Step S401: basic input-output system BIOS obtains the corresponding relation between each memory bar and position in main frame.

Step S402: the unique identification in the unique identification in the serial detection SPD information that described in described BIOS generates, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar, be kept in basic input-output system BIOS.

Described in the embodiment of the present invention four in method, described BIOS processes the corresponding relation between each memory bar and position in the main frame getting, unique identification in unique identification in generation main frame in the SPD information of each memory bar and the SPD information of the corresponding relation between this memory bar position and each memory bar and the corresponding relation between the physical address of this memory bar, and above-mentioned each corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention four, method has realized corresponding between virtual resource and physical resource for the memory bar in main frame, and further, the method can also realize for the CPU in main frame corresponding between virtual resource and physical resource.

Concrete, described method can also comprise: the unique number of obtaining each core in the corresponding relation between each central processor CPU and position in described main frame and described each CPU; Corresponding relation in described each CPU of generation between the unique number of each core and the position of affiliated CPU; Corresponding relation between the unique number of described each core and the position of affiliated CPU is kept in described BIOS.

Method described in the embodiment of the present invention four, further, described BIOS processes the corresponding relation between each CPU and position in the main frame getting, generate in main frame the unique number of each core and the corresponding relation between affiliated CPU position in each CPU, and above-mentioned corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

In the various embodiments described above, described CPU position comprises described CPU place slot number or described CPU place port numbers and slot number; Described memory bar position comprises described memory bar place slot number or described memory bar place port numbers and slot number.

It should be noted that, above-mentioned main frame can be common computing machine, mobile terminal, workstation or server, private server etc.

Concrete, for the sight of a main frame, the said equipment position can be only the slot number at each equipment place; And when sight in multiple host, the said equipment position can be that the port numbers at each equipment place adds slot number.

In the embodiment of the present invention three and four, the main frame of take describes as example, and now, described equipment position is the groove position at each equipment place.

With reference to Fig. 5, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention five.As shown in Figure 5, said method comprising the steps of:

Step S501: obtain each CPU and the corresponding relation of each memory bar respectively and between groove position, equipment place in described main frame at the BMC of main frame, and be kept in described BMC.

Described in the embodiment of the present invention, in method, described physical resource mainly comprises CPU and the memory bar being arranged in main frame.Generally, a main frame comprises at least one CPU and at least one memory bar, each CPU and memory bar are arranged on respectively on a certain groove position of mainframe box framework, therefore, between the slot number of the groove position at each CPU and memory bar and place, have one-to-one relationship.

Network topological diagram during as shown in Figure 6, for separate unit main frame.This main frame comprises two CPU100 and 8 root memory bars 200.Certainly, in the embodiment of the present invention, be only to take the main frame shown in Fig. 6 to describe as example, in actual applications, the CPU that main frame comprises and the number of memory bar can specifically be set as required.

For the main frame shown in Fig. 6, the corresponding relation that described BMC obtains can be as follows:

CPU, slot 1, in place

CPU, slot 2, in place

Memory, slot 1, in place, SPD information

Memory, slot 2, in place, SPD information

Memory, slot 3, in place, SPD information

Memory, slot 4, in place, SPD information

Memory, slot 5, in place, SPD information

Memory, slot 6, in place, SPD information

Memory, slot 7, in place, SPD information

Memory, slot 8, in place, SPD information

Above-mentioned corresponding relation shows that two CPU that this main frame comprises lay respectively at slot 1(the first groove position) and slot 2(the second groove position); 8 root memory bars, lay respectively at slot 1(the first groove position) to slot 8(the 8th groove position).

Wherein, SPD(Serial Presence Detect, the serial that module exists detects) information refers to the configuration information about memory modules, as P-Bank quantity, voltage, row address/column address quantity, bit wide, various main time sequential routines etc.This SPD information is that manufacturer's burning by memory bar is at EEPROM(Electrically Erasable Programmable Read Only Memory, electrically erasable programmable ROM) in.

Step S502:BIOS obtains in main frame the corresponding relation between each CPU and this groove position, CPU place and processes, generate in this main frame the corresponding relation of each core core and groove position, affiliated CPU place in each CPU, and be sent in BMC and preserve, report the CPU information that comprises corresponding relation to virtual OS simultaneously; Wherein, the corresponding relation that comprises in this main frame each core and this groove position, CPU place in each CPU in described CPU information.

Concrete, the CPU information that described BIOS obtains after processing can be as shown in table 1 below:

The CPU information obtaining after table 1:BIOS processes

From upper table 1, in the CPU information obtaining after described BIOS processes, can obtain the corresponding relation between each core and groove position in CPU, thus can be so that described in the embodiment of the present invention in method, the corresponding relation of virtual resource and physical resource can be as accurate as between each core and groove position, place of CPU.

Step S503: described BIOS obtains the corresponding relation between each memory bar and this groove position, memory bar place in main frame, physical address addressing method in conjunction with internal memory, generate the physical address of each memory bar in this main frame and the corresponding relation between this groove position, memory bar place, be sent to described BMC and preserve, report conventional memory information to virtual OS simultaneously.

Concrete, in actual applications, the physical address addressing method of described internal memory can comprise two kinds, for different physical address addressing methods, in main frame, the representation of the physical address of memory bar is different.Concrete, shown in table 2, be under two kinds of internal memory addressing methods respectively corresponding memory bar physical address represent form.

Table 2:

As shown in Table 2, when the addressing method of internal memory is different, the form of expression of the physical address of corresponding internal memory is also different.Take shown in table 2 is example, and wherein internal memory addressing method one, is the method addressing with memory bar particle, the performance of the physical address of its internal memory for 0-127M, 128-255M ... 896-1023M; And internal memory addressing method two is with the particle less than memory bar, the method addressing in conjunction with interleaved technology, the performance of the physical address of its internal memory is 0-1,16-17 ...Above-mentioned internal memory addressing method is the known technology of this area, is not described in detail in this.

The internal memory physical address addressing method that described BIOS is used in conjunction with reality, corresponding relation between the described memory bar receiving and groove position is processed, obtain the physical address of every root memory bar in this main frame and the corresponding relation between this groove position, memory bar place, and this corresponding relation is sent to BMC preservation.Make thus, in method, the corresponding relation of virtual resource and physical resource can be as accurate as between the physical address of every root memory bar and the groove position at memory bar place described in the embodiment of the present invention.

Step S504: after described virtual OS starts, receive CPU information and memory bar information that described BIOS reports, form resource pool.

Concrete, the resource pool that described virtual OS forms is as follows:

CPU?Pool:

(Slot?1,core?1)?(Slot?1,core?2)?(Slot?1,core?3)?(Slot?1,core?4)?(Slot?2,core?1)?(Slot?2,core?2)(Slot?2,core?3)?(Slot?2,core?4)

Memory?Pool:

0～1023M

Then, virtual OS combined with virtualization is processed, and draws logical virtual resource and physical resource, realizes corresponding between virtual resource and physical resource.

It should be noted that, described in the embodiment of the present invention five in method, in step S501, BMC also can only obtain the corresponding relation between each CPU and groove position, equipment place in described main frame, and is kept in described BMC, now in described method, will not comprise step S503, and in step S504, after described virtual OS starts, also only receive the CPU information that described BIOS reports, form resource pool.Or in step S501, BMC also can only obtain the corresponding relation between each memory bar and groove position, equipment place in described main frame, and is kept in described BMC.Now in described method, will not comprise step S502, and in step S504, after described virtual OS starts, also only receive the memory bar information that described BIOS reports, form resource pool.

Described in the embodiment of the present invention five in method, described virtual OS receives that BIOS reports comprises in described main frame the CPU information of the corresponding relation of each core and groove position in each CPU, and the cpu resource pond that described virtual OS is formed comprises the corresponding relation of each core and groove position in CPU.When virtual OS detects vCPU and makes mistakes, can, according to this corresponding relation, determine core corresponding to vCPU makeing mistakes, be for example (Slot 1, and core 3), virtual OS can directly isolate this, and (Slot 1, core 3), and notify BMC (Slot 1, and core 3) to make mistakes.

Described in the embodiment of the present invention in method, described BIOS to the CPU getting and/or memory bar the corresponding relation respectively and between groove position process, obtain in main frame the corresponding relation of each core respectively and between the physical address of the corresponding relation of groove position and/or every root memory bar and this groove position, memory bar place in each CPU, and above-mentioned each corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Concrete, when virtual OS detects vCPU and makes mistakes, OS corresponds to the core in concrete CPU by the vCPU makeing mistakes, by BMC according to each core in each CPU in main frame respectively with the corresponding relation of groove position, find the groove position at the CPU place that this core is corresponding, send alarm, remind maintainer directly the CPU of this groove position to be overhauled.

For example, virtual OS detects vCPU and makes mistakes, suppose that the core that this vCPU is corresponding is that (Slot 1, core 3), if OS determines core(Slot 1 corresponding to this vCPU makeing mistakes through judgement, core 3) made mistakes repeatedly, can not use, OS directly isolates core(Slot 1, and core 3), and notify BMC.By BMC according to each core in each CPU in main frame respectively with the corresponding relation of groove position, find core(Slot 1, core 3) the groove position at place, send alarm, remind the CPU on this first groove position of maintainer to break down and need to repair or replace.

Or, (CPU, slot 1) sends early warning, need to notify virtual OS to isolate, BMC according to each core in each CPU respectively with the corresponding relation of groove position, determine (Slot 1, and core 1), (Slot 1, and core 2), (Slot 1, core 3) and (Slot 1, core 4) need isolation, report to virtual OS, above-mentioned core is carried out to isolation processing.When OS detects memory address and makes mistakes, the memory address that OS makes mistakes this corresponds to concrete physical address, and notifies BMC; By BMC, according to the corresponding relation between the physical address of every root memory bar in main frame and this groove position, memory bar place, find the groove position at this memory bar place, and give a warning, remind maintainer directly the memory bar of this groove position to be overhauled.

For example, virtual OS detects memory address 0～123M and makes mistakes,, if repeatedly made mistakes through definite this section of internal memory of judgement, can not use, OS directly isolates this section of internal memory, and notifies BMC.Suppose that the physical address that this memory address is corresponding is 0～123M, by BMC according to the corresponding relation between the physical address of every root memory bar and this groove position, memory bar place, internal memory physical address addressing method in conjunction with the current employing of BIOS, be addressing method one, determine that memory bar corresponding to application heap breaking down is (memory, slot 1), by BMC, given a warning, remind the memory bar on maintainer the first groove position to break down and need to repair or replace.

Or (memory, slot 1) early warning occurs, and the internal memory physical address addressing method of current employing is addressing method one, supposes to determine that affected application heap is 0～127M, by BMC, reports virtual OS; The application heap that virtual OS is 0～127M to physical address is processed.Hence one can see that, and method described in the embodiment of the present invention five, can realize the accurate correspondence between virtual resource and physical resource, maintainer can accurately be distinguished be which parts of main frame to occur problem, facilitates Breakdown Maintenance; Compare with existing whole the virtual machine moving on the physical node of makeing mistakes that need, saving resource, is beneficial to energy-conservation.

From foregoing, described in the embodiment of the present invention five in method, when virtual OS detects that vCPU makes mistakes or memory address is made mistakes, by core corresponding to the vCPU makeing mistakes or the memory address notice BMC that makes mistakes, the groove position at the memory bar place that the memory address that finds the groove position at the CPU place that the core that makes mistakes is corresponding by BMC according to corresponding relation or make mistakes is corresponding, and send alarm, to notify CPU or the memory bar of which groove position of maintainer to make mistakes, remind maintainer's maintenance.

In method described in the embodiment of the present invention five, describedly according to corresponding relation, find the groove position at the CPU place that the core that makes mistakes is corresponding or this step of groove position at the memory bar place that the memory address of makeing mistakes is corresponding, also can be realized by BIOS, concrete, describe in detail below.

In the embodiment of the present invention six, the main frame of still take describes as example, and now, described equipment position is the groove position at each equipment place.

With reference to Fig. 7, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention six.As shown in Figure 7, said method comprising the steps of:

Step S601: each CPU and each memory bar corresponding relation respectively and between groove position, equipment place in the BMC of main frame obtains main frame, and preserve; Wherein, the corresponding relation between described each memory bar and groove position, place comprises unique identification in the SPD information of each memory bar and the corresponding relation between each groove position, memory bar place.

Concrete, for each memory bar, in the SPD information of manufacturer's burning in memory bar, include the unique identification information of this memory bar.The unique identification information of different memory bars is different.By this unique identification information, can be directly targeted to the memory bar that this unique identification is corresponding.Therefore, the unique identification in the SPD information of each memory bar and the corresponding relation between groove position are just equivalent to the corresponding relation between each memory bar and groove position.

Step S602: described BIOS obtains the unique number of each core in each CPU of the corresponding relation between each CPU and groove position, place in main frame and systemic presupposition, generate in this main frame the corresponding relation between the unique number of each core and groove position, affiliated CPU place in each CPU, be kept in BIOS, and report conventional CPU information to virtual OS.

It should be noted that, each core of CPU has an intrasystem unique number (APICID), and this unique number is predefined by system, and BIOS can directly obtain this unique number from system.Meanwhile, virtual OS also can directly obtain the unique number of each core of each CPU from system.

Therefore, in method, described BIOS preserves the unique number of each core in described CPU and the corresponding relation between this groove position, CPU place, does not need described corresponding relation to report virtual OS described in the embodiment of the present invention six.It is same as the prior art that now BIOS reports to the CPU information of virtual OS, is only conventional CPU information, do not contain above-mentioned corresponding relation.

When virtual OS detects certain core on CPU and makes mistakes, can determine the unique number of the core that this is made mistakes according to the unique number of each core of each CPU from system acquisition, and notify BIOS.Corresponding relation in the unique number of the core being made mistakes according to this by BIOS and CPU between the unique number of each core and this groove position, CPU place, determines it is that CPU on which groove position makes mistakes.

Step S603: described BIOS obtains in main frame the corresponding relation between each memory bar and groove position, place and processes, generate unique identification in the SPD information of unique identification in the SPD information of each memory bar and the corresponding relation between this groove position, memory bar place and each memory bar and the corresponding relation between the physical address of this memory bar, be kept in BIOS, and report conventional memory information to virtual OS.

Step S604: after described virtual OS starts, receive CPU information and memory bar information that described BIOS reports, form resource pool.

It should be noted that, described in the embodiment of the present invention six in method, in step S601, BMC also can only obtain the corresponding relation between each CPU and groove position, equipment place in described main frame, and is kept in described BMC, now in described method, will not comprise step S603, and in step S604, after described virtual OS starts, also only receive the CPU information that described BIOS reports, form resource pool.Or in step S601, BMC also can only obtain the corresponding relation between each memory bar and groove position, equipment place in described main frame, and is kept in described BMC.Now in described method, will not comprise step S602, and in step S604, after described virtual OS starts, also only receive the memory bar information that described BIOS reports, form resource pool.

Described in the embodiment of the present invention, in method, the technology of virtual OS formation resource pool is same as the prior art, does not repeat them here.

Then, described virtual OS combined with virtualization is processed, and draws logical virtual resource and physical resource.Described in the embodiment of the present invention six in method, described BIOS to the CPU getting and memory bar the corresponding relation respectively and between groove position process, obtain unique identification in the unique number of each kernel of each CPU in main frame and the SPD information of the unique identification in the corresponding relation of this groove position, CPU place and the SPD information of each memory bar and the corresponding relation between the physical address of this memory bar and each memory bar and the corresponding relation between the groove position of this memory bar, thereby realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Concrete, when certain core that CPU detected as virtual OS makes mistakes, according to the unique number of each core of each CPU from system acquisition, determine the unique number of the core that this is made mistakes, and notify BIOS.Corresponding relation in the unique number of the core that BIOS makes mistakes according to this and CPU between the unique number of each core and this groove position, CPU place, determines it is that CPU on which groove position makes mistakes, and notifies BMC.BMC obtains sending alarm after message that BIOS informs, and reminding CPU on which groove position of maintainer that fault has occurred need to repair or replace.

Or the CPU detecting on certain groove position as BMC breaks down, the groove position at this CPU place is reported to BIOS; Described BIOS, according to the unique number of each core and the corresponding relation of this groove position, CPU place of described each CPU wherein preserving, determines the numbering of the core that this cpu fault can affect, and notifies virtual OS; Described virtual OS, according to the numbering of the affected core receiving, is subject to the core of fault effects to carry out isolation processing to these.

When virtual OS detects one section of internal memory and makes mistakes, by physical address notice BIOS corresponding to the internal memory of makeing mistakes.BIOS is according to the physical address of the internal memory of makeing mistakes, and in conjunction with the unique identification in the SPD information of each memory bar and the corresponding relation between the physical address of this memory bar, the unique identification of definite internal memory of makeing mistakes, informs that internal memory corresponding to this unique identification of BMC make mistakes.Described BMC is according to this unique identification, in conjunction with the corresponding relation between described memory bar and groove position, determines the groove position at the internal memory place of makeing mistakes, and sends alarm, and reminding memory bar on which groove position of maintainer that fault has occurred need to repair or replace.

Or the memory bar detecting on certain groove position as BMC breaks down, read the unique identification in the SPD information of the memory bar breaking down, report to BIOS.Described BIOS, according to the unique identification in the SPD information of wherein preserving and the corresponding relation between the physical address of this memory bar, determines application heap corresponding to which physical address of this fault effects, and notifies virtual OS.Described virtual OS carries out isolation processing to these affected application heaps.

Hence one can see that, and method described in the embodiment of the present invention, can realize the accurate correspondence between virtual resource and physical resource, maintainer can accurately be distinguished be which parts of main frame to occur problem, facilitates Breakdown Maintenance; Compare with existing whole the virtual machine moving on the physical node of makeing mistakes that need, saving resource, is beneficial to energy-conservation.

From foregoing, described in the embodiment of the present invention six in method, when virtual OS detects that CPU makes mistakes or memory address is made mistakes, by core corresponding to the CPU makeing mistakes or the memory address notice BIOS that makes mistakes, unique identification in SPD information corresponding to the memory address that finds the groove position at the CPU place that the core that makes mistakes is corresponding by BIOS according to corresponding relation or make mistakes, and notify BMC; By BMC, send alarm, remind CPU or the memory bar corresponding to this unique identification of which groove position of maintainer to make mistakes, remind maintainer's maintenance.

In sight for multiple host, each equipment position is not only just the slot number at each equipment place, also comprises the port numbers of the affiliated main frame of each equipment.Concrete, describe in detail below.

With reference to Fig. 8, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention seven.As shown in Figure 8, said method comprising the steps of:

Step S701: each CPU and each memory bar corresponding relation respectively and between the port at equipment place and groove position in the BMC of main frame obtains main frame, and preserve.

Described in the embodiment of the present invention seven, method is applicable in the sight of multiple host, as shown in Figure 9, and the network topological diagram during for multiple host.In Fig. 9, multiple host 300 is connected to virtual management center 400 by switch (not shown in Fig. 9), by described virtual management center 400, realizes virtualized related management.Every main frame has a well-determined switch ports themselves number.BMC 600 in the main frame 300 of each port is by upper strata DMS(Device Manager System, equipment management system) 500 unified managements.

For sight shown in Fig. 9, obtain CPU and memory bar respectively with the corresponding relation of groove position in, also need to determine the port numbers of this groove position respective hosts, be which groove position of the main frame which port is corresponding.Therefore, in the method described in the embodiment of the present invention seven, need to obtain CPU and memory bar respectively and equipment place port and groove position between corresponding relation, and be sent to BIOS.

For the multi-host system shown in Fig. 9, the corresponding relation that described BMC obtains can be as follows, and the 5th main frame of take describes as example (its port numbers is 5):

CPU,

slot

1,5, in place

CPU,

slot

2,5, in place

Memory,

slot

1,5, in place, SPD information

Memory,

slot

2,5, in place, SPD information

Memory,

slot

3,5, in place, SPD information

Memory,

slot

4,5, in place, SPD information

Memory,

slot

5,5, in place, SPD information

Memory,

slot

6,5, in place, SPD information

Memory,

slot

7,5, in place, SPD information

Memory,

slot

8,5, in place, SPD information

Step S702: described BIOS obtains in main frame the corresponding relation between each CPU and this CPU place port and groove position and processes, generate in this main frame the corresponding relation between each core core and affiliated CPU place port and groove position in each CPU, and be sent in BMC and preserve, report the CPU information that comprises corresponding relation to virtual OS simultaneously; Wherein, described CPU information comprises in this main frame the corresponding relation of each core and affiliated CPU place port and groove position in each CPU.

Concrete, the CPU information that described BIOS obtains after processing can be as shown in table 3 below:

The CPU information obtaining after table 3:BIOS processes

From upper table 3, in the CPU information obtaining after described BIOS processes, can obtain the corresponding relation between each core and this CPU place port and groove position in CPU, thus can be so that described in the embodiment of the present invention in method, the corresponding relation of virtual resource and physical resource can be as accurate as between each core and this CPU place port and groove position of CPU.

Step S703: described BIOS obtains the corresponding relation between each memory bar and this groove position, memory bar place and port in main frame, in conjunction with internal memory physical address addressing method, generate the corresponding relation between the physical address of each memory bar in this main frame and the port at this memory bar place and groove position, be sent to described BMC and preserve, report conventional memory information to virtual OS simultaneously.

Concrete, in actual applications, the physical address addressing method of described internal memory can comprise two kinds, for different physical address addressing methods, in main frame, the representation of the physical address of memory bar is different.Concrete, shown in table 4, be under two kinds of internal memory addressing methods respectively corresponding memory bar physical address represent form.

Table 4:

The internal memory physical address addressing method that described BIOS is used in conjunction with reality, corresponding relation between the described memory bar receiving and this memory bar place port and groove position is processed, obtain the physical address of every root memory bar in this main frame and the corresponding relation between this memory bar place port and groove position, report to operating system OS.Make thus, in method, the corresponding relation of virtual resource and physical resource can be as accurate as between the physical address of every root memory bar and the port at memory bar place and groove position described in the embodiment of the present invention.

Step S704: after described virtual OS starts, receive CPU information and memory bar information that described BIOS reports, form resource pool.

Concrete, the resource pool that described virtual OS forms is as follows:

CPU?Pool:

(Slot?1,core?1,5)?(Slot?1,core?2,5)?(Slot?1,core?3,5)?(Slot?1,core?4,5)?(Slot?2,core?1,5)?(Slot?2,core?2,5)?(Slot?2,core?3,5)?(Slot?2,core?4,5)

Memory?Pool:

0～1023M

Step S705: combined with virtualization is processed, draws logical virtual resource and physical resource.

It should be noted that, described in the embodiment of the present invention seven in method, in step S701, BMC also can only obtain the corresponding relation between each CPU and groove position, equipment place in described main frame, and is kept in described BMC, now in described method, will not comprise step S703, and in step S704, after described virtual OS starts, also only receive the CPU information that described BIOS reports, form resource pool.Or in step S701, BMC also can only obtain the corresponding relation between each memory bar and groove position, equipment place in described main frame, and is kept in described BMC.Now in described method, will not comprise step S702, and in step S704, after described virtual OS starts, also only receive the memory bar information that described BIOS reports, form resource pool.

Described in the embodiment of the present invention in method, described BIOS to the CPU getting and memory bar the corresponding relation respectively and between groove position and port process, obtain in main frame the corresponding relation of each core respectively and between the physical address of the groove position of this CPU and the corresponding relation of port and every root memory bar and this groove position, memory bar place and port in each CPU, and above-mentioned each corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Same, method also goes for the sight of multiple host described in the embodiment of the present invention six.Concrete, with reference to Figure 10, for realizing physical resource and method flow diagram corresponding to virtual resource described in the embodiment of the present invention eight.As shown in figure 10, said method comprising the steps of:

Step S801: obtain each CPU and the corresponding relation of each memory bar respectively and between equipment place port and groove position at the BMC of main frame, and preserve; Wherein, the corresponding relation between described each memory bar and this groove position, memory bar place comprises unique identification in the SPD information of each memory bar and the corresponding relation between this memory bar place port and groove position.

Step S802: described BIOS obtains the unique number of each core in each CPU of the corresponding relation between each CPU and this CPU place port and groove position in main frame and systemic presupposition, generate in this main frame the corresponding relation between the unique number of each core and affiliated CPU place port and groove position in each CPU, be kept in BIOS, and report conventional CPU information to virtual OS.

Step S803: described BIOS obtains in main frame the corresponding relation between each memory bar and this memory bar place port and groove position and processes, generate unique identification in the SPD information of unique identification in the SPD information of each memory bar and the corresponding relation between this memory bar place port and groove position and each memory bar and the corresponding relation between the physical address of this memory bar, be kept in BIOS, and report conventional memory information to virtual OS.

Step S804: after described virtual OS starts, receive CPU information and memory bar information that described BIOS reports, form resource pool.

Then, described virtual OS combined with virtualization is processed, and draws logical virtual resource and physical resource.

It should be noted that, described in the embodiment of the present invention eight in method, in step S801, BMC also can only obtain the corresponding relation between each CPU and groove position, equipment place in described main frame, and is kept in described BMC, now in described method, will not comprise step S803, and in step S804, after described virtual OS starts, also only receive the CPU information that described BIOS reports, form resource pool.Or in step S801, BMC also can only obtain the corresponding relation between each memory bar and groove position, equipment place in described main frame, and is kept in described BMC.Now in described method, will not comprise step S802, and in step S804, after described virtual OS starts, also only receive the memory bar information that described BIOS reports, form resource pool.

Described in the embodiment of the present invention eight in method, described BIOS to the CPU getting and/or memory bar the corresponding relation respectively and between port and groove position process, obtain the unique number of each kernel of each CPU in main frame and the corresponding relation of this CPU place port and groove position/or the SPD information of each memory bar in unique identification and unique identification and the port of this memory bar and the corresponding relation between groove position in the SPD information of the corresponding relation between the physical address of this memory bar and each memory bar, thereby realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, method realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

What corresponding to the embodiment of the present invention, provide realizes physical resource and method corresponding to virtual resource, and the embodiment of the present invention also provides a kind of basic input-output system BIOS.

With reference to Figure 11, it is the structural drawing of the basic input-output system described in the embodiment of the present invention one.As shown in figure 11, described system comprises: acquiring unit 901, processing unit 902 and transmitting element 903.

Described acquiring unit 901, for obtaining the corresponding relation between each central processor CPU of main frame and position.

Described processing unit 902, for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU.

Described transmitting element 903, preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to baseboard management controller BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

Described in the embodiment of the present invention one in system, corresponding relation between each CPU and position in the main frame getting is processed, generate the corresponding relation of each core respectively and between affiliated CPU position in each CPU, above-mentioned corresponding relation is sent to BMC and preserves and pass through CPU information reporting to operating system OS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention one, system has realized corresponding between virtual resource and physical resource for the CPU in main frame, and further, this system can also realize corresponding between virtual resource and physical resource for memory bar in main frame.

Concrete, described acquiring unit 901, also for obtaining the corresponding relation between each memory bar of described main frame and position.

Described processing unit 902, also for according to the corresponding relation between described each memory bar and position, in conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address of described each memory bar and the corresponding relation between memory bar position.

Described transmitting element 903, also preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to described BMC.

System described in the embodiment of the present invention one, each memory bar in the main frame getting and the corresponding relation between position are processed, generate the physical address of each memory bar in main frame and the corresponding relation between this memory bar position, and upper this corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Figure 12, it is the structural drawing of the basic input-output system described in the embodiment of the present invention two.As shown in figure 12, described system comprises: acquiring unit 1001, processing unit 1002 and transmitting element 1003.

Described acquiring unit 1001, for obtaining the corresponding relation between each memory bar of main frame and position.

Described processing unit 1002, be used for according to the corresponding relation between described each memory bar and position, in conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address of described each memory bar and the corresponding relation between memory bar position.

Described transmitting element 1003, preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to baseboard management controller BMC.

Described in the embodiment of the present invention two in system, each memory bar in the main frame getting and the corresponding relation between position are processed, generate the physical address of each memory bar in main frame and the corresponding relation between this memory bar position, and upper this corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention two, system has realized corresponding between virtual resource and physical resource for the memory bar in main frame, and further, this system can also realize for the CPU in main frame corresponding between virtual resource and physical resource.

Concrete, described acquiring unit 1001, also for obtaining the corresponding relation between each central processor CPU of described main frame and position.

Described processing unit 1002, also for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU.

Described transmitting element 1003, also preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to described BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

System described in the embodiment of the present invention two, further, corresponding relation between each CPU and position in the main frame getting is processed, generate the corresponding relation of each core respectively and between affiliated CPU position in each CPU, above-mentioned corresponding relation is sent to BMC and preserves and pass through CPU information reporting to operating system OS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Figure 13, it is the structural drawing of the basic input-output system described in the embodiment of the present invention three.As shown in figure 13, described system comprises: acquiring unit 1101, processing unit 1102 and storage unit 1103.

Described acquiring unit 1101, for obtaining the unique number of each core in corresponding relation between each central processor CPU of main frame and position and each CPU.

Described processing unit 1102, be used for according to the unique number of the corresponding relation between described each CPU and position and each each core of CPU the corresponding relation in described each CPU of generation between the unique number of each core and the position of affiliated CPU.

Described storage unit 1103, for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

Described in the embodiment of the present invention three in system, corresponding relation between each CPU and position in the main frame getting is processed, generate in main frame the unique number of each core and the corresponding relation between affiliated CPU position in each CPU, and above-mentioned corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention three, system has realized corresponding between virtual resource and physical resource for the CPU in main frame, and further, this system can also realize corresponding between virtual resource and physical resource for memory bar in main frame.

Concrete, described acquiring unit 1101, also for obtaining the corresponding relation between each memory bar of described main frame and position.

Described processing unit 1102, also for according to the corresponding relation between described each memory bar and position, generate unique identification in the SPD information that serial that the module of described each memory bar exists detects unique identification in SPD information and the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar.

Described storage unit 1103, also for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

System described in the embodiment of the present invention three, further, corresponding relation between each memory bar and position in the main frame getting is processed, unique identification in unique identification in generation main frame in the SPD information of each memory bar and the SPD information of the corresponding relation between this memory bar position and each memory bar and the corresponding relation between the physical address of this memory bar, and above-mentioned each corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Figure 14, it is the structural drawing of the basic input-output system described in the embodiment of the present invention four.As shown in figure 14, described system comprises: acquiring unit 1201, processing unit 1202 and storage unit 1203.

Described acquiring unit 1201, for obtaining the corresponding relation between each memory bar of main frame and position.

Described processing unit 1202, be used for according to the corresponding relation between described each memory bar and position the unique identification in the unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar.

Described storage unit 1203, for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

Described in the embodiment of the present invention four in system, corresponding relation between each memory bar and position in the main frame getting is processed, unique identification in unique identification in generation main frame in the SPD information of each memory bar and the SPD information of the corresponding relation between this memory bar position and each memory bar and the corresponding relation between the physical address of this memory bar, and above-mentioned each corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Described in the embodiment of the present invention four, system has realized corresponding between virtual resource and physical resource for the memory bar in main frame, further, this system can also be for the realization of CPU in main frame corresponding between virtual resource and physical resource.

Concrete, described acquiring unit 1201, also for obtaining the unique number of each core in corresponding relation between each central processor CPU of main frame and position and each CPU.

Described processing unit 1202, also for according to the unique number of the corresponding relation between described each CPU and position and each each core of CPU, generate the corresponding relation between the unique number of each core and the position of affiliated CPU in described each CPU.

Described storage unit 1203, also for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

System described in the embodiment of the present invention four, further, corresponding relation between each CPU and position in the main frame getting is processed, generate in main frame the unique number of each core and the corresponding relation between affiliated CPU position in each CPU, and above-mentioned corresponding relation is kept in described BIOS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Figure 15, it is the structural drawing of the basic input-output system described in the embodiment of the present invention one.As shown in figure 15, described system comprises: getter 1301, processor 1302 and transmitter 1303.

Described getter 1301, for obtaining the corresponding relation between each central processor CPU of main frame and position.

Described processor 1302, for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU.

Described transmitter 1303, preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to baseboard management controller BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

Described in the embodiment of the present invention one in system, described basic input-output system BIOS processes the corresponding relation between each CPU and position in the main frame getting, generate the corresponding relation of each core respectively and between affiliated CPU position in each CPU, above-mentioned corresponding relation is sent to BMC and preserves and pass through CPU information reporting to operating system OS, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

Concrete, described getter 1301, also for obtaining the corresponding relation between each memory bar of described main frame and position.

Described processor 1302, also for according to the corresponding relation between described each memory bar and position, in conjunction with the physical address addressing method of the internal memory of described main frame, generate the physical address of described each memory bar and the corresponding relation between memory bar position.

Described transmitter 1303, also preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to described BMC.

System described in the embodiment of the present invention one, further, each memory bar in the main frame getting and the corresponding relation between position are processed, generate the physical address of each memory bar in main frame and the corresponding relation between this memory bar position, and upper this corresponding relation is sent to BMC preserves, realize the correspondence between virtual resource and physical resource in main frame.Virtual resource and the associated size ratio between physical resource that described in the embodiment of the present invention, system realizes are meticulousr, can effectively improve the efficiency of fault management and administration of energy conservation.

With reference to Figure 16, it is the structural drawing of the basic input-output system described in the embodiment of the present invention two.As shown in figure 16, described system comprises: getter 1401, processor 1402 and transmitter 1403.

Described getter 1401, for obtaining the corresponding relation between each memory bar of main frame and position.

Described processor 1402, for according to the corresponding relation between described each memory bar and position, the physical address addressing method in conjunction with the internal memory of described main frame, generates the physical address of described each memory bar and the corresponding relation between memory bar position.

Described transmitter 1403, preserves for the corresponding relation between the physical address of described each memory bar and memory bar position being sent to described BMC.

Concrete, described getter 1401, also for obtaining the corresponding relation between each central processor CPU of main frame and position.

Described processor 1402, also for according to the corresponding relation between described each CPU and position, generates the corresponding relation between each core and the position of affiliated CPU in described each CPU.

Described transmitter 1403, also preserves for the corresponding relation between described each core and the position of affiliated CPU being sent to baseboard management controller BMC; And, the corresponding relation between described each core and affiliated CPU position is passed through to CPU information reporting to operating system OS.

With reference to Figure 17, it is the structural drawing of the basic input-output system described in the embodiment of the present invention three.As shown in figure 17, described system comprises: getter 1501, processor 1502 and storer 1503.

Described getter 1501, for obtaining the unique number of each core in corresponding relation between each central processor CPU of main frame and position and each CPU.

Described processor 1502, be used for according to the unique number of the corresponding relation between described each CPU and position and each each core of CPU the corresponding relation in described each CPU of generation between the unique number of each core and the position of affiliated CPU.

Described storer 1503, for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

Concrete, described getter 1501, also for obtaining the corresponding relation between each memory bar of described main frame and position.

Described processor 1502, also for according to the corresponding relation between described each memory bar and position, generate unique identification in the SPD information that serial that the module of described each memory bar exists detects unique identification in SPD information and the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar.

Described storer 1503, also for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

With reference to Figure 18, it is the structural drawing of the basic input-output system described in the embodiment of the present invention four.As shown in figure 18, described system comprises: getter 1601, processor 1602 and storer 1603.

Described getter 1601, for obtaining the corresponding relation between each memory bar of main frame and position.

Described processor 1602, be used for according to the corresponding relation between described each memory bar and position the unique identification in the unique identification in the serial detection SPD information that described in generating, the module of each memory bar exists and the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar.

Described storer 1603, for preserving the unique identification of SPD information and the unique identification in the SPD information of the corresponding relation between described each memory bar position and described each memory bar and the corresponding relation between the physical address of described each memory bar of described each memory bar.

Described in the embodiment of the present invention four, system has realized corresponding between virtual resource and physical resource for the memory bar in main frame, and further, this system can also realize for the CPU in main frame corresponding between virtual resource and physical resource.

Concrete, described getter 1601, also for obtaining the unique number of each core in corresponding relation between each central processor CPU of main frame and position and each CPU.

Described processor 1602, also for according to the unique number of the corresponding relation between described each CPU and position and each each core of CPU, generate the corresponding relation between the unique number of each core and the position of affiliated CPU in described each CPU.

Described storer 1603, also for preserving the corresponding relation between the described unique number of each core and the position of affiliated CPU.

Those of ordinary skills can recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with the combination of electronic hardware or computer software and electronic hardware.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can specifically should be used for realizing described function with distinct methods to each, but this realization should not thought and exceeds scope of the present invention.

Those skilled in the art can be well understood to, and for convenience and simplicity of description, the specific works process of the system of foregoing description, device and unit, can, with reference to the corresponding process in preceding method embodiment, not repeat them here.

In the several embodiment that provide in the application, should be understood that disclosed system, apparatus and method can realize by another way.For example, device embodiment described above is only schematic, for example, the division of described unit, be only that a kind of logic function is divided, during actual realization, can have other dividing mode, for example a plurality of unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.

The described unit as separating component explanation can or can not be also physically to separate, and the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in a plurality of network element.Can select according to the actual needs some or all of unit wherein to realize the object of the present embodiment scheme.

In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can be also that the independent physics of unit exists, and also can be integrated in a unit two or more unit.

If described function usings that the form of SFU software functional unit realizes and during as production marketing independently or use, can be stored in a computer read/write memory medium.Understanding based on such, the part that technical scheme of the present invention contributes to prior art in essence in other words or the part of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, or the network equipment etc.) or processor (processor) carry out all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, ROM (read-only memory) (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CDs.

The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by the described protection domain with claim.　

Claims

1. realize the method that physical resource and virtual resource are corresponding, it is characterized in that, described method comprises:

2. the method described in 1 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

3. the method described in 1 or 2 as requested, is characterized in that, also comprises:

4. the method described in 3 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

5. realize the method that physical resource and virtual resource are corresponding, it is characterized in that, described method comprises:

6. the method described in 5 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

7. the method described in 5 or 6 as requested, is characterized in that, also comprises:

8. the method described in 7 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

9. realize the method that physical resource and virtual resource are corresponding, it is characterized in that, described method comprises:

10. the method described in 9 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

11. methods described in 9 or 10 as requested, is characterized in that, also comprise:

12. methods described in 11 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

Realize physical resource and method corresponding to virtual resource for 13. 1 kinds, it is characterized in that, described method comprises:

14. methods described in 13 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

15. methods described in 13 or 14 as requested, is characterized in that, also comprise:

16. methods described in 15 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

17. 1 kinds of basic input-output systems, is characterized in that, described system comprises:

18. basic input-output systems described in 17 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

19. basic input-output systems described in 17 or 18 as requested, is characterized in that,

20. basic input-output systems described in 19 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

21. 1 kinds of basic input-output systems, is characterized in that, described system comprises:

22. basic input-output systems described in 21 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

23. basic input-output systems described in 20 or 21 as requested, is characterized in that,

24. basic input-output systems described in 23 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

25. 1 kinds of basic input-output systems, is characterized in that, described system comprises:

26. basic input-output systems described in 25 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

27. basic input-output systems described in 25 or 26 as requested, is characterized in that,

28. basic input-output systems described in 27 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.

29. 1 kinds of basic input-output systems, is characterized in that, described system comprises:

30. basic input-output systems described in 29 as requested, is characterized in that, the position of described CPU comprises described CPU place slot number or described CPU place port numbers and slot number.

31. basic input-output systems described in 29 or 30 as requested, is characterized in that,

32. basic input-output systems described in 31 as requested, is characterized in that, the position of described memory bar comprises described memory bar place slot number or described memory bar place port numbers and slot number.　