CN103618682A - Low power frequency modulation method based on traffic - Google Patents

Low power frequency modulation method based on traffic Download PDF

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CN103618682A
CN103618682A CN201310485617.2A CN201310485617A CN103618682A CN 103618682 A CN103618682 A CN 103618682A CN 201310485617 A CN201310485617 A CN 201310485617A CN 103618682 A CN103618682 A CN 103618682A
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frequency
flow
traffic
module
frequency modulation
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CN103618682B (en
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周磊
李亮华
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Jiaxinghuabing Internet Of Things Technology Co Ltd
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Hangzhou Dianzi University
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Abstract

The invention relates to a low power frequency modulation method based on traffic. The method of the invention is carried out by calculating a network data flow size to realize frequency modulation. A quantity of data packets received by a network device in a specific time is calculated; according to the quantity of the received data packets, the traffic in a current network is reflected; and the traffic is chosen as an index of each frequency, so as to realize a self-adaptive modulation based on the traffic. The invention can realize the self-adaptive modulation, avoid the frequency oscillation, and adjust the frequency modulation sensitivity, so that the module power consumption is reduced and the energy is saved.

Description

Low-power-consumption frequency modulation method based on flow
Technical Field
The invention relates to a power supply energy-saving technology in the field of communication, in particular to an energy-saving frequency modulation control method of communication equipment.
Background
According to related research organization survey, the method comprises the following steps: in the Ethernet wired communication technology, 30 hundred million network interface devices are globally used in a local area network; it is estimated that the total network power consumption of a european internet provider (ISP) in 2010 is about 214 hundred million kilowatt-hours, and this consumption prediction will increase substantially to about 358 hundred million kilowatt-hours by 2020 without green energy saving technology. Therefore, in the current advocated ecological network construction, effective utilization of energy becomes more and more important, and research and improvement of power consumption of network equipment are also necessary.
The average bandwidth utilization rate of the current Internet backbone network is 30 percent, and the highest average bandwidth utilization rate is less than 45 percent; however, in order to smoothly circulate network data streams and to cope with the occurrence of sudden situations, current network devices generally operate at full load all the day, which causes a great consumption of power. In response to this phenomenon, network equipment providers and researchers have proposed two basic methods to operate network equipment in a proper working state; one is to make the network device switch between operation and sleep, and the other is to realize the self-adapting adjustment of the network device working frequency according to some frequency modulation mechanism. Due to the difficult predictability of network data flow, network performance may be greatly affected when network devices are switched between sleep and running states; however, the effective adaptive frequency modulation mechanism can solve the problem well, thereby realizing perfect combination of performance and power consumption.
For the frequency self-adaptive adjustment of network equipment, there are related researches at home and abroad, and the main two ways are to realize the frequency modulation of the equipment according to the buffer amount of the current data stream or the configuration of upper-layer software[The two methods can theoretically achieve the effect of frequency modulation, but have certain defects. First, the software configures the frequency modulation, which is relatively complicated to implement because the upper layer software cannot implement the dynamic adjustment of the frequency quickly and efficiently, and because the mutual communication between the software and the hardware is involved. The adaptive frequency modulation method based on the buffer storage also has certain disadvantages: at a specific frequency, a specific buffer amount is an index that can be used as an operating state of the router, but if at a different frequency, it is meaningless to use the specific buffer amount to indicate the current operating state, and this frequency modulation method also causes the adjacent frequency to switch repeatedly, thereby affecting the stability of the router,and a large amount of data packets are lost and extra power consumption is wasted in the switching process, and although a certain algorithm (dual threshold or multi-threshold) can solve the problem to some extent, a certain potential threat can be caused to the stability of the network device.
Disclosure of Invention
The invention aims to effectively solve the oscillation phenomenon of frequency adjustment and the defects of complexity and slowness of software frequency modulation, and provides a method for reducing the power consumption of network equipment by using a flow-based adaptive frequency modulation mechanism.
The invention frequency-modulates by calculating the size of the network data stream. The number of data packets received by the network equipment is calculated in a specific time (a specific time threshold value is set), the current flow in the network is reflected according to the number of the received data packets, and then the flow is used as an index for selecting each frequency, so that the self-adaptive frequency modulation based on the flow is realized.
The technical scheme adopted by the invention for solving the technical problems is as follows:
the method comprises the following steps: accurate calculation of network device traffic:
when the network data flow enters the input queue of the flow counting module, the counting module divides the data flow into a plurality of data packets, calculates the byte number of each data packet, counts the total byte number received in the set time through a counting module, and can adjust the sensitivity of the frequency modulation method by adjusting the counting time.
Step two: generation of multiple frequencies
The global clock frequency is generated by using a clock IP core provided by an FPGA manufacturer or by a hardware description language method, and the required characteristics of the global clock are as follows: the chip has the advantages of high load capacity, small time delay difference, small waveform distortion of clock signals and high working reliability.
Step three: frequency modulation mechanism
The flow t is not increased or decreased relative to the previous time;
when t increases, the frequency and flow values are related as follows:
Figure 2013104856172100002DEST_PATH_IMAGE002
when t decreases, the frequency and flow values are related as follows:
wherein, fin order to be the working frequency of the frequency converter,
Figure 2013104856172100002DEST_PATH_IMAGE006
is as followsA frequency of
Figure 2013104856172100002DEST_PATH_IMAGE010
,
Figure 2013104856172100002DEST_PATH_IMAGE012
;
Figure 2013104856172100002DEST_PATH_IMAGE014
In order for the flow statistics module to receive the flow value,is a set one
Figure 541653DEST_PATH_IMAGE008
The flow rate value of the flow rate is smaller,
Figure 2013104856172100002DEST_PATH_IMAGE018
is a set one
Figure 583427DEST_PATH_IMAGE008
The value of the flow rate that is greater,，；
Figure 2013104856172100002DEST_PATH_IMAGE022
。
buffer space is reserved between adjacent flow intervals, namely adjacent flow value intervals are set as
Figure 2013104856172100002DEST_PATH_IMAGE024
. When the module operates at a frequency of
Figure 523754DEST_PATH_IMAGE006
Time of day, data traffictIncreases from small to large to exceedWhile switching the operating frequency to a high frequency mode
Figure 2013104856172100002DEST_PATH_IMAGE028
(if the received data stream is large enough to
Figure 2013104856172100002DEST_PATH_IMAGE030
，
Figure 2013104856172100002DEST_PATH_IMAGE032
Etc., the frequency may also be switched directly to
Figure 2013104856172100002DEST_PATH_IMAGE034
，Up to the highest frequency
Figure 2013104856172100002DEST_PATH_IMAGE038
) (ii) a Also, when the module is operating at frequency
Figure 712028DEST_PATH_IMAGE006
Time of day, data traffictDecreases from large to small to below
Figure 2013104856172100002DEST_PATH_IMAGE040
Then the frequency is switched to the low frequency mode
Figure 2013104856172100002DEST_PATH_IMAGE042
(if the received data stream rapidly gets smaller than it is
Figure 2013104856172100002DEST_PATH_IMAGE044
，Etc., the frequency may also be switched directly to
Figure 2013104856172100002DEST_PATH_IMAGE048
，
Figure 2013104856172100002DEST_PATH_IMAGE050
Up to the lowest frequency
Figure 2013104856172100002DEST_PATH_IMAGE052
). When in use
Figure 2013104856172100002DEST_PATH_IMAGE054
When the current frequency is in the buffer interval, if the current frequency is in low frequency
Figure 347540DEST_PATH_IMAGE042
While the frequency of the device continues to remain at a low frequency
Figure 305918DEST_PATH_IMAGE042
(ii) a If the current frequency is operating at the frequency
Figure 442502DEST_PATH_IMAGE006
While the equipment continues to remain at
Figure 298331DEST_PATH_IMAGE006
，
Figure 291695DEST_PATH_IMAGE006
And
Figure 2013104856172100002DEST_PATH_IMAGE056
are adjacent frequency values. Thus, frequency jitter is effectively avoided.
Advantageous effects：
Compared with the prior art, the invention has the following remarkable advantages: the flow-based frequency modulation method can realize self-adaptive frequency modulation; the oscillation of frequency is avoided, and the sensitivity of frequency modulation is adjustable; and the power consumption of the module is reduced, and energy is saved.
Drawings
FIG. 1 is a block diagram of the frequency modulation method of the present invention;
FIG. 2 is a flow chart of an implementation of the present invention;
FIG. 3 illustrates two frequency modulation schemes of the present invention with and without buffering;
FIG. 4 is a diagram of the dual-threshold buffered FM state transition of the present invention;
fig. 5 is a structural view of an embodiment of the present invention.
Detailed Description
As shown in fig. 1 and fig. 2, the frequency modulation method in the present design performs frequency modulation by calculating the size of the network data stream. The number of data packets received by the network equipment is calculated in a specific time (a specific time threshold value is set), the current flow in the network is reflected according to the number of the received data packets, and then the flow is used as an index for selecting each frequency, so that the self-adaptive frequency modulation based on the flow is realized.
The technical scheme adopted by the invention is as follows:
1) accurate calculation of network device traffic:
when the network data stream enters the input queue of the flow counting module, the counting module divides the data stream into data packets according to the Ethernet controller, calculates the number of bytes of each data packet, counts the total number of bytes received within a set time through a counting module, and can adjust the size of the counting time to adjust the sensitivity of the frequency modulation method.
2) Generation of multiple frequencies
The global clock frequency is generated by using a clock IP core provided by an FPGA manufacturer or by a hardware description language method, and the required characteristics of the global clock are as follows: the chip has the advantages of high load capacity, small time delay difference, small waveform distortion of clock signals and high working reliability.
3) Frequency modulation mechanism
Flow rate
Figure DEST_PATH_IMAGE058
None is an increase or decrease relative to the previous time;
when t increases, the frequency and flow values are related as follows:
Figure 609806DEST_PATH_IMAGE002
when in use
Figure DEST_PATH_IMAGE060
When decreasing, the frequency and flow values are related as follows:
Figure DEST_PATH_IMAGE062
wherein, fin order to be the working frequency of the frequency converter,is as follows
Figure 680323DEST_PATH_IMAGE008
A frequency of,;
Figure 751550DEST_PATH_IMAGE014
In order for the flow statistics module to receive the flow value,is a set one
Figure 356286DEST_PATH_IMAGE008
The flow rate value of the flow rate is smaller,
Figure 22890DEST_PATH_IMAGE018
is a set one
Figure 101705DEST_PATH_IMAGE008
The value of the flow rate that is greater,
Figure 786633DEST_PATH_IMAGE020
，；
Figure 126228DEST_PATH_IMAGE022
。
as shown in fig. 3 and 4, a buffer space is reserved between adjacent flow rate intervals, that is, adjacent flow rate value intervals are set to
Figure 946416DEST_PATH_IMAGE024
. When the module operates at a frequency of
Figure 485851DEST_PATH_IMAGE006
Time of day, data traffictIncreases from small to large to exceed
Figure 428399DEST_PATH_IMAGE026
While switching the operating frequency to a high frequency mode
Figure 804017DEST_PATH_IMAGE028
(if the received data stream is large enough to
Figure 913049DEST_PATH_IMAGE030
，Etc., the frequency may also be switched directly to
Figure 561386DEST_PATH_IMAGE034
，
Figure 486616DEST_PATH_IMAGE036
Up to the highest frequency) (ii) a Also, when the module is operating at frequency
Figure 395590DEST_PATH_IMAGE006
Time of day, data traffictDecreases from large to small to belowThen the frequency is switched to the low frequency mode
Figure 217101DEST_PATH_IMAGE042
(if the received data stream rapidly gets smaller than it is，
Figure 115098DEST_PATH_IMAGE046
Etc., the frequency may also be switched directly to，
Figure 329228DEST_PATH_IMAGE050
Up to the lowest frequency
Figure 895339DEST_PATH_IMAGE052
). When in use
Figure 134690DEST_PATH_IMAGE054
When the current frequency is in the buffer interval, if the current frequency is in low frequency
Figure 186609DEST_PATH_IMAGE042
While the frequency of the device continues to remain at a low frequency
Figure 511411DEST_PATH_IMAGE042
(ii) a If the current frequency is operating at the frequency
Figure 68164DEST_PATH_IMAGE006
While the equipment continues to remain at
Figure 896442DEST_PATH_IMAGE006
，
Figure 693497DEST_PATH_IMAGE006
And
Figure 990748DEST_PATH_IMAGE056
are adjacent frequency values. Thus, frequency jitter is effectively avoided. Regardless of the current frequency being
Figure 101924DEST_PATH_IMAGE006
Or also
Figure 299556DEST_PATH_IMAGE056
And the frequency modulation equipment can work normally.
Referring to fig. 5, a reference router on a NetFPGA development platform is selected in the embodiment. In order to ensure that the frequency modulation method can accurately calculate the current network traffic, the frequency modulation module must be added to be embedded in a front-end module designed in the whole router, so that the accuracy of traffic calculation cannot be affected due to insufficient processing performance of a subsequent processing module.
A frequency modulation decision mechanism is added in the front end of a reference router network layer User _ Data _ Path, namely a Data packet receiving module (Rx _ Quference). The Rx _ Quference module is arranged between the link layer processing module and the network layer processing module, is used for receiving input Data of a link layer, packaging the input Data into a Data packet, caching the Data packet by a FIFO (First In First out) and then forwarding the Data packet to the network layer module (User _ Data _ Path) for routing processing.
The frequency modulation judging mechanism firstly sets a corresponding frequency modulation mark signal according to the network flow counted by the flow counting module, the multi-frequency generating module is used for generating various frequencies, selecting a proper frequency according to the difference of the frequency modulation mark signal and then transmitting the proper frequency to each function module of the router through the global clock line. The multi-frequency module has five clock frequencies which can be selected, in order to obviously distinguish the processing capability and the power consumption requirement of the router under each frequency, the five frequencies of the design are in a frequency multiplication relation and are generated by the Xilinx DCM IP core, and the sizes of the five frequencies are 7.813MHz, 15.625MHz, 31.25MHz, 62.5MHz and the highest frequency of 125MHz respectively. The frequency modulation judging mechanism is correspondingly provided with five frequency modulation mark signals which respectively correspond to different frequencies. The data flow statistic module is used for counting the data flow received by the network port, and the principle of the data packet statistic module is that when the Rx _ Quence receives a data frame, the data frame is packaged into data packets, the size of the data packet is calculated, a packet marking signal with a clock period length is generated for each data packet, and then the packet marking signal is collected within a certain time threshold interval to realize the calculation of the data flow. To prevent miscalculation, the flag signal of a data packet must be reset after one clock cycle (packet flag signal is 1, reset is 0 in this context). Moreover, in order to ensure the correctness of the statistics, the clock signal used by the data flow statistics module does not change along with the change of the frequency modulation signal, and the size of the clock signal is 125 MHz.
The embodiment of the invention refers to a router frequency modulation self-adaptive frequency modulation method, which comprises the following specific operation steps:
step 1, generating five different frequencies through a Xilinx DCM IP core;
step 2, receiving data flow from a NetFPGA network port, dividing the data flow into data packets through an Ethernet controller, counting the number of bytes of the data packets, generating a data packet flag bit, and starting timing;
step 3, calculating the total number of the generated data zone bits within the timing time of 1 s;
step 4, determining corresponding frequency according to the total number of different marks;
and 5, taking the determined frequency as the running frequency of each functional module of the reference router.

Claims (1)

1. A low-power consumption frequency modulation method based on flow is characterized by comprising the following steps:
the method comprises the following steps: accurate computation of network device traffic
When a network data stream enters an input queue of a flow counting module, the counting module divides the data stream into a plurality of data packets, calculates the byte number of each data packet, counts the total received byte number within a set time through a counting module, and can adjust the sensitivity of the frequency modulation method by adjusting the counting time;
step two: generation of multiple frequencies
The global clock frequency is generated by using a clock IP core provided by an FPGA manufacturer or by a hardware description language method, and the required characteristics of the global clock are as follows: the chip has the advantages that the chip has extremely strong load capacity, any one global clock drive line can drive a trigger in the chip, the time delay difference is extremely small, the waveform distortion of a clock signal is small, and the working reliability is good;
step three: frequency modulation mechanism
The flow t is not increased or decreased relative to the previous time;
when t increases, the frequency and flow values are related as follows:
Figure DEST_PATH_IMAGE002
when t decreases, the frequency and flow values are related as follows:
Figure DEST_PATH_IMAGE004
wherein, fin order to be the working frequency of the frequency converter,is as follows
Figure DEST_PATH_IMAGE008
A frequency of
Figure DEST_PATH_IMAGE010
,
Figure DEST_PATH_IMAGE012
;
Figure DEST_PATH_IMAGE014
In order for the flow statistics module to receive the flow value,
Figure DEST_PATH_IMAGE016
is a set one
Figure 783442DEST_PATH_IMAGE008
The flow rate value of the flow rate is smaller,is a set one
Figure 66525DEST_PATH_IMAGE008
The value of the flow rate that is greater,，
Figure 404227DEST_PATH_IMAGE012
；
Figure DEST_PATH_IMAGE022
；
buffer space is reserved between adjacent flow intervals, namely adjacent flow value intervals are set as
Figure DEST_PATH_IMAGE024
(ii) a When the module operates at a frequency of
Figure 394049DEST_PATH_IMAGE006
Time of day, data traffictIncreases from small to large to exceed
Figure DEST_PATH_IMAGE026
While switching the operating frequency to a high frequency modeIf the received data stream is large enough to
Figure DEST_PATH_IMAGE030
，Etc., the frequency may also be switched directly to
Figure DEST_PATH_IMAGE034
，
Figure DEST_PATH_IMAGE036
Up to the highest frequency
Figure DEST_PATH_IMAGE038
(ii) a Also, when the module is operating at frequencyTime of day, data traffictDecreases from large to small to belowThen the frequency is switched to the low frequency modeIf the received data stream rapidly gets smaller
Figure DEST_PATH_IMAGE044
，
Figure DEST_PATH_IMAGE046
Etc., the frequency may also be switched directly to
Figure DEST_PATH_IMAGE048
，
Figure DEST_PATH_IMAGE050
Up to the lowest frequency(ii) a When in use
Figure DEST_PATH_IMAGE054
When the current frequency is in the buffer interval, if the current frequency is in low frequency
Figure 982912DEST_PATH_IMAGE042
While the frequency of the device continues to remain at a low frequency(ii) a If the current frequency is operating at the frequency
Figure 342535DEST_PATH_IMAGE006
While the equipment continues to remain at
Figure 652293DEST_PATH_IMAGE006
，
Figure 660701DEST_PATH_IMAGE006
And
Figure DEST_PATH_IMAGE056
are adjacent frequency values.
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Cited By (2)

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Publication number Priority date Publication date Assignee Title
CN105049365A (en) * 2015-06-15 2015-11-11 国家计算机网络与信息安全管理中心 Adaptive frequency modulation energy-saving method for multi-core multi-thread intrusion detection device
CN113132272A (en) * 2021-03-31 2021-07-16 中国人民解放军战略支援部队信息工程大学 Network switching frequency dynamic adjustment method and system based on flow perception and network switching chip structure

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105049365A (en) * 2015-06-15 2015-11-11 国家计算机网络与信息安全管理中心 Adaptive frequency modulation energy-saving method for multi-core multi-thread intrusion detection device
CN105049365B (en) * 2015-06-15 2019-05-31 国家计算机网络与信息安全管理中心 A kind of self-adapting frequency modulation power-economizing method of Multi-core intrusion detection device
CN113132272A (en) * 2021-03-31 2021-07-16 中国人民解放军战略支援部队信息工程大学 Network switching frequency dynamic adjustment method and system based on flow perception and network switching chip structure
CN113132272B (en) * 2021-03-31 2023-02-14 中国人民解放军战略支援部队信息工程大学 Network switching frequency dynamic adjustment method and system based on flow perception and network switching chip structure

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