CN103616823B - A kind of DC motor speed-regulating simulation and experiment integrated apparatus and method - Google Patents

Abstract

A kind of DC motor speed-regulating simulation and experiment integrated apparatus and method, this device comprises host computer unit, control module and direct current generator unit; Host computer unit and control module carry out two-way communication by USB communication module; Direct current generator sends real-time rotate speed value to control module, and control module calculates controlled quentity controlled variable according to DC motor speed setting value with the deviate of the direct current generator real-time rotate speed value collecting direct current generator unit is carried out to rotating speed control. The present invention adopts USB mechanics of communication the data of high speed acquisition can be communicated by letter in host computer in real time, continuously, under the sampling rate of 6M/s, can realize continuous, the nothing of sampled data and host computer and lose real-time Communication for Power. Method of the present invention, utilize the simulation study of DC motor speed drive system modeling and control algorithm, after simulation result meets the demands, control algolithm is directly sent on the inherent DC motor speed-regulating simulation and experiment of controller integrated apparatus and is tested, be very easy to the research work of control algolithm.

Description

A kind of DC motor speed-regulating simulation and experiment integrated apparatus and method

Technical field

The invention belongs to automation field, be specifically related to a kind of DC motor speed-regulating simulation and experiment integrated apparatus and method.

Background technology

In the study and research of Theory of Automatic Control, emulation and experiment occupy an important position. Automation-control experiment at presentSystem is mainly divided two types: a kind of is experimental system based on DCS or PLC, and this systemic-function is powerful, software and hardware resourcesComplete, control algolithm flexible in programming is abundant, but it is expensive, volume is large; Another kind is SCM Based experimental system,This experimental system price is relatively cheap, easy to use, however control algolithm in single-chip microcomputer needs software programming, then to compileThe mode of translating download realizes, and has caused this experimental system having flexibility aspect the modeling and control algorithm research of control objectPoor, available resources deficient wretched insufficiency.

Summary of the invention

The deficiency existing for prior art, the invention provides a kind of DC motor speed-regulating simulation and experiment integrated apparatus and method.

Technical scheme of the present invention:

A kind of DC motor speed-regulating simulation and experiment integrated apparatus, comprising:

Host computer unit, control module and direct current generator unit;

Described control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; Communication module and controlDevice processed connects, and controller is connected with D/A converter module, and the output of D/A converter module connects the input of direct current generator unit,Controller is connected with analog-to-digital conversion module, and the input of analog-to-digital conversion module connects direct current generator list as the input of control moduleThe output of unit;

Described communication module adopts USB communication module;

Described direct current generator unit comprises: driver module, direct current generator, tachometer generator and load; The input of driver moduleConnect the output of D/A converter module as the input of direct current generator unit, the output connection direct current generator of driver moduleInput, the output of direct current generator connects the input of tachometer generator, and the output of tachometer generator is as direct current generator listThe output of unit connects the input of analog-to-digital conversion module, and load is connected on motor;

Described host computer unit and control module carry out two-way communication by USB communication module.

Described host computer unit, for DC motor speed-regulating emulation, setting DC motor speed, setting sampling period and real-timeMonitoring direct current generator operation conditions.

The USB communication module of described control module for receive host computer set DC motor speed value and sampling period value,The start stop signal of direct current generator and the DC motor speed data that collect are sent to host computer.

When the controller of described control module is used for the interface sequence of given D/A converter module and the interface of analog-to-digital conversion moduleOrder, by the DC motor speed data that collect be sent to host computer unit, calculate the DC motor speed setting value that receives withThe deviate of the direct current generator real-time rotate speed value collecting, and calculate controlled quentity controlled variable according to this deviate through control algolithm, andThis controlled quentity controlled variable is sent to D/A converter module.

The analog-to-digital conversion module of described control module is for being converted to numeral letter by the d. c. voltage signal of tachometer generator outputNumber, i.e. the DC motor speed data of Real-time Collection direct current generator unit be sent to controller.

The D/A converter module of described control module is used for receiving the controlled quentity controlled variable that controller sends, and this controlled quentity controlled variable is converted toD. c. voltage signal is also sent to direct current generator unit.

Driver module in described direct current generator unit is for receiving the DC low-voltage signal of D/A converter module and producing0～220V adjustable DC output voltage signal is also sent to direct current generator by this adjustable DC output voltage signal.

After the adjustable dc voltage signal that direct current generator reception driver module in described direct current generator unit sends, rotate, itsRotating speed is controlled volume; Tachometer generator in direct current generator unit is used for the just tach signal of direct current generator and converts DC voltage toSignal also sends analog-to-digital conversion module to; Load in direct current generator unit is for loading to test direct current generator band to direct current generatorThe characteristic of load speed governing.

It is integrated that DC motor speed-regulating simulation and experiment integrated apparatus described in adopting carries out DC motor speed-regulating simulation and experimentMethod, comprises the steps:

Step 1: carry out DC motor speed-regulating emulation in host computer unit;

Step 1-1: regulate and produce controlled quentity controlled variable and set up DC motor speed and time curve under different controlled quentity controlled variables;

Step 1-2: whether the rotating speed while judging direct current generator stable state by this DC motor speed and time curve is at direct currentIn motor speed setting value deviation allowed band, be, perform step 2, no, perform step 1-1;

Step 2: carry out DC motor speed-regulating experiment;

Step 2-1: the start and stop letter of DC motor speed setting value, sampling period setting value and direct current generator is set in host computer unitNumber value;

Step 2-2:USB communication module receives the start and stop letter of DC motor speed setting value, sampling period setting value and direct current generatorNumber be worth and send controller to;

Step 2-3: controller judges whether to start direct current generator according to DC motor start-stop signal, is, according to the sampling periodSetting value carries out obtaining frequency doubling clock signal after frequency multiplication to clock signal, and execution step 2-4 is no, waits for and receiving next timeThe start stop signal of direct current generator;

Step 2-4: controller carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5: controller receives the real-time rotate speed value of direct current generator, the real-time rotate speed of direct current generator according to sub-frequency clock signalValue sends host computer unit to through USB communication module, generates the DC motor speed time plot in this moment;

Step 2-6: controller calculates the deviate of the real-time rotate speed value of DC motor speed setting value and direct current generator, according to thisThe controlled quentity controlled variable that regulates DC motor speed is calculated and produced to deviate;

Step 2-7: regulate DC motor speed controlled quentity controlled variable through D/A converter module be converted to control driver module analog voltage alsoSend driver module to;

Step 2-8: driver module, according to receiving from D/A converter module the analog voltage obtaining, converts alternating voltage to direct currentThe DC voltage that motor is required;

Step 2-9: direct current generator obtains its required DC voltage from driver module, direct current generator starts with tachometer generator sameStep is rotated;

Step 2-10: tachometer generator converts its tach signal analog voltage signal to and sends analog-to-digital conversion module to;

Step 2-11: analog-to-digital conversion module converts the analog voltage signal receiving from tachometer generator digital quantity to and sends toController;

Step 2-12: controller receives the digital quantity that sends of analog-to-digital conversion module according to sub-frequency clock signal, i.e. direct current generatorReal-time rotate speed value;

The digital quantity that step 2-13:USB communication module receives controller sends host computer unit to and generates the direct current in this momentMachine rotating speed and time curve;

Step 2-14: according to DC motor speed setting value deviation range and DC motor speed time plot, judge direct currentWhether rotating speed when machine stable state in DC motor speed setting value deviation allowed band, is that experiment finishes, no, carries outStep 1.

Beneficial effect: DC motor speed-regulating simulation and experiment integrated apparatus of the present invention and method have compared with prior art withLower advantage:

1. the designed DC motor speed-regulating simulation and experiment integrated apparatus of the present invention, employing USB mechanics of communication can be by high speedThe data that gather are communicated by letter in host computer in real time, continuously, under the sampling rate of 6M/s, can realize sampled data and upperContinuous, the nothing of machine are lost real-time Communication for Power.

2. the designed DC motor speed-regulating simulation and experiment integral method of the present invention, utilize DC motor speed drive system modeling withThe simulation study of control algolithm, after simulation result meets the demands, is directly sent to the inherent direct current generator of controller by control algolithm and adjustsOn speed simulation and experiment integrated apparatus, test, be very easy to the research work of control algolithm.

Brief description of the drawings

Fig. 1 is the structural representation of the DC motor speed-regulating simulation and experiment integrated apparatus of one embodiment of the present invention;

Fig. 2 is the control module circuit diagram of one embodiment of the present invention;

Fig. 3 is the drive circuit module circuit diagram of one embodiment of the present invention;

Fig. 4 is the DC motor speed-regulating simulation and experiment integral method flow chart of one embodiment of the present invention;

Fig. 5 is the DC motor speed-regulating simulation and experiment integral control system structural representation of one embodiment of the present invention;

Fig. 6 (a) is one embodiment of the present invention in ZYT04 type permanent magnet DC motor speed setting value deviation allowed bandZYT04 type permanent magnet DC motor rotating speed time plot, (b) be one embodiment of the present invention in ZYT04 type not foreverZYT04 type permanent magnet DC motor rotating speed time plot in magnetic DC motor speed setting value deviation allowed band.

Detailed description of the invention

Below in conjunction with accompanying drawing, one embodiment of the present invention are elaborated.

The DC motor speed-regulating simulation and experiment integrated apparatus of present embodiment, comprising: host computer unit, control module and straightStream electric motor units, as shown in Figure 1;

Host computer unit is connected with control module is two-way, and control module is connected with direct current generator unit is two-way;

Host computer unit is straight for DC motor speed-regulating emulation, setting DC motor speed, setting sampling period and monitoring in real timeStream motor running condition;

Control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; The communication of present embodimentModule adopt be USB communication module, application be USB2.0 communications protocol; What the controller of present embodiment adopted isFPGA module; 12 single channel Voltage-output type TLV5639 that the D/A converter module of present embodiment adopts TI company to produceType analog-digital chip; The analog-to-digital conversion module of present embodiment adopts two sampling channels, the 20MHz sample frequency, 10 of ADIThe CMOSAD9201 pattern number converter of bit resolution. USB communication module is connected with FPGA module is two-way, FPGA mouldPiece and two-way connection of TLV5639 type analog-digital chip, an output of TLV5639 type analog-digital chip connects direct currentThe input of machine unit, FPGA module and two-way connection of AD9201 pattern number converter, one of AD9201 pattern number converterIndividual input connects the output of direct current generator unit as an input of control module;

USB communication module is believed for the DC motor speed value that receives host computer and set and the start and stop of sampling period value, direct current generatorNumber and the DC motor speed data that collect are sent to host computer; USB communication module comprises: eeprom chip,USBB type mouth interface, USB2.0 chip, as shown in Figure 2; Eeprom chip is connected with USB2.0 chip is two-way, USBType B mouth interface is connected with USB2.0 chip is two-way; Eeprom chip adopts the eeprom chip that model is 24LC64,For receiving, send and store the data message that USB2.0 chip sends, the SCL pin of 24LC64 chip is as clockSignal input part connects the SCL output pin of USB2.0 chip, and the SDA pin of 24LC64 chip is transmitted in both directions pin,The SDA pin that connects USB2.0 chip as serial data interface end, WP is the write-protect pin of 24LC64 chip, connectsLow level, allows this device to carry out read-write operation, and A0～A2 is that address pin and the page of 24LC64 chip selected pin,Its level value is A[2..0]=001; USBB type mouth interface connects host computer unit, for realizing the two of data with host computer unitTo transmission, and be connected USB2.0 chip and realize the bi-directional of data by its DM pin and DP pin; USB2.0 chipThe CY7C68013A chip of EZ-USBFX2LP series of selecting Cypress company to release, for FPGA main control chipBetween carry out the bi-directional of data, its U_FD[15..0] pin is 16 bit data transmission ends, by CY7C68013A chipThe transmission direction of SLOE pin determination data, the clock signal of the IFCLK pin output of CY7C68013A chip can be used as communicationSynchronised clock; FLAGA pin, FLAGB pin, FLAGC pin, FLAGD pin is CY7C68013A coreThe fifo status information output pin of sheet; The chip selection signal input pin that the SLCS pin of CY7C68013A chip is FIFO;The SLOE pin of CY7C68013A chip is FIFO output enable pin; The SLRD pin of CY7C68013A chip isFIFO read signal pin, when synchronous reading out data, in the time that SLRD pin input signal is effective, FIFO pointer is at each IFCLKThe rising edge of the clock signal of pin transmission increases progressively, when asynchronous reading out data, and in the time that SLRD pin input signal is effective, FIFOPointer increases progressively at the trailing edge of the clock signal of each IFCLK pin transmission, and the SLWR pin of CY7C68013A chip isFIFO write signal, when synchronized write data, the rising edge of the each IFCLK pin of data in the time that SLWR pin is effective writesFIFO, FIFO pointer increases progressively, and when asynchronous write data, FIFO pointer is in the decline of the clock signal of each IFCLK pin transmissionAlong increasing progressively; The PKTEND pin of CY7C68013A chip is end-of-packet signal; The FIFOADR[1:0 of CY7C68013A chip]Pin is to select the address wire pin of four end points FIFO, determines the FD pin data bus of CY7C68013A chip and whichIndividual end points is connected with FIFO.

FPGA module also will for the interface sequence that provides TLV5639 type analog-digital chip and AD9201 pattern number converterThe DC motor speed data that collect are sent to host computer unit and calculate the DC motor speed setting value receiving and collectThe deviate of direct current generator real-time rotate speed value, calculate controlled quentity controlled variable based on this deviate through control algolithm, and by this controlAmount is sent to TLV5639 type analog-digital chip; AD9201 pattern number converter is straight for what in real time tachometer generator is exportedStream voltage signal is converted to data signal, i.e. the DC motor speed data of direct current generator unit, and be sent to FPGA module;TLV5639 type analog-digital chip is used for receiving the controlled quentity controlled variable that FPGA module sends, and converts this controlled quentity controlled variable to direct currentPress signal and be sent to direct current generator unit;

FPGA module comprises: jtag interface circuit, series arrangement chip, clock generation module and FGPA main control chip, asShown in Fig. 2, jtag interface circuit, series arrangement chip and clock generation module are all connected with FGPA main control chip; JTAGThe configuration data that the TDI pin of interface circuit sends for receiving host computer unit, the TDO pin of jtag interface circuit shouldConfiguration data is exported to FPGA main control chip, and the TCK pin of jtag interface circuit is as the transmission pin of configurable clock generator, itsOutput is connected to the TCK pin of FPGA main control chip, and the TMS pin of jtag interface circuit is selected as configuration modePin, its output connects the TMS pin of FPGA main control chip; The model that series arrangement chip selects altera corp to provideFor the series arrangement chip of EPCS64SI16N, its effect is store configuration data, be convenient to power on restart rear system call,The nCS pin of EPCS64SI16N series arrangement chip connects the output pin nCS of FPGA main control chip as chip selection signal,The DCLK pin of EPCS64SI16N series arrangement chip connects FPGA main control chip as the clock signal of configuration data transmissionOutput pin DCLK, the ASDI pin of EPCS64SI16N series arrangement chip connects as the input of serial dataThe output pin ASDI of FPGA main control chip, the DATA pin of EPCS64SI16N series arrangement chip is as serial dataOutput connect the input pin DATA of FPGA main control chip; Clock generation module is during for generation of the work of whole systemClock, what the clock generation module of present embodiment adopted is the active crystal oscillator of 50MHZ, its CLK_IN output pin connects FPGAThe CLK_IN pin of main control chip; The model that FPGA main control chip selects altera corp to provide is EP3C16Q240C8NChip, have 240 pins, wherein MSEL[0..2] pin is the configuration mode for selecting FPGA, can not suspend.

The DA0_D[11..0 of TLV5639 type analog-digital chip] pin is that 12 bit data bus pins obtain digital quantity as tachometer valueInput, be connected to the DA0_D[11..0 of FPGA main control chip] pin; The DA0_CS of TLV5639 type analog-digital chip drawsPin is chip selection signal, is connected to the DA0_CS pin of FPGA main control chip, and when low level, numeral input effectively. TLV5639The DA0_WE pin of type analog-digital chip is WE pin, is connected to the DA0_WE pin of FPGA main control chip,When low level, latch data; The DA0_L pin of TLV5639 type analog-digital chip is output pin, is connected to FPGAThe DA0_L pin of main control chip, when low level, allows output analog voltage; TLV5639 type analog-digital chipDA0_REG pin is that register is selected pin, is connected to the DA0_REG pin of FPGA main control chip, when low level,The digital quantity receiving is stored to the data latches of TLV5639, when high level, the digital quantity receiving is stored toThe control register of TLV5639; The DA0_OUT pin of TLV5639 type analog-digital chip is analog voltage output interface,Be connected to driver module input, as shown in Figure 2.

The IN_I pin of AD9201 pattern number converter is connected 55CY08 type with IN_Q pin as analog signal input channelThe output of AC permanent magnet tachometer generator, as shown in Figure 2; The AD_SLEEP pin of AD9201 analog-digital converter is connected toThe AD_sleep pin of FPGA main control chip, when pin is high level, enters resting state; AD9201 analog-digital converterAD_CSEL pin connects the AD_csel pin of FPGA main control chip as the chip selection signal of AD9201; AD9201 modulusThe AD_SEL pin of converter connects the output of the AD_sel pin of FPGA main control chip, height as passage gating signalQ passage input when I passage input when level, low level; The AD_CLK pin of AD9201 analog-digital converter is as when samplingThe input pin of clock connects FPGA main control chip AD_clk pin; The AD_D[9..0 of AD9201 analog-digital converter] pin is10 bit data bus, the AD_D[9..0 of connection FPGA main control chip] pin, as shown in Figure 2, the numeral of output analog voltageAmount.

Direct current generator unit comprises: driver module, direct current generator, tachometer generator and load; The direct current generator of present embodimentWhat adopt is ZYT04 type permanent magnet DC motor, and rated voltage is 110VDC, and rated current is 2.8A, and rated power is 200W,Rated speed is 1500r/min; What tachometer generator adopted is the AC permanent magnet tachometer generator of 55CY08 type, and rated voltage is60V, rated current is 30mA, rated speed is 1500r/min; That load adopts is the FZ25J of Hai'an Lan Ling Mechanical and Electrical Equipment CompanyType magnetic particle damper, moment of torsion is 2.5NM, and rated voltage is 24V, and rated current is 0.4A; The input of driver module is doneFor the input of direct current generator unit connects an output of D/A converter module, the output of driver module connects ZYT04 typeThe input of permanent magnet DC motor, the output of ZYT04 type permanent magnet DC motor connects the generating of testing the speed of 55CY08 type AC permanent magnetThe input of machine, the output of 55CY08 AC permanent magnet tachometer generator is as the output connection mode number conversion of direct current generator unitAn input of module, FZ25J type magnetic particle damper is connected on ZYT04 type permanent magnet DC motor;

Driver module is used for the DC low-voltage signal of the 0～5V that receives TLV5639 type analog-digital chip and produces 0～220V canTuning DC output voltage signal is also sent to ZYT04 type permanent magnet DC motor by this adjustable DC output voltage signal; ZYT04After the adjustable dc voltage signal that type permanent magnet DC motor reception driver module sends, rotate, its rotating speed is controlled volume; 55CY08The AC permanent magnet tachometer generator of type is for converting the tach signal of ZYT04 type permanent magnet DC motor to d. c. voltage signal alsoSend AD9201 pattern number converter to; FZ25J type magnetic particle damper is for loading to survey to ZYT04 type permanent magnet DC motorThe characteristic of examination ZYT04 type permanent magnet DC motor bringing onto load speed governing;

Drive circuit module comprises: single phase full bridge controlled rectifier 1, the first thyristor gating circuit 2 and the second IGCT touchPower Generation Road 3. The IN end of the first thyristor gating circuit 2 and the IN of the second thyristor gating circuit 3 hold as direct current generator listThe input of unit connects the pin DA0_OUT end of TLV5639 type analog-digital chip; Thyristor gating circuit 2 passes through resistanceR12 connects respectively the trigger end of IGCT D6 in single phase full bridge controlled rectifier 1 and the trigger end of IGCT D8; IGCTCircuits for triggering 3 connect respectively trigger end and the IGCT of IGCT D7 in single phase full bridge controlled rectifier 1 by resistance R 3The trigger end of D9; The c end of the output of single phase full bridge controlled rectifier 1 is all connected ZYT04 type permanent direct-current electric with d endThe input of machine is the power supply of ZYT04 type permanent magnet DC motor, as shown in Figure 3.

The IN end of thyristor gating circuit 2 connects an output of TLV5639 type analog-digital chip, for generation of gate poleBlocking-up and the conducting of trigger impulse control single phase full bridge controlled rectifier 1, as shown in Figure 3. The mistake that gate pole trigger impulse producesJourney: in the time of pulse amplifying element V1 and V2 conducting, the brilliant lock by pulse transformer TM to single phase full bridge controlled rectifierBetween the gate pole of pipe and negative electrode, export strong trigger impulse, when capacitor C 2 both end voltage are during lower than 15V, enter pulse-triggered steadyStage; In the time of pulse amplifying element V1 and V2 cut-off, the energy that pulse transformer stores discharges, strong trigger impulse landing. ?The trigger end that the strong start pulse signal producing in this process is exported to IGCT 1 in single phase full bridge controlled rectifier is as triggeringSignal.

Single phase full bridge controlled rectifier 1 comprises: the RC resistance-capacitance absorption loop, fully controlled bridge He Si road of four road unidirectional thyristor compositions,As shown in Figure 3. The gate pole trigger impulse control that the break-make of single phase full bridge controlled rectifier is produced by thyristor gating circuit, usesIn 220V alternating current being directly changed into the stepless adjustable pulsating dc voltage of amplitude, realize direct current generator both end voltage 0～Within the scope of 220V, regulate.

It is integrated that DC motor speed-regulating simulation and experiment integrated apparatus described in adopting carries out DC motor speed-regulating simulation and experimentMethod, as shown in Figure 4, comprises the steps:

Step 1: carry out ZYT04 type permanent magnet DC motor speed timing simulation in host computer unit;

The input dc power of driver module is pressed in when 0-5V is interior to be changed, and the voltage on direct current generator is adjustable to maximum linearity from 0V,Consider that driver module inside exists rc filter circuit, ignoring after the little coefficient link of high-order the mathematical modulo of driver module partType can be equivalent to first order inertial loop, its transfer function W_z(s) be

$W_z\left(s\right)=\frac{\mathrm{\λ}}{T_{z}s+1}---\left(1\right)$

In formula,

S is the complex frequency domain variable in Laplace transform; λ is drive circuit amplification coefficient; T_zFor the time constant of drive circuit.

The rotating speed control of ZYT04 type permanent magnet DC motor adopts armature voltage control. Armature control ZYT04 type permanent magnet DC motorWork essence be in armature circuit, to produce armature supply by the armature voltage of inputting, then interacted by electric current and magnetic fluxProduce electromagnetic torque, thereby drag load movement. Therefore, the equation of motion of ZYT04 type permanent magnet DC motor can be by following threeBe grouped into:

Armature circuit balance of voltage equation

$u_a\left(t\right)=L_a\frac{{\mathrm{di}}_a\left(t\right)}{\mathrm{dt}}+R_a{i}_a\left(t\right)+E_a---\left(2\right)$

In formula,

u_a(t) be armature voltage, V; L_aFor armature circuit inductance, H; T is the time, s; i_a(t) be armature supply, A; R_aForArmature loop resistance, Ω; E_aFor armature back-emf, the back-emf that it produces while being armature rotation, its size and excitation magneticLogical and rotating speed is directly proportional, direction and armature voltage u_a(t) contrary, V.

Electromagnetic torque equation

M_m(t)＝C_mi_a(t)(3)

In formula,

C_mFor motor torque coefficient; M_m(t) electromagnetic torque producing for armature supply, Nm.

Torque balance equation on motor shaft

$J_m\frac{d{\mathrm{\ω}}_m\left(t\right)}{\mathrm{dt}}+f_m{\mathrm{\ω}}_m\left(t\right)=M_m\left(t\right)-M_c\left(t\right)---\left(4\right)$

In formula,

f_mFor motor and load are folded to the viscous friction coefficient on motor shaft; J_mFor motor and load are folded to turning on motor shaftMoving inertia, Kg*m²；M_cFor being folded to the total load torque on motor shaft, Nm; ω_m(t) be motor speed, r/min

Cancellation intermediate variable i_a(t)，E_aAnd M_m(t), just can obtain with ω_m(t) be output quantity, u_a(t) be the direct current of input quantityThe machine differential equation

$\begin{array}{c}{L}_a{J}_m\frac{d^2{\mathrm{\ω}}_m\left(t\right)}{{\mathrm{dt}}^2}+(L_a{f}_m+R_a{J}_m)\frac{d{\mathrm{\ω}}_m\left(t\right)}{\mathrm{dt}}+(R_a{f}_m+C_m{C}_e){\mathrm{\ω}}_m\left(t\right)\\ =C_m{u}_a-L_a\frac{d{M}_c\left(t\right)}{\mathrm{dt}}-R_a{M}_c\left(t\right)\end{array}---\left(5\right)$

In formula,

C_eFor electromotive force constant.

Due to armature circuit inductance L_aLess, conventionally ignore, thereby formula (5) can be reduced to

$T_m\frac{d{\mathrm{\ω}}_m\left(t\right)}{\mathrm{dt}}+{\mathrm{\ω}}_m\left(t\right)=K_m{u}_a\left(t\right)-K_c{M}_c\left(t\right)---\left(6\right)$

In formula,

T_m＝R_aJ_m/(R_af_m+C_mC_e) be motor electromechanical time constant; K_m＝C_m/(R_af_m+C_mC_e) be motor carry-over factor;K_c＝C_m/(R_af_m+C_mC_e) be motor carry-over factor.

If armature resistance R_aRotary inertia J with motor_mWhen all very I is ignored, formula (6) can also further be simplifiedFor

C_eω_m(t)＝u_a(t)(7)

At this moment, the rotational speed omega of motor_m(t) with armature voltage u_a(t) be directly proportional.

In the present embodiment, can be in host computer unit, the Simulink environment based on Matlab emulation platform, sets upThe analogous diagram of motor speed regulation system, carries out the simulation study of control algolithm;

Step 1-1: regulate and produce controlled quentity controlled variable and set up ZYT04 type permanent magnet DC motor rotating speed and time pass under different controlled quentity controlled variablesIt is curve;

Step 1-2: judge ZYT04 type permanent direct-current electric by this ZYT04 type permanent magnet DC motor rotating speed and time curveWhether rotating speed when machine stable state in DC motor speed setting value deviation allowed band, be, performs step 2, no, holdsRow step 1-1;

Steady-state speed when the ZYT04 type permanent magnet DC motor of present embodiment enters stable state and ZYT04 type DC rotating speedThe deviation allowed band of setting value is ± 3%～± 5%.

Step 2: carry out ZYT04 type permanent magnet DC motor speed regulation experiment;

In present embodiment, can by the control algolithm of the simulation process of step 1 with the compiling of hardware compilation language generate can be directly underBe downloaded to the project file moving on FPGA control chip, download to and in FPGA control chip, carry out ZYT04 type permanent magnet DC motorSpeed regulation experiment;

Step 2-1: ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value and ZYT04 are set in host computer unitThe start stop signal value of type permanent magnet DC motor;

The ZYT04 type permanent magnet DC motor speed setting value of present embodiment is 1000r/min.

Step 2-2:USB communication module receive ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value andThe start stop signal value of ZYT04 type permanent magnet DC motor also sends FPGA module to;

Step 2-3:FPGA module judges whether to start ZYT04 type permanent magnetism according to ZYT04 type permanent magnet DC motor start stop signalDirect current generator, be, according to sampling period setting value, clock signal is carried out obtaining frequency doubling clock signal after frequency multiplication, carry out stepRapid 2-4, no, wait for and receive the start stop signal of ZYT04 type permanent magnet DC motor next time;

Step 2-4:FPGA module carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5:FPGA module receives the real-time rotate speed value of ZYT04 type permanent magnet DC motor according to sub-frequency clock signal,The real-time rotate speed value of ZYT04 type permanent magnet DC motor sends host computer unit to through USB communication module, generates this momentZYT04 type permanent magnet DC motor rotating speed time plot;

Step 2-6:FPGA module calculates ZYT04 type permanent magnet DC motor speed setting value and ZYT04 type permanent direct-current electricThe deviate of the real-time rotate speed value of machine, calculates and produces the control that regulates ZYT04 type permanent magnet DC motor rotating speed according to this deviateAmount;

Step 2-7: regulate the controlled quentity controlled variable of ZYT04 type permanent magnet DC motor rotating speed to be converted to through TLV5639 type analog-digital chipControl the analog voltage of driver module and send driver module to;

Step 2-8: driver module is according to receiving from TLV5639 type analog-digital chip the analog voltage obtaining, by alternating voltageConvert the required DC voltage of ZYT04 type permanent magnet DC motor to;

Step 2-9:ZYT04 type permanent magnet DC motor obtains its required DC voltage from driver module, and ZYT04 type permanent magnetism is straightStream motor starts to synchronize and rotate with 55CY08 type AC permanent magnet tachometer generator;

Step 2-10:55CY08 type AC permanent magnet tachometer generator converts its tach signal analog voltage signal to and sends toAD9201 pattern number converter;

Step 2-11:AD9201 pattern number converter is by the analog voltage receiving from 55CY08 type AC permanent magnet tachometer generatorSignal converts digital quantity to and sends FPGA module to;

Step 2-12:FPGA module receives according to sub-frequency clock signal the digital quantity that AD9201 pattern number converter sends,The real-time rotate speed value of ZYT04 type permanent magnet DC motor;

The digital quantity that step 2-13:USB communication module receives FPGA module sends host computer unit to and generates the rotating speed in this momentWith time curve;

Step 2-14: according to ZYT04 type permanent magnet DC motor speed setting value deviation range and ZYT04 type permanent magnet DC motorRotating speed time plot, whether the rotating speed while judging ZYT04 type permanent magnet DC motor stable state is at ZYT04 type permanent magnet DC motorIn speed setting value deviation allowed band, be, as shown in Figure 6 (a), experiment finishes, no, as shown in Figure 6 (b), andExecution step 1.

In present embodiment, DC motor speed-regulating simulation and experiment integrated apparatus is method, can in FPGA main control chip, buildDC motor speed-regulating simulation and experiment integral control system in realize, this system comprises: synchronous serial Peripheral Interface control mouldPiece, Clock management module, control algolithm module, digital-to-analogue time-sequence control module and data acquisition and transport module, as Fig. 5; WithAn output of step Serial Peripheral Interface (SPI) control module connects the input of control algolithm module, the control of synchronous serial Peripheral InterfaceThe input of another output connected system Clock management module of module; An output of Clock management module connects to be controlledAn input of algoritic module, an output connection data of another two outputs of Clock management module gathers and transmission modeThe input of piece, another output connects an input of digital-to-analogue time-sequence control module; Data acquisition and transport module defeatedGo out the input that end connects control algolithm module; The output of control algolithm module connects of digital-to-analogue time-sequence control moduleInput.

Synchronous serial Peripheral Interface control module is the data transmission interface between USB2.0 chip and FPGA main control chip, usesIn receiving ZYT04 type permanent magnet DC motor speed setting value, sampling period setting value and the start and stop of ZYT04 type permanent magnet DC motorSignal, and the sampling period setting value receiving is sent to Clock management module, and by the ZYT04 type DC receivingMotor speed setting value sends control algolithm module to;

Sampling period setting value and reception control that Clock management module sends for receiving synchronous serial Peripheral Interface control moduleUnit passes the clock signal that active crystal oscillator provides; According to described sampling period setting value, described clock signal is carried out to frequency multiplicationThe clock signal of rear generation control algolithm module also sends control algolithm module to; According to described sampling period setting value, to instituteThe clock signal of stating carries out producing respectively the needed clock letter of digital-to-analogue time-sequence control module and data acquisition and transport module after frequency divisionNumber value also sends to respectively digital-to-analogue time-sequence control module and data acquisition and transport module;

Data acquisition and transport module comprise: modulus time-sequence control module and USB interface Logic control module. Modulus SECOModule is for receiving the digital quantity that AD9201 pattern number converter sends, the i.e. real-time rotate speed of ZYT04 type permanent magnet DC motorValue, and send respectively this digital quantity to USB interface Logic control module according to the clock signal sending from Clock management moduleWith control algolithm module; USB interface Logic control module is for receiving digital quantity that modulus time-sequence control module sends shouldDigital quantity sends to USB2.0 chip;

Control algolithm module turns for receiving the ZYT04 type permanent magnet DC motor that synchronous serial Peripheral Interface control module sendsThe ZYT04 type permanent magnetism that the clock signal that speed setting value, Clock management module send and data acquisition and transport module send is straightThe real-time rotate speed value of stream motor, calculates ZYT04 type permanent magnet DC motor speed setting value and ZYT04 type permanent magnet DC motorThe deviate of real-time rotate speed value, and according to this deviate calculate regulate ZYT04 type permanent magnet DC motor rotating speed controlled quentity controlled variable alsoSend to digital-to-analogue time-sequence control module.

The adjusting that the clock signal that digital-to-analogue time-sequence control module receive clock administration module sends and control algolithm module are sentThe controlled quentity controlled variable of ZYT04 type permanent magnet DC motor rotating speed, and produce TLV5639 type analog-digital chip according to described clock signalConfiguration signal, and the controlled quentity controlled variable of the adjusting DC motor speed receiving is sent to TLV5639 type analog-digital chip.

Claims (8)

1. a DC motor speed-regulating simulation and experiment integral method, adopts DC motor speed-regulating simulation and experiment integrated apparatus to realize, and this device comprises:

Host computer unit, control module and direct current generator unit; Described control module comprises: communication module, controller, D/A converter module and analog-to-digital conversion module; Communication module is connected with controller, controller is connected with D/A converter module, the output of D/A converter module connects the input of direct current generator unit, controller is connected with analog-to-digital conversion module, and the input of analog-to-digital conversion module connects the output of direct current generator unit as the input of control module; Described communication module adopts USB communication module; Described direct current generator unit comprises: driver module, direct current generator, tachometer generator and load; The input of driver module connects the output of D/A converter module as the input of direct current generator unit, the output of driver module connects the input of direct current generator, the output of direct current generator connects the input of tachometer generator, the output of tachometer generator connects the input of analog-to-digital conversion module as the output of direct current generator unit, load is connected on motor; Described host computer unit and control module carry out two-way communication by USB communication module;

It is characterized in that: comprise the steps:

Step 1: carry out DC motor speed-regulating emulation in host computer unit;

Step 1-1: regulate and produce controlled quentity controlled variable and set up DC motor speed and time curve under different controlled quentity controlled variables;

Step 1-2: whether the rotating speed while judging direct current generator stable state by this DC motor speed and time curve in DC motor speed setting value deviation allowed band, be, performs step 2, no, performs step 1-1;

Step 2: carry out DC motor speed-regulating experiment;

Step 2-1: the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator is set in host computer unit;

Step 2-2:USB communication module receives the start stop signal value of DC motor speed setting value, sampling period setting value and direct current generator and sends controller to;

Step 2-3: controller judges whether to start direct current generator according to DC motor start-stop signal, be, according to sampling period setting value, clock signal carried out obtaining frequency doubling clock signal after frequency multiplication, execution step 2-4, no, wait for and receive the start stop signal of direct current generator next time;

Step 2-4: controller carries out obtaining sub-frequency clock signal after frequency division to clock signal according to sampling period setting value;

Step 2-5: controller receives the real-time rotate speed value of direct current generator according to sub-frequency clock signal, the real-time rotate speed value of direct current generator sends host computer unit to through USB communication module, generates the DC motor speed time plot in this moment;

Step 2-6: controller calculates the deviate of the real-time rotate speed value of DC motor speed setting value and direct current generator, calculates and produces the controlled quentity controlled variable that regulates DC motor speed according to this deviate;

Step 2-7: regulate the controlled quentity controlled variable of DC motor speed to be converted to and to control the analog voltage of driver module and send driver module to through D/A converter module;

Step 2-8: driver module, according to receiving from D/A converter module the analog voltage obtaining, converts alternating voltage to direct current generator required DC voltage;

Step 2-9: direct current generator obtains its required DC voltage from driver module, and direct current generator starts to synchronize and rotate with tachometer generator;

Step 2-10: tachometer generator converts its tach signal analog voltage signal to and sends analog-to-digital conversion module to;

Step 2-11: analog-to-digital conversion module converts the analog voltage signal receiving from tachometer generator digital quantity to and sends controller to;

Step 2-12: controller receives the digital quantity that analog-to-digital conversion module sends, i.e. the real-time rotate speed value of direct current generator according to sub-frequency clock signal;

The digital quantity that step 2-13:USB communication module receives controller sends host computer unit to and generates DC motor speed and the time curve in this moment;

Step 2-14: according to DC motor speed setting value deviation range and DC motor speed time plot, whether the rotating speed while judge direct current generator stable state in DC motor speed setting value deviation allowed band, be, experiment end is no, performs step 1.

2. DC motor speed-regulating simulation and experiment integral method according to claim 1, it is characterized in that: described host computer unit, for DC motor speed-regulating emulation, set DC motor speed, set sampling period and monitor in real time direct current generator operation conditions.

3. DC motor speed-regulating simulation and experiment integral method according to claim 1, is characterized in that: the USB communication module of described control module is for the start stop signal of the DC motor speed value that receives host computer and set and sampling period value, direct current generator and the DC motor speed data that collect are sent to host computer.

4. DC motor speed-regulating simulation and experiment integral method according to claim 1, it is characterized in that: the controller of described control module is used for the interface sequence of given D/A converter module and the interface sequence of analog-to-digital conversion module, the DC motor speed data that collect are sent to host computer unit, calculate the deviate of the DC motor speed setting value receiving and the direct current generator real-time rotate speed value collecting, and calculate controlled quentity controlled variable according to this deviate through control algolithm, and this controlled quentity controlled variable is sent to D/A converter module.

5. DC motor speed-regulating simulation and experiment integral method according to claim 1, it is characterized in that: the analog-to-digital conversion module of described control module is for being converted to data signal by the d. c. voltage signal of tachometer generator output, i.e. the DC motor speed data of Real-time Collection direct current generator unit be sent to controller.

6. DC motor speed-regulating simulation and experiment integral method according to claim 1, it is characterized in that: the D/A converter module of described control module is used for receiving the controlled quentity controlled variable that controller sends, and this controlled quentity controlled variable is converted to d. c. voltage signal and is sent to direct current generator unit.

7. DC motor speed-regulating simulation and experiment integral method according to claim 1, is characterized in that: the driver module in described direct current generator unit is for receiving the DC low-voltage signal of D/A converter module and producing 0～220V adjustable DC output voltage signal and this adjustable DC output voltage signal is sent to direct current generator.

8. DC motor speed-regulating simulation and experiment integral method according to claim 1, is characterized in that: after the adjustable dc voltage signal that the direct current generator reception driver module in described direct current generator unit sends, rotate, its rotating speed is controlled volume; Tachometer generator in direct current generator unit is used for the just tach signal of direct current generator and converts d. c. voltage signal to and send analog-to-digital conversion module to; The characteristic of load in direct current generator unit for loading to test the speed governing of direct current generator bringing onto load to direct current generator.