CN103595928B - 512*512 broadcasting super-large scale 3GSDI matrix - Google Patents

512*512 broadcasting super-large scale 3GSDI matrix Download PDF

Info

Publication number
CN103595928B
CN103595928B CN201310589712.7A CN201310589712A CN103595928B CN 103595928 B CN103595928 B CN 103595928B CN 201310589712 A CN201310589712 A CN 201310589712A CN 103595928 B CN103595928 B CN 103595928B
Authority
CN
China
Prior art keywords
signal
3gsdi
matrix
module
processing module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201310589712.7A
Other languages
Chinese (zh)
Other versions
CN103595928A (en
Inventor
周春雷
马庆强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
Original Assignee
DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DALIAN KEDI VIDEO TECHNOLOGY Co Ltd filed Critical DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
Priority to CN201310589712.7A priority Critical patent/CN103595928B/en
Publication of CN103595928A publication Critical patent/CN103595928A/en
Application granted granted Critical
Publication of CN103595928B publication Critical patent/CN103595928B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Studio Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

The invention discloses a 512*512 broadcasting super-large scale 3GSDI matrix. The 3GSDI matrix comprises a signal input processing module, a switching module and a signal output processing module, wherein the signal input processing module is used for performing equilibrium processing and primary clock processing on 3GSDI signals passing by; the switching module is used for achieving switching between 512 paths of input signals and 512 paths of output signals of the 3GSDI signals and cross switching between any path of input signals and any path of output signals; the signal output processing module is used for performing secondary clock recovery processing and signal driving processing on the 3GSDI signals. The 512*512 broadcasting super-large scale 3GSDI matrix can effectively solve the problem of signal loss in the transmitting and switching processes of the3GSDI signals and improve safety and stability of broadcasting matrix equipment, and meanwhile two 12U PCBs are connected to form a 24U PCB structure, so that the problem that the PCBs deform because the size and scale of the matrix are increased is solved.

Description

A kind of 512 × 512 broadcast level ultra-large 3GSDI matrix
Technical field
The present invention relates to video signal processing field, particularly relate to a kind of 512 × 512 broadcast level ultra-large 3GSDI matrix.
Background technology
Video matrix refers to that the method being switched by array is arbitrarily exported m road vision signal to the monitor of n road Electronic installation.Common video matrix according to the difference of input, output channel, typically have 8 × 8,16 × 16,32 × 16, The plurality of specifications such as 32 × 32,64 × 32,64 × 64,96 × 96,128 × 128,256 × 256,512 × 512, the number before multiplication sign Word is the way of input signal, the way of multiplication sign digitized representation output signal below.
Video matrix is widely used in the equipment such as TV station, mobile TV, safety monitoring.Different sector applications is to square The performance of battle array, specification etc. have different requirements.The requirement of broadcast level video matrix is very high, is not only embodied in signal index, also It is embodied in security, the stability of equipment, also have very high requirement to the property easy to maintain of system.With signal acquisition terminal quantity Sharply increase, the current following scale matrix in 256 roads can not meet market use demand, be badly in need of a kind of ultra-large square Battle array fills up the blank in market.
Content of the invention
In view of the defect that prior art exists, the invention aims to offer a kind of 512 × 512 has two-stage clock Recover the broadcast level ultra-large 3GSDI matrix of function, to meet the broadcasting and TV and security protection industry needs to matrix way.
To achieve these goals, the technical scheme is that:
A kind of 512 × 512 broadcast level ultra-large 3GSDI matrix, including signal input processing module, handover module with And signal output processing module it is characterised in that:Described signal input processing module is used for transmitting through coaxial cable After 3GSDI signal carries out equilibrium treatment and primary clock recovery process, the 3GSDI signal after processing is delivered to and described signal The handover module that input processing module connects;Described handover module is used for realizing 3GSDI signal 512 tunnel input signal and 512 The switching of road output signal and wherein arbitrarily road input signal and any road output signal intersect switching;Described signal is defeated Go out processing module and carry out second level clock recovery process and signal driving for the 3GSDI signal that described handover module is exported Process.
Described signal input processing module is included for carrying out at equilibrium to the 3GSDI signal transmitting through coaxial cable The equilibrium treatment chip of reason and the primary clock for the 3GSDI signal after equilibrium treatment is carried out with primary clock recovery process Recover chip.
Described handover module comprises four groups of handover modules, described handover module adopt GX3290, GX3246 or M2117X is as hand-off process chip.
Described signal output processing module includes carrying out the second level for the 3GSDI signal that described handover module is exported Clock recovery process second level clock recovery chip and to second level clock recovery process after 3GSDI signal carry out signal Drive the signal driving chip processing.
Described matrix switcher also includes CPU element, and described CPU element is used for monitoring the running status of matrix switcher And the switchover operation of real-time control matrix switcher.
Described matrix switcher also includes communication control module, and described communication control module includes command process single-chip microcomputer Circuit and order receive single chip circuit, and described order receives the screening reception that single chip circuit completes external command, described The explanation that command process single chip circuit is used for completing external command concurrently send command signal to process to CPU element, signal input Module and signal output processing module.
Described CPU element is connected with communication control module, receives control command by communication control module.
The modules that described matrix switcher is related to and unit are respectively provided with redundancy backup structure.
Described matrix switcher also includes the pcb board thereon by above-mentioned module and unit laying, and described pcb board is Connect and compose the pcb board of 24U by the pcb board of two pieces of 12U.
Realize connecting by flexible flat cable between described pcb board.
Compared with prior art, beneficial effects of the present invention:
The present invention can effectively solve the problem that signal loss problem in transmission handoff procedure for the 3GSDI signal, protects to greatest extent Demonstrate,prove Lossless transport in matrix device for the 3GSDI signal and greatly improve security and the stability of broadcast level matrix device; The structure effectively solving simultaneously being connected and composed the pcb board of 24U using the pcb board of two pieces of 12U is led to because matrix size scale increases Pcb board deformation and then the problem of impact product quality.
Brief description
Fig. 1 is the broadcast level ultra-large 3GSDI matrix structure schematic diagram of the present invention 512 × 512;
Fig. 2 is that the motherboard of the present invention passes through FFC cable connection description schematic diagram;
Fig. 3 is the signal input module circuit diagram on the 1st tunnel;
Fig. 4-1 is the signal interface circuit figure of the 1st road handover module;
Fig. 4-2 is the control interface figure of the 1st road handover module;
Fig. 5 is the 1st tunnel signal output process circuit figure;
Fig. 6 is CPU element module detailed circuit diagram;
Fig. 7-1 is the command process detailed circuit diagram of communication module;
Fig. 7-2 receives detailed circuit diagram for communication module order;
Fig. 8-1 is redundant processors process normal work schematic diagram;
Operating diagram when Fig. 8-2 breaks down for redundant processors process;
Operating diagram when Fig. 8-3 breaks down for redundant processors process;
Operating diagram when Fig. 8-4 breaks down for redundant processors process;
Operating diagram when Fig. 8-5 breaks down for redundant processors process.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with accompanying drawing, the present invention is entered Row further describes.
The present invention proposes a kind of 512 × 512 broadcast level ultra-large 3GSDI matrix, significantly meets broadcasting and TV and peace The needs to matrix way for the anti-industry.But, 512 tunnel inputs and 512 tunnel outputs can lead to the increase of matrix size scale, thus Produce series of problems.One of design bottleneck that matrix size scale increases is cabinet in the case that cabinet width criteria is fixed The interior pcb board size as backboard can not infinitely expand, and according to pcb board manufacture craft, the optimum size of current pcb board is 12U Left and right(1U=44mm), but 512 × 512 ultra-large 3GSDI matrixes need to adopt the pcb board of 24U, so may result in PCB The problems such as plate deforms affects product quality.In order to solve this problem, the present invention connects and composes 24U using the pcb board of two 12U Pcb board.And the connection between pcb board is a key technology, classical matrix uses specialized high-speed cable transmission high speed signal, Specialized high-speed cable and its connector are substantially from external import, and it has price height, the defect of procurement cycle length.This patent Using FFC(Flexible flat cable)Replace specialized high-speed cable distribution 3GSDI high-speed digital signal, low cost, procurement cycle are short, And signal transmission characteristicses fully meet the requirement of signal transmission quality through actual product test, it connects as shown in Fig. 2 having The described matrix switcher of body adopts FFC by the 256 tunnel inputs of 2 12U, 256 tunnel output pcb boards(Flexible flat cable)Even Connect, maximum achievable 3GSDI signal 512 tunnel input is exported with 512 tunnels.
The technical requirement of broadcast level product is very high, and the requirement to environment for the transmission of 3GSDI signal is extremely harsh. By studying to 3GSDI signal transmission characteristicses, adopt doubleclocking recovery technology in the product it is achieved that ultra-large with high speed The combination of energy.Primary clock recovery be solve 3GSDI signal through matrix prime equipment to matrix through coaxial cable transmit after Signal index declines serious problem;Second level clock recovery is to solve vision signal to deposit after the hand-off process of internal matrix Signal loss problem.Doubleclocking recovery technology farthest achieves lossless biography in matrix device for the 3GSDI signal Defeated.
As shown in figure 1, specifically described matrix includes signal input processing module, handover module, signal output process Module, CPU element and communication control module:
First, signal input processing module
Signal input processing module totally 512 road input signal processing circuit, only chooses " the 1st road letter as shown in Figure 3 here Number input processing circuit figure " carries out demonstrating explanation:3GSDI signal is transferred into after signal input processing module through coaxial cable, It is converted into the differential signal of 100 ohms impedance match by the unipolar signal of 75 ohms impedance match.3GSDI signal is in input In reason module, the clock recovery through equilibrium treatment and primary is processed, thus system completes the process to input signal.At equilibrium Reason chip(Equalizer)The self adaptation cable equalizer LMH034X family chip being produced from TI semiconductor company, or choosing GS344X, GS29X4 family chip being produced with GENNUM company;Clock recovery chip(Reclocker)Produced using TI company LMH03X6 family chip or from GENNUM company produce GS29X5 family chip.
2nd, handover module
Handover module is made up of four groups of handover modules, and four groups of handover modules at most can achieve the input of 3GSDI signal 512 tunnel Export and can do any road signal with 512 tunnels intersects switching;Here only choose " the 1st handover module as shown in Figure 4 Circuit diagram " illustrates, and the 1st tunnel input signal and the 1st tunnel output signal are passed through to switch the transmission of chip signal interface;Its signal Intersect switching to be sent by CPU element, by switching chip controls interface.In handover module, it switches chip (Crosspoint)GX3290, GX3246 family chip being produced using GENNUM company, or the production of Mindspeed company M2117X family chip.
3rd, signal output processing module
Signal output processing module totally 512 road output signal processing circuit, only chooses " the 1st road letter as shown in Figure 5 here Number output processing circuit figure " carries out demonstrating explanation:In order to improve signal quality, reduce signal at the internal switching of video matrix The loss of signal existing after reason, the signal through handover module output does the clock recovery of the second level in signal output processing module Process and signal drives, 3GSDI signal is converted into meeting the list of transmission standard by differential signal in signal output processing module Polar signal, thus be transferred to rear class equipment by coaxial cable.Signal driving chip selects GENNUM company to produce GS2988, GS348X series driving chip or the driving chip LMH030X family chip of TI semiconductor company production;Clock is extensive Multiple chip(Reclocker)Using the LMH03X6 family chip of TI company production or from the production of GENNUM company GS29X5 family chip.
4th, CPU element and communication control module
Each handover module supports the use a CPU element, only choose here as shown in Figure 6 " the 1st handover module CPU element circuit diagram " carries out demonstrating explanation:Described CPU element is used for monitoring the running status of matrix switcher and real-time control The switchover operation of matrix switcher processed.
Described matrix switcher also includes communication control module, and described communication control module includes command process single-chip microcomputer Circuit and order receive single chip circuit, and described order receives the screening reception that single chip circuit completes external command, described The explanation that command process single chip circuit is used for completing external command concurrently send command signal to process to CPU element, signal input Module and signal output processing module.Its process circuit figure is as shown in Figure 7.
The requirement of broadcast level matrix is not only embodied in the high one side of signal index, is also embodied in the security of equipment, stablizes Property, also there is very high requirement to the property easy to maintain of system simultaneously.This patent adopts system-level redundancy backup design, as Fig. 8 institute Show, that is, in input module, power module(Because any one matrix all includes power module, therefore do not embody this in this patent Module), control module, handover module and output module all adopted which rank of processing module of Redundancy Design no matter matrix device Break down, its corresponding redundant module can enable at short notice, realize the lasting sex work of system, substantially increase broadcast The security of level matrix device and stability.
The above, the only present invention preferably specific embodiment, but protection scope of the present invention is not limited thereto, Any those familiar with the art the invention discloses technical scope in, technology according to the present invention scheme and its Inventive concept equivalent or change in addition, all should be included within the scope of the present invention.

Claims (10)

1. the broadcast level of one kind 512 × 512 ultra-large 3GSDI matrix, including signal input processing module, handover module and Signal output processing module it is characterised in that:Described signal input processing module is used for transmitting through coaxial cable After 3GSDI signal carries out equilibrium treatment and primary clock recovery process, the 3GSDI signal after processing is delivered to and described signal The handover module that input processing module connects;Described handover module is used for realizing 3GSDI signal 512 tunnel input signal and 512 The switching of road output signal and wherein arbitrarily road input signal and any road output signal intersect switching;Described signal is defeated Go out processing module and carry out second level clock recovery process and signal driving for the 3GSDI signal that described handover module is exported Process.
2. according to claim 1 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Signal input processing module includes the equilibrium treatment core for the 3GSDI signal transmitting through coaxial cable is carried out with equilibrium treatment Piece and the primary clock recovery chip for the 3GSDI signal after equilibrium treatment is carried out with primary clock recovery process.
3. according to claim 1 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Matrix comprises four groups of handover modules, and described handover module adopts GX3290 or GX3246 or M211XX as hand-off process core Piece.
4. according to claim 1 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Signal output processing module includes carrying out second level clock recovery process for the 3GSDI signal that described handover module is exported Second level clock recovery chip and the signal that the 3GSDI signal after second level clock recovery process is carried out with signal driving process Driving chip.
5. according to claim 1 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Matrix also includes CPU element, and described CPU element is used for monitoring the switching fortune of the running status of matrix and real-time control matrix OK.
6. according to claim 5 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Matrix also includes communication control module, and described communication control module includes command process single chip circuit and order receives monolithic Dynamo-electric road, described order receives the screening reception that single chip circuit completes external command, and described command process single chip circuit is used Command signal is concurrently sent to process to CPU element, signal input processing module and signal output in the explanation completing external command Module.
7. according to claim 6 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described CPU element is connected with communication control module, receives control command by communication control module.
8. according to claim 6 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described The modules that matrix is related to and unit are respectively provided with redundancy backup structure.
9. according to claim 8 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Matrix also includes the pcb board thereon by above-mentioned module and unit laying, and described pcb board is to be connected by the pcb board of two pieces of 12U Constitute the pcb board of 24U.
10. according to claim 9 512 × 512 broadcast level ultra-large 3GSDI matrix it is characterised in that:Described Realize connecting by flexible flat cable between pcb board.
CN201310589712.7A 2013-11-19 2013-11-19 512*512 broadcasting super-large scale 3GSDI matrix Expired - Fee Related CN103595928B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310589712.7A CN103595928B (en) 2013-11-19 2013-11-19 512*512 broadcasting super-large scale 3GSDI matrix

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310589712.7A CN103595928B (en) 2013-11-19 2013-11-19 512*512 broadcasting super-large scale 3GSDI matrix

Publications (2)

Publication Number Publication Date
CN103595928A CN103595928A (en) 2014-02-19
CN103595928B true CN103595928B (en) 2017-02-08

Family

ID=50085895

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310589712.7A Expired - Fee Related CN103595928B (en) 2013-11-19 2013-11-19 512*512 broadcasting super-large scale 3GSDI matrix

Country Status (1)

Country Link
CN (1) CN103595928B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101272235A (en) * 2007-03-22 2008-09-24 日本电气株式会社 Data transmission apparatus, clock switching circuit and clock switching method
CN201577135U (en) * 2009-12-15 2010-09-08 安防制造(中国)有限公司 Matrix with multiple input formats and high rate
KR101271480B1 (en) * 2012-10-30 2013-06-05 주식회사 삼알글로벌 Digital video recorder having appartus for receiving automatic switched image by recognizing source and method thereof
CN203661177U (en) * 2013-11-19 2014-06-18 大连科迪视频技术有限公司 Super-large scale 3GSDI digital matrix switching device with two-stage clock recovery function

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3899586B2 (en) * 1997-04-04 2007-03-28 ソニー株式会社 Editing apparatus and editing method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101272235A (en) * 2007-03-22 2008-09-24 日本电气株式会社 Data transmission apparatus, clock switching circuit and clock switching method
CN201577135U (en) * 2009-12-15 2010-09-08 安防制造(中国)有限公司 Matrix with multiple input formats and high rate
KR101271480B1 (en) * 2012-10-30 2013-06-05 주식회사 삼알글로벌 Digital video recorder having appartus for receiving automatic switched image by recognizing source and method thereof
CN203661177U (en) * 2013-11-19 2014-06-18 大连科迪视频技术有限公司 Super-large scale 3GSDI digital matrix switching device with two-stage clock recovery function

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"广电系统中高清视频信号的接口与传输";吴涛;《电子世界》;20120430(第8期);第20-21页 *

Also Published As

Publication number Publication date
CN103595928A (en) 2014-02-19

Similar Documents

Publication Publication Date Title
CN102186120A (en) Distribution frame with intelligent port scanning device and distribution system
CN205644116U (en) KVM switches module for industrial control
CN102693695B (en) Display device
CN103595928B (en) 512*512 broadcasting super-large scale 3GSDI matrix
US20160188508A1 (en) Multiplex module and electronic apparatus thereof for high-speed serial transmission
CN203661177U (en) Super-large scale 3GSDI digital matrix switching device with two-stage clock recovery function
CN201966901U (en) Radio frequency receiving and transmitting device
CN105791850A (en) Encoder and coding method thereof, and decoder and decoding method thereof
CN201114397Y (en) Transmission switch matrix for wireless cable connection differential signal
CN105657228B (en) The electric power system and method for supplying power to of SDI patterns
CN201222248Y (en) USB interface combined device
CN209017058U (en) The master control borad and MMC Control protection system of MMC Control protection system
US20170194689A1 (en) System and electronic device
CN206075256U (en) A kind of online curing apparatus of multichannel
CN201134977Y (en) Circuit board
CN203120027U (en) Large-capacity high-definition video matrix
CN102148678A (en) Dual-path automatic full-redundancy transparent light transmission system
CN201114169Y (en) Serial communication interface isolation driver circuit
US8456457B2 (en) Printed circuit board
CN103746359A (en) Current-limiting signal generating circuit and uninterrupted power supply system
CN105812005B (en) A kind of TSM control systems back plane circuitry
CN207369163U (en) High definition backup camera
CN104280954A (en) Liquid crystal display and lower substrate assembly of liquid crystal display
US20220321500A1 (en) Network System and Mapping Device Capable of Scaling Fabric Size
CN104426698B (en) Port configuration method and the combined circuit plate module for being configured with multiport

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170208

Termination date: 20191119

CF01 Termination of patent right due to non-payment of annual fee