CN103595582A - High-accuracy synchronous system detection device applied to intelligent transformer substation - Google Patents

High-accuracy synchronous system detection device applied to intelligent transformer substation Download PDF

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Publication number
CN103595582A
CN103595582A CN201310554147.0A CN201310554147A CN103595582A CN 103595582 A CN103595582 A CN 103595582A CN 201310554147 A CN201310554147 A CN 201310554147A CN 103595582 A CN103595582 A CN 103595582A
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signal
synchronous
synchronizer
time
bit error
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CN103595582B (en
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王宇
邓虎
徐长宝
高吉普
戴宇
张小波
孟杨
熊汉
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Wuhan Zhongyuan Huadian Science & Technology Co Ltd
Guizhou Electric Power Test and Research Institute
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Wuhan Zhongyuan Huadian Science & Technology Co Ltd
Guizhou Electric Power Test and Research Institute
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Abstract

The invention provides a high-accuracy synchronous system detection device applied to an intelligent transformer substation. The high-accuracy synchronous system detection device comprises a satellite clock signal receiving unit, a signal receiving and analyzing unit of a synchronizing device, a synchronous/error code signal simulation output unit of the synchronizing device, a synchronous/error code effect feedback detection unit of a synchronized device, and a self-punctuality capacity detection unit of the synchronized device. According to the high-accuracy synchronous system detection device, synchronous signals can be analyzed and counted, by conducting high-accuracy synchronous measurement technology on the synchronous signals, accuracy, stability and integrity of source signals are obtained, the synchronous signals can be simulated and output, synchronous output of the synchronous signals can be adopted, a manually-controllable error code output method can also be adopted, signals which are fed back by the synchronized device after the synchronized device receives synchronous or matched time tick signals can be detected, and therefore a complete chain of a clock synchronous system in the intelligent transformer substation can be comprehensively and scientifically detected.

Description

A kind of high-precise synchronization system detecting device of intelligent substation application
Technical field
The present invention relates to intelligent substation of electric power system Clock Synchronization Technology field, be specifically related to a kind of high-precise synchronization system detecting device of intelligent substation application.
Background technology
With respect to traditional transformer station, intelligent substation is higher stricter to the requirement of Time Synchronization Network, and various time synchronism apparatus are on the market uneven: the problems such as interface type is lack of standardization, lock in time is long, synchronizing signal poor stability, certainly punctual ability, offered load scarce capacity occur repeatedly.In addition, when abnormal and fault appear in time synchronism apparatus in intelligent substation, all kinds ofly by synchronizer, should how to be responded and not have unified standard.So, once being in operation, time synchronism apparatus breaks down, by the operation of time service equipment, will be affected, when serious, will cause whole electrical network time confusion, and to electric power system, bring loss.In order to ensure the normal operation of intelligent substation, must carry out comprehensive time synchronized Characteristics Detection to the time synchronism apparatus of each networking with by synchronizer.
Summary of the invention
In view of this, the invention provides a kind of high-precise synchronization system detecting device of intelligent substation application, can realize the synchronizing characteristics of the various smart machines of intelligent substation is detected.
The high-precise synchronization system detecting device of a kind of intelligent substation application of the present invention, comprise: the signal access of satellite clock signal receiving unit, synchronizer with analytic unit, synchronize/bit error signal simulation data unit, by synchronizer synchronous/error code effect feedback detecting unit, by synchronizer from punctual ability detecting unit, wherein
Described satellite clock signal receiving unit, for receiving satellite clock signal, and the satellite clock signal based on receiving is calibrated the clock of self and punctual precision;
Signal access and the analytic unit of described synchronizer, for receiving the universal synchronous signal of intelligent substation, and resolve and Synchronization Analysis described universal synchronous signal, measures the quality of synchronizing signal;
Described synchronous/bit error signal simulation data unit, for described universal synchronous signal is carried out emulation with generate simulation synchronous/bit error signal, and using described simulation synchronous/bit error signal exports to by synchronizer as signal source;
Described by synchronizer synchronous/error code effect feedback detecting unit, for described synchronous/simulation of bit error signal simulation data unit output is synchronous/effect of bit error signal under, monitor and analyze by the feedback information of synchronizer, obtain by the response characteristic of synchronizer;
Described by synchronizer from punctual ability detecting unit, for detection of being received by synchronizer after synchronizing signal correcting local clock, described by synchronizer punctual ability and the synchronizing characteristics in the situation that synchronizing signal is withdrawn from.
Signal access and the analytic unit of described synchronizer, pulse signal, the IRIG series time message, serial ports that detects described universal synchronous signal to time message accuracy, acquisition comprises the relevant parameter of rising edge, time accuracy, pulse duration, signal amplitude, modulation ratio, frequency jitter, temporal quality position, shows in real time described relevant parameter and signal waveform; And the measured signal of TTL, RS232, RS485, idle contact, each interface type of optical fiber is carried out to level identification and input circuit switching automatically.
Signal access and the analytic unit of described synchronizer, carry out sampling with high precision to described universal synchronous signal, obtains the low level of described universal synchronous signal to rise time and the signal amplitude of high level; Obtain the rising moment of described universal synchronous signal and decline constantly, calculate the pulse duration of described universal synchronous signal also by the 1PPS moment of the more described universal synchronous signal rising moment with the internal clocking frequency division of device, obtain the time accuracy of described universal synchronous signal; Obtain the code-element period of IRIG-B code, calculate signal modulation ratio; IRIG series time message content is resolved, obtain the code element information that comprises temporal quality position, check digit, and the judgement of correcting errors.
Signal access and the analytic unit of described synchronizer, the PTP of described universal synchronous signal and NTP/SNTP message are added a cover to hardware timestamping, send in real time response message and add a cover transmitting time stamp, resolve and obtain the information of message time accuracy, IP address, MAC Address, path delay, port numbers.
Described synchronous/bit error signal simulation data unit generates bit error signal and comprises: resolve and revise the time of synchronizing signal, output gap; Adjust PPS/PPM/PPH pulse, comprise the interval time of adjusting pulse, heighten or turn down impulse level, extend or chopped pulse width, make the rate of climb steepening of porch or slow down; Adjust IRIG series time message characteristic and message content, comprise the adjustment to the time accuracy on frame speed, frame length, Baud Length, pulse rise time, pulse jitter time, second punctual edge.
Described by synchronizer synchronous/error code effect feedback detecting unit, by synchronizer, received described synchronous/simulation of bit error signal simulation data unit output is synchronous/bit error signal after, detect described by synchronizer, exported to time signal, by synchronous/asynchronous data statistic analysis technology, to described to time signal sampling value message, time message resolve, extract time scale information and also analyze its stability, integrality.
Described by the certainly punctual ability detecting unit of synchronizer, by carried out time service/non-time service contrast test by synchronizer, detect by the certainly punctual ability of synchronizer.
Described by the certainly punctual ability detecting unit of synchronizer, also for monitor many by synchronizer simultaneously, detect the cooperation net synchronization capability of multiple devices.
The solution of the present invention can be resolved and statistics synchronizing signal, by utilizing, synchronizing signal is carried out to high-precision synchronous measurement technique, provide accuracy, stability and the integrality of source signal, and can simulate output synchronizing signal, both can take also can take artificial controlled error code output intent with the output of synchronizeing of synchronizing signal, can also to by synchronizer receive synchronous or be configured to time the signal that fed back after signal detect, thereby the complete link of clock system in intelligent substation is carried out to the detection of overall scientific.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or scheme of the prior art, to the accompanying drawing of required use in embodiment be briefly described below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the block diagram of the high-precise synchronization system detecting device of a kind of intelligent substation application that provides of one embodiment of the invention;
Fig. 2 is that in apparatus of the present invention, synchronous/bit error signal simulation data unit carries out the rising edge schematic diagram of pulse synchronous signal adjustment when error code simulation data;
Fig. 3 is that in apparatus of the present invention, synchronous/bit error signal simulation data unit carries out the rising edge schematic diagram of pulse synchronous signal pulse duration adjustment when error code simulation data;
Fig. 4 is that in apparatus of the present invention, synchronous/bit error signal simulation data unit carries out the rising edge figure of pulse synchronous signal pulse spacing adjustment when error code simulation data;
Fig. 5 be synchronous in apparatus of the present invention/bit error signal simulation data unit carries out IRIG-B(DC when error code simulation data) schematic diagram adjusted of symbol signal;
Fig. 6 be synchronous in apparatus of the present invention/bit error signal simulation data unit carries out IRIG-B(DC when error code simulation data) schematic diagram adjusted of the time accuracy on second punctual edge.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is carried out to clear, complete description, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, the every other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work, belongs to the scope of protection of the invention.
As shown in Figure 1, the high-precise synchronization system detecting device of a kind of intelligent substation application that one embodiment of the invention provides, comprise: the signal access of satellite clock signal receiving unit, synchronizer with analytic unit, synchronize/bit error signal simulation data unit, by synchronizer synchronous/error code effect feedback detecting unit, by synchronizer from punctual ability detecting unit, wherein
Described satellite clock signal receiving unit, for receiving satellite clock signal, and the satellite clock signal based on receiving is calibrated the clock of self and punctual precision;
Signal access and the analytic unit of described synchronizer, for receiving the universal synchronous signal of intelligent substation, and resolve and Synchronization Analysis described universal synchronous signal, measures the quality of synchronizing signal;
Particularly, the pulse signal, IRIG series time message, serial ports that the signal access of described synchronizer and analytic unit can detect described universal synchronous signal to time message accuracy, acquisition comprises the relevant parameter of rising edge, time accuracy, pulse duration, signal amplitude, modulation ratio, frequency jitter, temporal quality position, shows in real time described relevant parameter and signal waveform; And the measured signal of TTL, RS232, RS485, idle contact, each interface type of optical fiber is carried out to level identification and input circuit switching automatically.
Particularly, the access of the signal of described synchronizer can also be carried out sampling with high precision to described universal synchronous signal with analytic unit, obtains the low level of described universal synchronous signal to rise time and the signal amplitude of high level; Obtain the rising moment of described universal synchronous signal and decline constantly, calculate the pulse duration of described universal synchronous signal also by the 1PPS moment of the more described universal synchronous signal rising moment with the internal clocking frequency division of device, obtain the time accuracy of described universal synchronous signal; Obtain the code-element period of IRIG-B code, calculate signal modulation ratio; IRIG series time message content is resolved, obtain the code element information that comprises temporal quality position, check digit, and the judgement of correcting errors.
Particularly, the signal access of described synchronizer can also be added a cover hardware timestamping to the PTP of described universal synchronous signal and NTP/SNTP message with analytic unit, send in real time response message and add a cover transmitting time stamp, resolve and obtain the information of message time accuracy, IP address, MAC Address, path delay, port numbers.
Described synchronous/bit error signal simulation data unit, for described universal synchronous signal is carried out emulation with generate simulation synchronous/bit error signal, and using described simulation synchronous/bit error signal exports to by synchronizer as signal source;
Particularly, described synchronous/bit error signal simulation data unit generates bit error signal and comprises: resolve and revise the time of synchronizing signal, output gap; Adjust PPS/PPM/PPH pulse, comprise the interval time of adjusting pulse, heighten or turn down impulse level, extend or chopped pulse width, make the rate of climb steepening of porch or slow down; Adjust IRIG series time message characteristic and message content, comprise the adjustment to the time accuracy on frame speed, frame length, Baud Length, pulse rise time, pulse jitter time, second punctual edge.
The rate of climb at the edge that as shown in Figure 2, synchronous/bit error signal simulation data unit can paired pulses synchronizing signal is adjusted;
As shown in Figure 3, the pulse duration that synchronous/bit error signal simulation data unit can paired pulses synchronizing signal is adjusted;
As shown in Figure 4, synchronous/bit error signal simulation data unit can be adjusted at paired pulses synchronous signal impulse interval;
As shown in Figure 5, synchronous/bit error signal simulation data unit can be to IRIG-B(DC) symbol signal adjusts;
As shown in Figure 6, synchronous/bit error signal simulation data unit can be to IRIG-B(DC) time accuracy on second punctual edge adjusts.
Described by synchronizer synchronous/error code effect feedback detecting unit, for described synchronous/simulation of bit error signal simulation data unit output is synchronous/effect of bit error signal under, monitor and analyze by the feedback information of synchronizer, obtain by the response characteristic of synchronizer;
Particularly, described by synchronizer synchronous/error code effect feedback detecting unit can by synchronizer, received described synchronous/simulation of bit error signal simulation data unit output is synchronous/bit error signal after, detect described by synchronizer, exported to time signal, by synchronous/asynchronous data statistic analysis technology, to described to time signal sampling value message, time message resolve, extract time scale information and also analyze its stability, integrality.
Described by synchronizer from punctual ability detecting unit, for detection of being received by synchronizer after synchronizing signal correcting local clock, described by synchronizer punctual ability and the synchronizing characteristics in the situation that synchronizing signal is withdrawn from.
Particularly, describedly by synchronizer, from punctual ability detecting unit, can, by carried out time service/non-time service contrast test by synchronizer, be detected by the certainly punctual ability of synchronizer.
Alternatively, describedly by synchronizer, from punctual ability detecting unit, can also, for monitor many by synchronizer simultaneously, be detected the cooperation net synchronization capability of multiple devices.
The solution of the present invention can be resolved and statistics synchronizing signal, by utilizing, synchronizing signal is carried out to high-precision synchronous measurement technique, provide accuracy, stability and the integrality of source signal, and can simulate output synchronizing signal, both can take also can take artificial controlled error code output intent with the output of synchronizeing of synchronizing signal, can also to by synchronizer receive synchronous or be configured to time the signal that fed back after signal detect, thereby the complete link of clock system in intelligent substation is carried out to the detection of overall scientific.
Apparatus of the present invention are as the crucial testing equipment of intelligent substation, the blank of China's intelligent substation time synchronized Characteristics Detection complete set of solutions aspect will be filled up, to improving intelligent substation fundamental research level, ensureing that intelligent substation reliability service is significant.
Finally it should be noted that: above embodiment only, in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to previous embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or part technical characterictic is wherein equal to replacement, and these modifications or replacement do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.

Claims (8)

1. the high-precise synchronization system detecting device of intelligent substation application, it is characterized in that, described device comprises: the signal access of satellite clock signal receiving unit, synchronizer with analytic unit, synchronize/bit error signal simulation data unit, by synchronizer synchronous/error code effect feedback detecting unit, by synchronizer from punctual ability detecting unit, wherein
Described satellite clock signal receiving unit, for receiving satellite clock signal, and the satellite clock signal based on receiving is calibrated the clock of self and punctual precision;
Signal access and the analytic unit of described synchronizer, for receiving the universal synchronous signal of intelligent substation, and resolve and Synchronization Analysis described universal synchronous signal, measures the quality of synchronizing signal;
Described synchronous/bit error signal simulation data unit, for described universal synchronous signal is carried out emulation with generate simulation synchronous/bit error signal, and using described simulation synchronous/bit error signal exports to by synchronizer as signal source;
Described by synchronizer synchronous/error code effect feedback detecting unit, for described synchronous/simulation of bit error signal simulation data unit output is synchronous/effect of bit error signal under, monitor and analyze by the feedback information of synchronizer, obtain by the response characteristic of synchronizer;
Described by synchronizer from punctual ability detecting unit, for detection of being received by synchronizer after synchronizing signal correcting local clock, described by synchronizer punctual ability and the synchronizing characteristics in the situation that synchronizing signal is withdrawn from.
2. device according to claim 1, it is characterized in that, signal access and the analytic unit of described synchronizer, pulse signal, the IRIG series time message, serial ports that detects described universal synchronous signal to time message accuracy, acquisition comprises the relevant parameter of rising edge, time accuracy, pulse duration, signal amplitude, modulation ratio, frequency jitter, temporal quality position, shows in real time described relevant parameter and signal waveform; And the measured signal of TTL, RS232, RS485, idle contact, each interface type of optical fiber is carried out to level identification and input circuit switching automatically.
3. device according to claim 2, it is characterized in that, signal access and the analytic unit of described synchronizer, carry out sampling with high precision to described universal synchronous signal, obtains the low level of described universal synchronous signal to rise time and the signal amplitude of high level; Obtain the rising moment of described universal synchronous signal and decline constantly, calculate the pulse duration of described universal synchronous signal also by the 1PPS moment of the more described universal synchronous signal rising moment with the internal clocking frequency division of device, obtain the time accuracy of described universal synchronous signal; Obtain the code-element period of IRIG-B code, calculate signal modulation ratio; IRIG series time message content is resolved, obtain the code element information that comprises temporal quality position, check digit, and the judgement of correcting errors.
4. device according to claim 3, it is characterized in that, signal access and the analytic unit of described synchronizer, the PTP of described universal synchronous signal and NTP/SNTP message are added a cover to hardware timestamping, send in real time response message and add a cover transmitting time stamp, resolve and obtain the information of message time accuracy, IP address, MAC Address, path delay, port numbers.
5. device according to claim 1, is characterized in that, described synchronous/bit error signal simulation data unit generates bit error signal and comprises: resolve and revise the time of synchronizing signal, output gap; Adjust PPS/PPM/PPH pulse, comprise the interval time of adjusting pulse, heighten or turn down impulse level, extend or chopped pulse width, make the rate of climb steepening of porch or slow down; Adjust IRIG series time message characteristic and message content, comprise the adjustment to the time accuracy on frame speed, frame length, Baud Length, pulse rise time, pulse jitter time, second punctual edge.
6. device according to claim 1, it is characterized in that, described by synchronizer synchronous/error code effect feedback detecting unit, by synchronizer, received described synchronous/simulation of bit error signal simulation data unit output is synchronous/bit error signal after, detect described by synchronizer, exported to time signal, by synchronous/asynchronous data statistic analysis technology, to described to time signal sampling value message, time message resolve, extract time scale information and also analyze its stability, integrality.
7. device according to claim 1, is characterized in that, described by the certainly punctual ability detecting unit of synchronizer, by carried out time service/non-time service contrast test by synchronizer, detects by the certainly punctual ability of synchronizer.
8. device according to claim 7, is characterized in that, described by the certainly punctual ability detecting unit of synchronizer, also for monitor many by synchronizer simultaneously, detects the cooperation net synchronization capability of multiple devices.
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CN104036308A (en) * 2014-05-09 2014-09-10 中国南方电网有限责任公司电网技术研究中心 Timing synchronization method used for electromechanical transient and electromagnetic transient simulation systems
CN104102122A (en) * 2014-07-03 2014-10-15 国家电网公司 Hand-held time synchronization tester
CN105099596A (en) * 2015-08-26 2015-11-25 武汉中元华电科技股份有限公司 In-system high-precision time synchronization method and device
CN108768577A (en) * 2018-08-27 2018-11-06 武汉中元通信股份有限公司 A kind of communication network time service method and system based on PTP time synchronizing signals
CN111917612A (en) * 2020-08-28 2020-11-10 中域高科(武汉)信息技术有限公司 Wide-area synchronous tester for intelligent substation and testing method thereof

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CN101871976A (en) * 2009-04-24 2010-10-27 郑州威科姆科技股份有限公司 Power clock detecting device
CN201812153U (en) * 2010-09-09 2011-04-27 河北旭辉电气股份有限公司 Precise time synchronizing device of digitalized transformer substation
CN202421768U (en) * 2011-12-16 2012-09-05 四川省电力公司通信自动化中心 Multifunctional time synchronization calibrator for electric power systems
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Publication number Priority date Publication date Assignee Title
CN104036308A (en) * 2014-05-09 2014-09-10 中国南方电网有限责任公司电网技术研究中心 Timing synchronization method used for electromechanical transient and electromagnetic transient simulation systems
CN104036308B (en) * 2014-05-09 2017-01-25 中国南方电网有限责任公司电网技术研究中心 Timing synchronization method used for electromechanical transient and electromagnetic transient simulation systems
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CN111917612A (en) * 2020-08-28 2020-11-10 中域高科(武汉)信息技术有限公司 Wide-area synchronous tester for intelligent substation and testing method thereof

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