CN103576679A - Visual signal high-speed acquisition system based on hardware binaryzation - Google Patents

Visual signal high-speed acquisition system based on hardware binaryzation Download PDF

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CN103576679A
CN103576679A CN201210257736.8A CN201210257736A CN103576679A CN 103576679 A CN103576679 A CN 103576679A CN 201210257736 A CN201210257736 A CN 201210257736A CN 103576679 A CN103576679 A CN 103576679A
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image
acquisition system
hardware
black line
visual signal
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赛音
张超
王浩
李素非
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赛音
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Abstract

The invention discloses an intelligent car visual signal high-speed acquisition system based on a camera. An image binaryzation and edge detection circuit is designed and adopted, and the design well overcomes the defects that an existing image acquisition system is insufficient in storage space, long in processing cycle and the like. The related algorithms of image acquisition, image processing and the like are designed and utilized, a Freescale 16-bit single chip microcomputer MC9S12XS128 is used as a platform to write related codes, and functional verification is achieved. The image analysis processing process can be divided into the three steps of image binaryzation, edge detection and black line extraction. Black line extraction relates to black line width information and judgment of a start line and needs to be achieved through software, therefore, a scheme that hardware is utilized to achieve image binaryzation and edge detection is provided, the resolution ratio can be increased, memory requirements can be greatly reduced, executing time of the image processing algorithm can be shortened, more accurate and complex steering engine and motor control can be conveniently achieved, processing capacity and the executing speed of an intelligent car are increased, and rapider and high-precision control and operation are achieved.

Description

Visual signal high speed acquisition system based on hardware binarization
Technical field
The present invention relates to automatic control technology, sensing technology etc., relate in particular to intelligent vision high-speed signal acquisition technology.
Background technology
Intelligent automobile is the developing direction of future automobile, by reducing traffic hazard, development automatic technology, improve comfortableness etc. many aspect the very important effect of performance; Intelligent automobile is a collection communication technology simultaneously, and computer technology, controls automatically, information fusion technology, the industry such as sensor technology, its development certainly will promote the development of other industry, has represented to a certain extent the level of a country aspect automatic intelligent.Intelligent carriage is as the simplification body of intelligent automobile, by intelligent carriage in information acquisition, processing, the research of the aspects such as control strategy, can improve good verification platform is provided for the scheme of intelligent automobile.
The signals collecting mode of existing intelligent carriage mainly contains camera, photovoltaic (infrared ray, laser) and three kinds of modes of electromagnetism guiding.Wherein complicated in camera collection mode, have and have a wide sphere of vision, obtain the advantages such as road information is more, but increased image simultaneously, process complexity; ; Photoelectricity dolly, complex circuit designs, program design is relatively simple, but it is little to look forward to the prospect, and is subject to the interference of extraneous light; Electromagnetism dolly is to navigate according to the electromagnetism guide wire in the middle of racing track, is subject to external interference relatively little, the same with photoelectric vehicle, is limited to equally prediction, is exactly the magnetic field of crossroad in addition, and processing acquires a certain degree of difficulty.Camera dolly need to be obtained good half-way house between image treatment cycle and control cycle, image treatment cycle length can obtain comparatively detailed road information, aspect dolly control, can do comparatively accurately, but cause control cycle elongated, control steering wheel and turn to motor-driven controlled frequency is little and fall, this is disadvantageous.
Intelligent carriage image information based on camera is mainly by the nonlinear down-sampled collection of digital picture procession to camera output at present, the Y-signal of single-chip microcomputer memory image delivery channel, not to UV signals collecting, this will increase storage space on the sheet of single-chip microcomputer.Meanwhile, the system clock frequency of single-chip microcomputer can not surpass 100MHz substantially, and to the detection of racing track black and white saltus step, by carrying out difference processing to gathering the gray-scale value of pixel, operand is sizable, and the processing time that takies single-chip microcomputer is longer.In image information collecting and processing module, taken the most storage space of monolithic and operation time, and final control algolithm is on the contrary because the reason of control cycle can not be write more complicatedly and meticulous.If can obtain comparatively accurate image information, the computing that does not increase single-chip microcomputer is simultaneously complicated, just there are enough spaces to realize more detailed steering wheel, turns to control and drive and control of electric machine.
Summary of the invention
Technical matters to be solved by this invention is: single-chip microcomputer is limited to the storage space of image acquisition and processing and processing power, has limited to complexity and the operational precision of control algolithm.In order not increase under the prerequisite of single-chip microcomputer computational load, obtain meticulousr image information and control more accurately, we gather the scheme of the thinking replacement single-chip microcomputer processing of image at research with hardware.
The present invention is for solving above technical matters, the technical scheme adopting is: the signal of camera output is carried out to binary conversion treatment by hardware circuit, extract marginal information and deposit FIFO storer in, by I/O mouth input single-chip microcomputer, carry out again the relevant treatment of successive image.This scheme is intended to obtain vision signal more accurately, improves image resolution ratio, S12XS single-chip microcomputer is freed from heavy video signal collective task, and simplified image processing, to realize, more excellent turning to controlled and speed is controlled.
What described single-chip microcomputer adopted is the MC9S12XS128 single-chip microcomputer of Freescale company design, and it is a kind of 16 single-chip microcomputers.
Described hardware binarization is processed and fifo circuit comprises 4bit comparer 74F85 chip, 8D trigger 74F273 chip, 2D trigger 74F74 chip, four or two inputs and door 74F08 chip, four or two input XOR gate 74F86 chips, four or two inputs or door 74F32 chip, the eight-digit binary number counter 74AHCT593 chip with tri-state parallel port and 4bitx16FIFO chip 74HC40105.4bit comparer, for two four figures certificates are compared, is exported comparative result by corresponding pin; 8D trigger has asynchronous resetting function, is connected to HREF signal, and after clock pin is connected to four frequency divisions, signal is realized shift LD; 2D trigger has preset and Protection Counter Functions, utilizes it to realize four division function; Four or two inputs are inputted XOR gate and four or two inputs or door for realizing the delay feature of filtering and HREF signal with door, four or two; Eight-digit binary number counter is realized lateral attitude counting for realizing to the pixel clock tally function after same a line frequency division; 4bitx16FIFO chip is for marginal position in the middle of storing one row.
Described camera adopts digital camera OV7620, and its interface is comparatively simple, facilitates hardware handles Interface design.
The present invention realizes image acquisition by software and black line extracts, and black line leaching process first carries out edge filter, to reach more extraction effect.
Beneficial effect of the present invention is as follows:
The present invention uses hardware circuit to realize image binaryzation and rim detection, greatly reduced great amount of images information to the demand of internal memory, reduced single-chip microcomputer for resource and the treatment cycle analyzed and processing image information is spent, increased complexity and the precision of control algolithm, General Promotion process information and the judgement of intelligent vehicle.
The present invention, by adopting above-mentioned hardware circuit design, can improve image resolution ratio, S12XS single-chip microcomputer freed from heavy video signal collective task, and simplified image processing, to realize, more excellent turning to controlled and speed is controlled.
The lower grade of device chip that the present invention selects, and realized high-speed signal acquisition cheaply.
Accompanying drawing explanation
Fig. 1 is the whole hardware structure diagram of the present invention
Fig. 2 is hardware binarization and edge detect circuit design structure diagram
Fig. 3 is that car body pictorial diagram is carried in the present invention
Fig. 4 is hardware binarization and edge detect circuit pictorial diagram
Fig. 5 is bend rim detection design sketch
Fig. 6 is that black line extracts process flow diagram
Embodiment
Below in conjunction with drawings and the specific embodiments, the present invention is described in further details.
The present invention is the framework based on intelligent vehicle car mode configuration, build hardware configuration, by the processing of nucleus module MC9S12XS128 single-chip microcomputer, the analysis of information collection that sensor is collected draws operation result after processing, control motor and steering wheel and make a cover system of the response that adapts to racing track and tactics strategy, as shown in Figure 1.
Whole system mainly by hardware and software, has realized racecourse information identification and car body is controlled two large divisions's function.
Hardware circuit:
The hardware architecture of intelligent vehicle is the direct embodiment of scheme, and main modular has: core board, and 16 single-chip microcomputers and I/O stitch, and SD card slot, be convenient to debugging; Interface board, for single-chip microcomputer provides 3.3V source of stable pressure and charactron, dial-up dish etc., by the interface refinement of the I/O stitch of single-chip microcomputer and each module; Drive plate, adopts two BTS7960B half-bridge driven chips, and chip load current can reach 43A, and internal resistance is only 16m Ω, for motor drives, provides large electric current; Direct current generator, electric current is larger, and rotating speed is faster; Photoelectric encoder, is mainly for testing the speed, and realizes the speed closed loop of dolly and controls, and the speed of carrying out is promptly and accurately controlled, and resolution is higher, and the speed recording is more accurate; Steering wheel, servo motor, inputs the duty of PWM ripple and recently adjusts turning to of steering wheel by adjustment; Camera, is one of most important sensor of intelligent automobile, the performance that is accurately directly connected to whole dolly of output information; Image hardware handles circuit, realizes image binaryzation and rim detection, and result is stored into FIFO, for single-chip microcomputer, extracts.
In order to alleviate the burden of single-chip microcomputer, improve resolution simultaneously, more accurate black line information is provided, the present invention realizes image binaryzation and rim detection by hardware.For black and white racing track, colour difference information UV without image, only need monochrome information Y, according to the threshold value of the gray-scale value of setting, carry out binaryzation, subsequent conditioning circuit adopts filtering to process and takes out noise, by black and white transition detection, go out image border, and marginal position is recorded and deposited FIFO in, single-chip microcomputer can regularly read the data of FIFO and carry out subsequent treatment and control.
Hardware handles circuit is divided into binaryzation, filtering, rim detection, position counting and five modules of marginal position storage.In black line edge grey scale change, not clearly, and neighbor grey scale change may have repeatedly, select high 4 to compare, can allow that gray-value variation is ± 16, can disturb by exclusive segment, our experiments show that 4 pixel values are relatively enough for black and white transition detection, therefore select high four of gray-scale value to compare position as threshold value.Data after binaryzation enter shift register, according to the data of neighbor pixel, carry out filtering, then utilize XOR gate Edge detected, finally the pixel train value after frequency division counter are deposited in to FIFO and read to carry out the processing of subsequent conditioning circuit for single-chip microcomputer.
The advantage that adopts image processing hardware circuit to compare with processing scheme with the collection of single-chip microcomputer through image is: the high 100x160 of resolution, take mcu resource few, and speed is fast.Internal memory calculates and comprises image information storage, and black line width and black line take up space:
Direct implementation=the Row_max* of single-chip microcomputer (Line_max+1)+6*Row_max;
Hardware handles scheme=Row_max*Edge_num+6*Row_max;
Wherein, Row_max, for the line number of the image of processing, is 60 for the former, and the latter is 100; Line_max, for the columns of the image of processing, is 90 for the former, and the latter is 160; Edge_num is number of transitions, and design load is 8.
Image line acquisition time=pixel period * row resolution=74ns * 640=47.36us of the direct implementation of single-chip microcomputer, adopting the every row collection of hardware handles scheme is row useful signal HREF negative edge, therefore
Figure BSA00000753869000031
Figure BSA00000753869000041
By calculating, can find out, hardware handles scheme has reduced the storage of sheet mountain and row acquisition time when improving acquisition resolution image, has arrived the set goal.
Software section:
Image acquisition and black line extract and realize by software.
After the key of image acquisition is that row useful signal (HREF signal) negative edge at every row arrives, the sequential that reads of simulation FIFO deposits data in single-chip microcomputer.Therefore adopt PT0 mouth to catch the negative edge of HREF, in interrupt handling routine, gather data fifo.By detecting DOR position, whether be that height differentiates in fifo chip whether also have data at every turn, by SO, by high step-down, shift out next data.And shift out needs to postpone 45ns after data and has enough time to shift out data to guarantee fifo chip at every turn.
Image becomes the positional information at every row edge later through binaryzation and edge detection process, in order to extract guiding black line, must process and extract black line.For the marginal information of every row, to take first to carry out edge filter and remove invalid edge, the method that the width information of recycling black line is processed is extracted black line.
The later information of hardware circuits which process is the position (owing to being four frequency divisions, because this journey resolution is 160) at place, every row edge, deposits in two-dimensional array.Due to what adopt, be binaryzation, Edge detected then, so this wherein has interference certainly, therefore must algorithm for design be rejected by edge.The image carrying out with traditional camera gray level image is out processed and is compared, hardware binarization fringing testing circuit has lost kind (black in white or white to black) and these information of each grey scale pixel value when leading edge saltus step, but done filtering in the middle of considering hardware circuit, marginal information is out relatively good, even if therefore have interference also can utilize the width of black line and periphery edge information to carry out filtering, thereby extract black line.The method that edge filter adopts is to utilize the marginal information of adjacent several row to carry out validity judgement, and the efficient frontier interim array of restoring is preserved and facilitated subsequent treatment.Marginal position after edge filter is stored in interim array, in order to obtain black line edge, carry out again the judgement of width information, set two characteristic quantity Wire_width_min and Wire_width_max as the minimum and maximum decision content of black line width, only have width just can be considered to real black line in the black line between the two, and ask the mean value of left and right edges position to be stored in array, as shown in Figure 6 as black line.
With traditional black line extraction algorithm, there is very large difference in the black line extraction algorithm after hardware binarization and rim detection.First be the resolution due to image acquisition: traditional scheme, owing to being subject to the demonstration in single-chip microcomputer speed, internal memory and processing time, can not be adopted more data, generally gets 60x90; And hardware binarization and the data volume of rim detection scheme own reduce greatly, be not substantially subject to the control of internal memory and speed, for control cycle is shortened, near-end tens is capable not to be gathered certainly.But resolution has still reached 100x160.Secondly, the image of traditional scheme scans entire image while processing, and at least processes 5400 pixels, and due to existence relatively, cost can be larger; Hardware binarization and rim detection scheme are processed 100x8=800 data, will save greatly the time of image processing, the more complicated control algolithm of convenient realization.

Claims (5)

1. the visual signal high speed acquisition system based on hardware binarization, is characterized in that: it comprises main control singlechip MC9S12XS128, camera sensing device OV7620, image hardware handles circuit and FIFO, motor-drive circuit, photoelectric velocity measurement scrambler and steering wheel and motor.
2. visual signal high speed acquisition system according to claim 1, is characterized in that: by video decoding chip and fifo queue, realize the flexible control to video signal collective, improve accuracy of data acquisition, and simplify single-chip data acquisition flow process.
3. visual signal high speed acquisition system according to claim 1, it is characterized in that: hardware binarization is processed and fifo circuit adopts the chip designs such as 74F85,74F273,74F74,74F08,74F86,74F32,74AHCT593 and 74HC40105 to complete, and has characteristic cheaply.
4. visual signal high speed acquisition system according to claim 1, is characterized in that: camera adopts digital camera OV7620, and interface is simple, is easy to the Interface design with hardware handles circuit.
5. visual signal high speed acquisition system according to claim 1, it is characterized in that: there is detailed black line extraction algorithm, and before extracting black line, carried out the edge filter of software, and improved accuracy and sharpness that black line extracts, reduced the probability of error detection.
CN201210257736.8A 2012-07-24 2012-07-24 Visual signal high-speed acquisition system based on hardware binaryzation Pending CN103576679A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107505946A (en) * 2017-10-11 2017-12-22 安徽建筑大学 Intelligent carriage path identifying system based on black and white camera
CN108810548A (en) * 2017-05-03 2018-11-13 深圳市傲睿智存科技有限公司 A kind of compression and decompression method of bianry image
CN111464750A (en) * 2020-05-14 2020-07-28 中央民族大学 Image processing device and intelligent vehicle

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108810548A (en) * 2017-05-03 2018-11-13 深圳市傲睿智存科技有限公司 A kind of compression and decompression method of bianry image
CN107505946A (en) * 2017-10-11 2017-12-22 安徽建筑大学 Intelligent carriage path identifying system based on black and white camera
CN107505946B (en) * 2017-10-11 2021-01-29 安徽建筑大学 Intelligent trolley path identification method based on black and white camera
CN111464750A (en) * 2020-05-14 2020-07-28 中央民族大学 Image processing device and intelligent vehicle

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