CN103516311B - Equalizer - Google Patents
Equalizer Download PDFInfo
- Publication number
- CN103516311B CN103516311B CN201210209969.0A CN201210209969A CN103516311B CN 103516311 B CN103516311 B CN 103516311B CN 201210209969 A CN201210209969 A CN 201210209969A CN 103516311 B CN103516311 B CN 103516311B
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- China
- Prior art keywords
- perforation
- resistance
- circuit board
- pad
- equalizer
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- Expired - Fee Related
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- 238000005303 weighing Methods 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 6
- 238000012935 Averaging Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Abstract
A kind of equalizer, including a multilayer circuit board and the balance module that is arranged on circuit board, this balance module includes two incoming ends, first and second perforation, first and second resistance, two outfans and a pair microstrip line, first and second perforation all runs through multilayer circuit board and arranges, and first and second perforation is equal and top layer, intermediate layer and bottom are electrically connected with by pad respectively, two incoming ends are connected to first and second perforation and electrically connect the pad at place with top layer, two outfans are connected to first and second perforation and electrically connect the pad at place with third layer, two microstrip lines are respectively connecting to first and second perforation and electrically connect the pad at place with bottom, one end of two microstrip lines is interconnected by the first resistance, the other end is interconnected by the second resistance.Above-mentioned equalizer compensation effect is preferable.
Description
Technical field
The present invention relates to a kind of equalizer, particularly relate to a kind of staged equalizer.
Background technology
High-frequency signal such as digital signal is susceptible to high frequency attenuation in transmitting procedure, digital data transmission error rate is caused to rise, therefore, before transmission digital signal, often by equalizer, digital signal need to be carried out high frequency compensation, but present equalizer is generally only capable of digital signal is carried out one-level high frequency compensation, can not carry out multi-stage high-frequency compensation according to actual needs, the high frequency compensation effect for digital signal is relatively limited.
Summary of the invention
In view of above-mentioned condition, it is necessary to provide a kind of compensation effect preferably equalizer.
nullA kind of equalizer，For compensating the high fdrequency component that signal is lost in transmission channel，This equalizer includes a circuit board and is arranged at the balance module on this circuit board，This circuit board is a multi-layer sheet，This balance module includes two incoming ends、First and second perforation、First and second resistance、Two outfans and one first pair of microstrip line，This first and second perforation all runs through this multilayer circuit board，And this first and second perforation is equal and top layer、Intermediate layer and bottom are electrically connected with by pad respectively，This two incoming end is respectively connecting to the first perforation and electrically connects the pad at place with top layer and the second perforation electrically connects the pad at place with top layer，This two outfan is respectively connecting to the first perforation and electrically connects the pad at place with intermediate layer and the second perforation electrically connects the pad at place with intermediate layer，Two microstrip lines in this first pair of microstrip line are respectively connecting to the first perforation and electrically connect the pad at place with bottom and the second perforation electrically connects the pad at place with bottom，One end of this two microstrip line is connected with each other by the first resistance，The other end of this two microstrip line is connected with each other by the second resistance，This first and second resistance may be contained within the bottom of circuit board.
This equalizer can carry out Multilevel compensating to high-frequency signal, and compensation effect is preferable, can be effectively reduced the error rate of transmission signal.
Accompanying drawing explanation
Fig. 1 is the structure chart of the better embodiment of equalizer of the present invention.
Fig. 2 is the structure chart of the better embodiment of the balance module in equalizer shown in Fig. 1.
Fig. 3 is signal without the comparison diagram of the time domain waveform during equalizer of better embodiment of the present invention with the time domain waveform after the equalizer shown in Fig. 1.
Fig. 4 is signal without the emulation eye pattern during equalizer of better embodiment of the present invention.
Fig. 5 is signal emulation eye pattern after the equalizer shown in Fig. 1.
Fig. 6 is the structure chart of another better embodiment of balance module of the present invention.
Main element symbol description
| Equalizer | 100 |
| Circuit board | 10 |
| Top layer | 11 |
| Third layer | 13 |
| Bottom | 18 |
| Balance module | 30 |
| Incoming end | 31 |
| First perforation | 32 |
| Second perforation | 33 |
| Resistance | R1、R2、R3 |
| Outfan | 35 |
| Microstrip line | 36、38 |
| Pad | 21-26 |
Following detailed description of the invention will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Detailed description of the invention
Referring to Fig. 1, the better embodiment of equalizer 100 of the present invention includes a multilayer circuit board 10 and is arranged at the balance module 30 on this multilayer circuit board 10.This multilayer circuit board 10 accesses signal to be equalized, then by this balance module 30, the signal of this access is carried out equilibrium treatment, it is achieved compensate the multi-stage high-frequency of this signal.In embodiment of the present invention, as a example by a 8-layer printed circuit board 10, illustrate (Fig. 1 only illustrates three layers).
Seeing also Fig. 2, this balance module 30 includes two incoming end 31,1 first perforation 32,1 second perforations 33, resistance R1, resistance R2, two outfans 35 and a pair microstrip line 36.
This first perforation 32 and the second perforation 33 run through this 8-layer printed circuit board 10 and arrange, and this first perforation 32 and the second perforation 33 are electrically connected with by pad 21-26 respectively with top layer 11, third layer 13 and bottom 18.In present embodiment, this first perforation 32 and the second perforation 33 all become cylindrical shape.
This two incoming end 31 is respectively connecting to the first perforation 32 and electrically connects the pad 21 at place with top layer 11 and the second perforation 33 electrically connects the pad 22 at place with top layer 11.In present embodiment, this two incoming end 31 be to should the first perforation 32 and two rectangle demihull shapes of the second perforation 33, these two rectangle demihull shapes may be contained within the surface of top layer 11.This two incoming end 31 carries out equilibrium treatment in order to the signal to be equalized accessed on the top layer 11 of circuit board 10 is accessed to this balance module 30.
This two outfan 35 is respectively connecting to the first perforation 32 and electrically connects the pad 23 at place with third layer 13 and the second perforation 33 electrically connects the pad 24 at place with third layer 13.In present embodiment, this two outfan 35 be to should the first perforation 32 and two rectangle lamellar bodies of the second perforation 33, these two rectangle lamellar bodies may be contained within the surface of third layer 13.This outfan 35 is in order to will be exported to backend electronics assembly by that access on the top layer 11 of circuit board 10 and after balance module 30 equilibrium treatment signal.
Two microstrip lines in this pair microstrip line 36 are respectively connecting to the first perforation 32 and electrically connect the pad 25 at place with bottom 18 and the second perforation 33 electrically connects the pad 26 at place with bottom 18.One end of this two microstrip line is connected by resistance R1, and the other end of this two microstrip line is connected by resistance R2.This resistance R1 and R2 may be contained within bottom 18.
The first signal accessed by incoming end 31 is when first group of perforation 32, and part the first signal directly exports from outfan 35；Part the first signal is transferred into resistance R1 through the first perforation 32 and the second perforation 33, then part the first signal that resistance R1 is reflected back will be back to outfan 35 along original route, the the first complete Signal averaging accessed with incoming end 31 forms a secondary signal, exported by outfan 35 again, it is achieved the one-level of this first signal is compensated.It is sent to resistance R2 through first perforation the 32, second perforation 33, resistance R1 and microstrip line 36 until the first signal of described access, signal will be reflected along original route by resistance R2, wherein part signal by multiple reflections between resistance R2 and resistance R1, part signal is then sent to outfan 35 through the first perforation 32 and the second perforation 33 through resistance R1 together with the signal reflected back by resistance R1, and form one the 3rd signal with the first complete Signal averaging accessed, exported by outfan 35 again, it is achieved two grades of compensation to this first signal.Wherein, by different resistance values and the length of microstrip line 36 of collocation resistance R1 and R2, effect such as grade in various degree can be produced.
Seeing also Fig. 3, wherein curve L1 is not use the difference of equalizer to touch input loss oscillogram, and curve L2 is the oscillogram of the staged equalizer using the present invention, and wherein in curve L2, the value of resistance R1 takes 100 ohm, and the value of resistance R2 takes 10 ohm.Comparison this curve L1 and curve L2 understands: the staged equalizing effect of the present invention presented mild response before 2.5GHz frequency, it is possible to effective compensation high-frequency transmission is lost.
See also Fig. 4 and Fig. 5, wherein Fig. 4 be signal without emulation eye pattern during equalizer, Fig. 5 is signal emulation eye pattern after the equalizer of the present invention of the microstrip line 36 of a meter.Comparison two figure is visible: when not plus equalizer, because channel attenuation and symbol border interference effect, the signal integrity of SAS signal can not meet the requirement of SAS signal.Comparatively speaking, when plus equalizer of the present invention, although signal low-frequency component reduces, but because the high-frequency energy of waveform can effectively be strengthened by equalizer, it is effective against channel attenuation and symbol border interference effect on the contrary, makes signal integrity meet the requirement of SAS signal.
The equalizer 100 of the present invention can realize the Multilevel compensating to high-frequency signal successively, and compensation effect is preferable, can effectively reduce the error rate of transmission signal.
Please continue to refer to Fig. 6, with the difference of equalizer in Fig. 1, another better embodiment of balance module of the present invention is that balance module also includes resistance R3 and another is to microstrip line 38, this microstrip line 38 is connected between resistance R2 and R3, and this resistance R3 is arranged on the bottom of circuit board equally.In present embodiment, this equalizer can realize three grades of compensation to signal, and its principle is identical with the equalizer shown in Fig. 1.
It addition, those skilled in the art also can do other change, certainly, these changes done according to present invention spirit in spirit of the present invention, all should be included in scope of the present invention.
Claims (3)
1. an equalizer, including a circuit board and be arranged on this circuit board equal
Weighing apparatus module, this circuit board is a multilayer circuit board, this balance module include two incoming ends,
First and second perforation, first and second resistance, two outfans and one first are to micro-
Band wire, this first and second perforation all runs through this multilayer circuit board, and this first and
Two perforations are all electrically connected with by pad respectively with top layer, intermediate layer and bottom, should
Two incoming ends are respectively connecting to the first perforation and electrically connect the pad and second at place with top layer
Perforation electrically connects the pad at place with top layer, and this two outfan is respectively connecting to the first perforation
Electrically connect the pad at place with intermediate layer and the second perforation electrically connects the weldering at place with intermediate layer
Dish, two microstrip lines in this first pair of microstrip line are respectively connecting to the first perforation and bottom
Pad at electrical connection and the second perforation electrically connect the pad at place, this first couple with bottom
One end of two microstrip lines in microstrip line is connected with each other by the first resistance, this first couple
The other end of two microstrip lines in microstrip line is connected with each other by the second resistance, and this is first years old
And second resistance may be contained within the bottom of circuit board；This balance module also includes one
Three resistance and one second pair of microstrip line, this second pair of microstrip line be connected to the second resistance with
Between 3rd resistance, one end of two microstrip lines in this second pair of microstrip line passes through second
Resistance is connected with each other, and the other end of two microstrip lines in this second pair of microstrip line is by the
Three resistance are connected with each other, and the 3rd resistance is arranged on the bottom of circuit board.
2. equalizer as claimed in claim 1, it is characterised in that: this two incoming end
It is rectangular conductive sheet.
3. equalizer as claimed in claim 2, it is characterised in that: this two incoming end
It is arranged on the surface of top layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210209969.0A CN103516311B (en) | 2012-06-25 | 2012-06-25 | Equalizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210209969.0A CN103516311B (en) | 2012-06-25 | 2012-06-25 | Equalizer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103516311A CN103516311A (en) | 2014-01-15 |
| CN103516311B true CN103516311B (en) | 2016-12-21 |
Family
ID=49898481
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210209969.0A Expired - Fee Related CN103516311B (en) | 2012-06-25 | 2012-06-25 | Equalizer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103516311B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1639970A (en) * | 2002-01-28 | 2005-07-13 | 史迪威巴克公司 | Dielectric loss compensation methods and apparatus |
| CN101494625A (en) * | 2008-01-21 | 2009-07-29 | 华为技术有限公司 | Linear equilibrium method and linear equalizer |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7668236B2 (en) * | 2004-12-07 | 2010-02-23 | Mstar Semiconductor, Inc. | Multi-stage cable equalizer |
-
2012
- 2012-06-25 CN CN201210209969.0A patent/CN103516311B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1639970A (en) * | 2002-01-28 | 2005-07-13 | 史迪威巴克公司 | Dielectric loss compensation methods and apparatus |
| CN101494625A (en) * | 2008-01-21 | 2009-07-29 | 华为技术有限公司 | Linear equilibrium method and linear equalizer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103516311A (en) | 2014-01-15 |
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| Date | Code | Title | Description |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20160613 Address after: 518000 Guangdong Province, Shenzhen New District of Longhua City, Dalang street, Hua Sheng Lu Yong Jingxuan commercial building 1608 Applicant after: Jinyang Shenzhen sea Network Intelligent Technology Co., Ltd. Address before: 518109 Guangdong city of Shenzhen province Baoan District Longhua Town Industrial Zone tabulaeformis tenth East Ring Road No. 2 two Applicant before: Hongfujin Precise Industry (Shenzhen) Co., Ltd. Applicant before: Hon Hai Precision Industry Co., Ltd. |
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| C41 | Transfer of patent application or patent right or utility model | ||
| CB03 | Change of inventor or designer information |
Inventor after: Li Wei Inventor after: Ji Sheng Inventor after: Zou Haishu Inventor before: Chen Jianxun Inventor before: Xie Boquan |
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| COR | Change of bibliographic data | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20160921 Address after: 225300 No. 18 Yingbin Road, Jiangsu, Taizhou Applicant after: Jiangsu Chunlan Cleaning Energy Research Institute Co., Ltd. Address before: 518000 Guangdong Province, Shenzhen New District of Longhua City, Dalang street, Hua Sheng Lu Yong Jingxuan commercial building 1608 Applicant before: Jinyang Shenzhen sea Network Intelligent Technology Co., Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20161221 Termination date: 20180625 |
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| CF01 | Termination of patent right due to non-payment of annual fee |