CN103516179B - There is the switching type voltage stabilizer control circuit of multiple clock signal frequency setting mode - Google Patents
There is the switching type voltage stabilizer control circuit of multiple clock signal frequency setting mode Download PDFInfo
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- CN103516179B CN103516179B CN201210219976.9A CN201210219976A CN103516179B CN 103516179 B CN103516179 B CN 103516179B CN 201210219976 A CN201210219976 A CN 201210219976A CN 103516179 B CN103516179 B CN 103516179B
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Abstract
One of control circuit of switching type voltage stabilizer that this patent proposes, includes: controls pin, is used for coupling non-essential resistance；Resistance detector, for when controlling pin and being coupled to non-essential resistance, detecting the resistance value of non-essential resistance；Electric current produces module, produces corresponding control electric current for the detecting result according to resistance detector；Agitator, is coupled to control pin and electric current produces module, be used for producing clock signal；And mode switching circuit.When mode switching circuit arranges oscillator operation in resistance control model, agitator can produce clock signal according to controlling electric current, makes the frequency resistance value corresponding to non-essential resistance of clock signal.When mode switching circuit arranges oscillator operation in control pattern signal, agitator can make clock signal be synchronized with outer synchronous signal according to controlling the outer synchronous signal generation clock signal that pin is coupled.Control circuit only need to arrange single control pin, is just provided that two kinds of different clock signal frequency setting modes.
Description
Technical field
The present invention is about the control circuit of switching type voltage stabilizer, and espespecially one has multiple clock signal frequency
The control circuit of setting pattern.
Background technology
The control circuit of some switching type voltage stabilizer can arrange a frequency setting pin and a synchronizing signal simultaneously
Pin, wherein, frequency setting pin is in order to connect outside the internal clock signal frequency determining control circuit
Portion's resistance, synchronizing signal pin is then in order to receive an outer synchronous signal, for control circuit by inside
Clock signal is arranged to Tong Bu be used with outer synchronous signal.
Although arranging two pins clock signal frequency setting mode for control circuit on the control circuitry
It is provided that higher selection is elastic, but needs to take more chip package area.To make suitching type
The chip package area of the control circuit of manostat can reduce further, the most obviously must simplify control further
The pin number of circuit processed.
Summary of the invention
In view of this, the most effectively simplify the pin number of the control circuit of switching type voltage stabilizer, again will not
The frequency setting way choice having influence on the internal clock signal for control circuit is elastic, actually industry
There is problem to be solved.
The invention provides the embodiment of a kind of control circuit for switching type voltage stabilizer, it includes:
One controls pin, is used for coupling a non-essential resistance；One resistance detector, is coupled to this control pin, uses
In time being coupled to this non-essential resistance at this control pin, detect the resistance value of this non-essential resistance；One electric current produces
Raw module, is coupled to this resistance detector, for producing a phase according to the detecting result of this resistance detector
Corresponding control electric current；One agitator, is coupled to this control pin and this electric current produces module, is used for producing
A raw clock signal；And a mode switching circuit, it is coupled to this control pin and this agitator；Wherein
When this mode switching circuit arranges this oscillator operation in a resistance control model, this agitator can foundation
This control electric current produces this clock signal, makes the frequency resistance corresponding to this non-essential resistance of this clock signal
Value, and when this mode switching circuit arranges this oscillator operation in a control pattern signal, this agitator
This clock signal can be produced according to the outer synchronous signal that this control pin is coupled, make this clock signal
It is synchronized with this outer synchronous signal.
One of advantage of above-mentioned control circuit is, whether mode switching circuit can have external sync by Auto-Sensing
Signal is coupled to control pin, and switches the operator scheme of agitator accordingly.
Another advantage of above-mentioned control circuit, is only need to arrange single control pin, is just provided that two kinds not
Same clock signal frequency setting mode, not only gives control circuit higher use elasticity, moreover it is possible to effectively
Simplify required chip package area.
Another advantage of above-mentioned control circuit, can be prevented effectively from mode switching circuit because controlling on pin
Noise and mistake switching agitator operator scheme situation occur.
Accompanying drawing explanation
Fig. 1 is the functional block diagram after an embodiment simplification of the power supply changeover device of the present invention.
Fig. 2 is the functional block diagram after an embodiment simplification of the control circuit in Fig. 1.
Fig. 3 to Fig. 4 is the sequential chart after the different running embodiments simplification of the control circuit in Fig. 2.
Fig. 5 is the functional block diagram after another embodiment simplification of the control circuit in Fig. 1.
Fig. 6 is the sequential chart after a running embodiment simplification of the control circuit in Fig. 5.
Detailed description of the invention
Below in conjunction with relevant drawings, embodiments of the present invention are described.In the drawings, identical mark
Number represent same or similar element or flow process/step.
Some vocabulary is employed to censure specific element in the middle of description and follow-up claim.Institute
Genus field has usually intellectual it is to be appreciated that same element may be called with different nouns.
In the way of this specification and follow-up claim not difference by title is used as distinguishing element, but
The benchmark distinguished it is used as with element difference functionally.In description in the whole text and follow-up claim
" comprising " mentioned by the middle of is an open term, therefore should be construed to " comprise but be not limited to ... ".
It addition, " coupling " word comprises at this and any directly and indirectly connects means.Therefore, if literary composition is retouched
State one first element and be coupled to one second element, then representing this first element can directly (comprise by electrically
Connect or be wirelessly transferred, the signal connected mode such as optical delivery) be connected to this second element, or by it
Its element or connection means are indirectly electrical or signal is connected to this second element.
Used herein " and/or " describing mode, comprise cited one of them or multiple project
Combination in any.It addition, unless specialized in this specification, the term of the most any odd number lattice is all
Comprise the connotation of plural number lattice simultaneously.
Fig. 1 is the functional block diagram after power supply changeover device 100 simplification of one embodiment of the invention.Power supply turns
Parallel operation 100 include control circuit 110, switching type voltage stabilizer 120, resistance 130, external switch 140,
And switch controller 150.Control circuit 110 is coupled to switching type voltage stabilizer 120, is used for controlling switching
Formula manostat 120 carries out voltage stabilizing process to input voltage, to provide the operation voltage needed for late-class circuit.
Resistance 130 and switch 140 are coupled to control circuit 110, and switch controller 150 is then coupled to switch
140, for controlling to switch the running of 140.When running, power supply changeover device 100 may utilize on-off control
Device 150 decides whether outside synchronizing signal EXT is couple to control circuit 110, to change control
Circuit 110 produces the mode of clock signal CLK.140 are switched when switch controller 150 ends (turn off)
Time, the frequency of the clock signal CLK that control circuit 110 produces, can depend on the electricity of non-essential resistance 130
Resistance size.140 are switched with by outside synchronizing signal EXT when switch controller 150 turns on (turn on)
When being couple to control circuit 110, control circuit 110 can be by clock signal CLK and outside synchronizing signal
EXT synchronizes.
In the present embodiment, control circuit 110 includes control pin (control pin) 111, resistance detecting
Device 112, electric current produce module 113, agitator 114, mode switching circuit (mode-switching
Circuit) 115 and pulse-width regulating device (PWM modulator) 116.Outside control pin 111 is used for coupling
Portion's resistance 130 and external switch 140.Resistance detector 112 is coupled to control pin 111, in control
When making foot 111 is coupled to resistance 130, the resistance value of detecting resistance 130.Electric current produces module 113
It is coupled to resistance detector 112, produces corresponding for the detecting result according to resistance detector 112
Control electric current Iosc.Agitator 114 is coupled to control pin 111 and electric current produces module 113, is used for
Produce clock signal CLK.Mode switching circuit 115 is then coupled to control pin 111 and agitator 114,
For by agitator 114 at resistance control model (resistor-controlled mode) and control pattern signal
Switch between (signal-controlled mode).Pulse-width regulating device 116 is coupled to agitator 114, uses
In producing pulse-width modulation signal PWM according to the clock signal CLK of agitator 114 output, to control to cut
Change the switching frequency of formula manostat 120.
When mode switching circuit 115 arrange agitator 114 operate in resistance control model time, agitator 114
Clock signal CLK can be produced according to controlling electric current Iosc, make the frequency of clock signal CLK corresponding to outward
The resistance value of portion's resistance 130.Signal control is operated in when mode switching circuit 115 arranges agitator 114
During pattern, agitator 114 can produce clock signal CLK, when making according to outer synchronous signal EXT
Arteries and veins signal CLK is synchronized with outer synchronous signal EXT.
In implementation, the difference in functionality square in control circuit 110 can be incorporated in single circuit chip, or
It is to realize with different circuit chips.Such as, can be by the pulse-width regulating device 116 in control circuit 110
Separate and realize with independent circuit chip, and other function block in control circuit 110 is integrated
In another circuit chip.
Fig. 2 is the functional block diagram after an embodiment simplification of the control circuit 110 in Fig. 1.In this reality
Executing in example, resistance detector 112 includes the first comparator 223, transistor 225 and the first switch
227.Transistor 225 and switch 227 are coupled to electric current and produce module 113 and control between pin 111.
The outfan of comparator 223 is coupled to the control end of transistor 225, and the input coupling of comparator 223
It is connected to control pin 111 and the first reference voltage Vf1.Comparator 223 will be for controlling pin 111
Voltage VP and the first reference voltage Vf1 compare, and according to result of the comparison control flow through crystal
The faradic current Ir of pipe 225.Mode switching circuit 115 is coupled to switch the control end of 227, in order to control
The switching of system switch 227.
Agitator 114 in the present embodiment includes the first electric capacity 241, second switch 243, second compares
Device 245 and combinational logic circuit 247.Switch 243 is coupled to electric capacity 241 and produces module with electric current
Between 113, and the control end of switch 243 is coupled to mode switching circuit 115.Switch 243 is for foundation
The control of mode switching circuit 115, is optionally conducting to electric capacity 241 by control electric current Iosc.Relatively
Device 245 is coupled to electric capacity 241 and the second reference voltage Vf2, for by the cross-pressure and second of electric capacity 241
Reference voltage Vf2 compares, to produce comparison signal CMP.Combinational logic circuit 247 is coupled to control
Making foot 111, mode switching circuit 115, pulse-width regulating device 116 and comparator 245, be used for depending on
According to the control of mode switching circuit 115, determine the producing method of clock signal CLK.
In the embodiment of fig. 2, mode switching circuit 115 includes synchronous signal detection device (sync signal
Detector) 251 and in-phase signal generator (in-phase signal) 253.Synchronous signal detection device 251 couples
In controlling pin 111, resistance detector 112 and agitator 114, it is used for detecting control pin 111
Voltage VP, and control resistance detector 112 and the running of agitator 114.In-phase signal generator
253 are coupled to synchronous signal detection device 251 and agitator 114, for according to agitator 114 output time
Arteries and veins signal CLK produces in-phase signal WS identical with clock signal CLK phase place.Such as, with believing
Number generator 253 can produce narrower right of a pulsewidth when the rising edge of each clock signal CLK triggers
Answer pulse wave, using as in-phase signal WS.
Hereinafter collocation Fig. 3～Fig. 4 is further illustrated the function mode of control circuit 110.
Fig. 3 is the sequential chart 300 after a running embodiment simplification of the control circuit 110 in Fig. 2.As
Shown in Fig. 3, when control signal CS is arranged to electronegative potential to end switch 140 by switch controller 150
Time, such as, the period before time T1, outer synchronous signal EXT can't be coupled to control
Pin 111.Now, controlling the voltage VP on pin 111 can be equal to the reference voltage of comparator 223
Vf1.In this stage, the synchronous signal detection device 251 in mode switching circuit 115 can be by agitator
114 are arranged to operate in resistance control model, and control signal RCM is arranged to high potential, with conducting
Switch 227.Now, comparator 223, transistor 225 and switch 227 can form a negative feedback paths,
The size of the faradic current Ir passing through transistor 225 can be inverse ratio with the resistance value of non-essential resistance 130.
Therefore, available resistance detector 112 detects the resistance value size of non-essential resistance 130, with certainly
Fixed corresponding faradic current Ir.Electric current produces module 113 then can produce and flow through the electricity of transistor 225
The control electric current Iosc that stream Ir size is corresponding.Size and the resistance of non-essential resistance 130 due to electric current Ir
Value size is corresponding, therefore the size controlling electric current Iosc also can be with the resistance value size phase of non-essential resistance 130
Corresponding.
In implementation, electric current produces module 113 and can realize with the current mirroring circuit of various frameworks, in order to replicate
Electric current Ir is to produce the control electric current Iosc of identical with electric current Ir size or proportional relation.Such as, at figure
In the embodiment of 3, electric current produces module 113 and includes transistor 231,233, and the second electric capacity 235.
First end of transistor 231 is coupled to the first end of transistor 233, and is coupled to a fixed potential
VCC.Second end of transistor 231 and control end are coupled to resistance detector 112.Transistor 233
Control end and be then coupled to the control end of transistor 231 to form a current mirror framework, in order to resistance will be flowed through
The electric current Ir of detector 112 copies to the second end of transistor 233, controls electric current Iosc to produce.Electricity
One end of appearance 235 is coupled to the first end of transistor 231, and the other end of electric capacity 235 is coupled to crystalline substance
The control end of both body pipes 231 and 233.
When agitator 114 is arranged to operate by the synchronous signal detection device 251 in mode switching circuit 115
When resistance control model, control signal SCM can be set to electronegative potential by synchronous signal detection device 251,
With the switch 243 in conducting agitator 114, control electric current Iosc is made to be conducting to the electricity in agitator 114
Hold 241.Now, synchronous signal detection device 251 also can utilize control signal SCM, by agitator 114
In combinational logic circuit 247 be arranged to according to comparator 245 output comparison signal CMP produce
Clock signal CLK so that the frequency of clock signal CLK can be corresponding to controlling the size of electric current Iosc.
Corresponding with the resistance value size of non-essential resistance 130 owing to controlling the size of electric current Iosc, therefore, combination
The clock signal CLK that logic circuit 247 produces frequency now depends on the resistance value of non-essential resistance 130
Size.
For the producing method of the clock signal CLK that automatically switches, the synchronization letter in mode switching circuit 115
Number detector 251 can detect the change of the voltage VP controlled on pin 111.Once voltage VP deviation one
Preset range, such as, the scope of deviation Vt1～Vt2, synchronous signal detection device 251 will be to voltage
VP carries out the monitoring of a period of time, to determine whether that the change of voltage VP is due to external sync letter
Number EXT is coupled to control pin 111, is also because noise and is caused.
In the fig. 3 embodiment, when control signal CS is switched to by switch controller 150 in time T1
High potential, during to be coupled to control pin 111 by outer synchronous signal EXT by switch 140, controls
Voltage VP on pin 111 can be risen by the waveform influence of outer synchronous signal EXT and start in
The most periodically change.When synchronous signal detection device 251 detects on control pin 111 in time T1
Voltage VP beyond after preset upper limit Vt1, an observation period (observation period) can be entered, and supervise
Survey whether voltage VP starts occur that periodic high electronegative potential changes (transition).
When synchronous signal detection device 251 is in the observation period, in order to avoid controlling the electricity on pin 111
The change of pressure VP has influence on electric current and produces the stability of the control electric current Iosc that module 113 produces, and synchronizes
Signal detection device 251 can be in time entering the observation period (that is when detecting voltage VP deviation preset range), will
Control signal RCM switches to electronegative potential, to end switch 227.Now, by the electric discharge of electric capacity 235,
Can make to control electric current Iosc to remain unchanged.Consequently, it is possible to the seasonal pulse letter that agitator 114 exports just can be made
The frequency of number CLK, maintains the level identical or close with during agitator 114 operation resistance control model.
Can there is one or more times periodically height electricity in detecting voltage VP in synchronous signal detection device 251
During the conversion of position, it is determined that have outer synchronous signal EXT to be coupled to control pin 111.Such as, this enforcement
When synchronous signal detection device 251 in example can occur that 4 second highest electronegative potentials are changed in detecting voltage VP,
It is determined with outer synchronous signal EXT and is coupled to control the situation generation of pin 111.By the time voltage VP
Square wave is identical with the phase place of in-phase signal WS that in-phase signal generator 253 produces or gap
During less than a marginal value, synchronous signal detection device 251 will leave the observation period.In implementation, synchronizing signal
Detector 251 can be when the square wave of voltage VP aligns with the rising edge of in-phase signal WS, it is determined that
Both phase places are identical, or fall at the pulse wave of in-phase signal WS in the rising edge of the square wave of voltage VP
Time in width range, the allot square wave of voltage VP and the phase contrast of in-phase signal WS are away from less than facing
Dividing value.
In the fig. 3 embodiment, when synchronous signal detection device 251 detects voltage VP's in time T2
When square wave aligns with the rising edge of in-phase signal WS, the observation period will be left.Synchronous signal detection
When device 251 leaves the observation period, agitator 114 can be switched to control pattern signal.Such as sequential chart 300
Shown in, control signal SCM now can be switched to high potential by synchronous signal detection device 251, shaking
Swing the combinational logic circuit 247 in device 114 to be arranged to change according to outer synchronous signal EXT to produce synchronization
Clock signal CLK, and stop the output according to comparator 245 to produce clock signal CLK so that
The clock signal CLK that produces under control pattern signal of agitator 114 can be with outer synchronous signal EXT
Synchronize.
When agitator 114 is switched to control pattern signal by synchronous signal detection device 251, synchronizing signal
Detector 251 may utilize the switch 243 in control signal SCM cut-off agitator 114, makes control electric current
Iosc stops the electric capacity 241 being conducting in agitator 114, uses saving agitator 114 and control circuit
110 current drains under control pattern signal.It addition, the in-phase signal in mode switching circuit 115
Generator 253 can also just produce same only within the period that synchronous signal detection device 251 is in the observation period
Phase signals WS, to promote the power saving effect of control circuit 110 further.
Fig. 4 is the sequential chart 400 after another running embodiment simplification of the control circuit 110 in Fig. 2.
The embodiment of Fig. 4 is much like with the embodiment of Fig. 3, and difference is when switch controller 150 is in time T3
Control signal CS is switched to high potential, to be coupled to by switch 140 by outer synchronous signal EXT
When controlling pin 111, controlling the voltage VP on pin 111 can be by the ripple of outer synchronous signal EXT
Shape affects and declines and start to present periodically change.
Draw when the synchronous signal detection device 251 in mode switching circuit 115 detects control in time T3
Voltage VP on foot 111, beyond after pre-determined lower limit Vt2, can enter observation period, and monitoring voltage VP
Whether start occur that periodic high electronegative potential is changed.
Synchronous signal detection device 251 in the present embodiment detects voltage VP in time T4 and the 5th occurs
During the conversion of periodic high electronegative potential, outer synchronous signal EXT can be determined with and be coupled to control pin
The situation of 111 occurs.By the time the in-phase signal that the square wave of voltage VP produces with in-phase signal generator 253
When the phase place identical (such as, when both rising edges align) of both WS or gap are less than a marginal value,
Synchronous signal detection device 251 will leave the observation period.
In the fig. 4 embodiment, voltage VP is detected when synchronous signal detection device 251 is in time T5
The rising edge of square wave when falling in the range of the pulse bandwidth of in-phase signal WS, the observation period will be left.
Other running explanation in the aforementioned embodiment of relevant control circuit 110, is also applied for the reality of Fig. 4
Execute example, therefore not repeated description at this.
In certain embodiments, it is also possible to by the in-phase signal generator 253 in mode switching circuit 115
Omit.In these embodiments, detect, when synchronous signal detection device 251, the electricity controlled on pin 111
After pressure VP deviates preset range and enters the observation period, synchronous signal detection device 251 can be in detecting voltage
When there is the conversion of the most periodic high electronegative potential in VP, it is determined that have outer synchronous signal EXT by coupling
Receive control pin 111.Now, synchronous signal detection device 251 can leave the observation period, and without etc.
Edge pair to in-phase signal WS that the square wave of voltage VP produces with in-phase signal generator 253
Together.
In the embodiment of earlier figures 2, the transistor 225 in resistance detector 112 is disposed on electricity
On current path between the raw module 113 of miscarriage and control pin 111, switch 227 and be then disposed on
On current path between transistor 225 and control pin 111.But this is an embodiment, rather than office
Ration the power supply and hinder the actual embodiment of detector 112.In implementation, also switch 227 can be changed and be arranged at electric current
Produce on the current path between module 113 and transistor 225.It addition, in resistance detector 112
Switch number also can increase according to the needs of circuit design, it is not limited to the number in Fig. 2 embodiment.
Mode switching circuit 115 sets the mode of observation period and can adjust according to the demand of circuit design,
It is not limited to the mode of previous embodiment.Such as, the observation period can also be set by mode switching circuit 115
Surely set time length is become.
Fig. 5 is the functional block diagram after another embodiment simplification of the control circuit 110 in Fig. 1.Fig. 5
In control circuit 110 much like with the control circuit 110 in Fig. 2, one of difference of two embodiments exists
Electric current in Fig. 5 produces module 113 and has additionally comprised bias circuit 537, but eliminates electric capacity 235.Partially
Volt circuit 537 is coupled to control end and the mode switching circuit 115 of transistor 233, for according to pattern
The control of switching circuit 115, optionally applies a predetermined bias to the control end of transistor 233.
Mode switching circuit 115 in Fig. 5 has additionally comprised notification signal generator 555, is coupled to control
Pin 111 and synchronous signal detection device 251, for detecting the square wave of the voltage VP controlled on pin 111
Cycle, and when notification signal generator 555 detects the square-wave cycle of voltage VP more than a predetermined length
Time, the notification signal Tout of correspondence can be produced to synchronous signal detection device 251.
When agitator 114 is arranged to operate by the synchronous signal detection device 251 in mode switching circuit 115
When control pattern signal, multiple square-wave cycle of notification signal generator 555 meeting recording voltage VP
Other time span, and synchronous signal detection device 251 control signal SCM can be switched to high potential,
Start the control end to transistor 233 with control bias circuit 537 and apply predetermined bias.
Hereinafter collocation Fig. 6 is further illustrated the function mode of the control circuit 110 in Fig. 5.
As shown in Figure 6, switch controller 150 in time T6 control signal CS is arranged to electronegative potential with
After cut-off switch 140, outer synchronous signal EXT just stops being coupled to control pin 111.When notice letter
Number generator 555 detects the length of certain square-wave cycle of voltage VP than previous square wave in time T7
When cycle is long, notification signal Tout can be produced to notify synchronous signal detection device 251.
As notified signal Tout, synchronous signal detection device 251 can enter the observation period, and will control
Signal SCM switches to electronegative potential, to turn on the switch 243 in agitator 114, and by agitator 114
In combinational logic circuit 247 be arranged to change and produce according to the comparison signal CMP of comparator 245 output
Raw clock signal CLK.Now, control the electric capacity 241 that electric current Iosc can be conducting in agitator 114,
And control electric current Iosc size be by bias circuit 537 to transistor 233 control end applied inclined
Pressure size determines.Therefore, the frequency size of the clock signal CLK of agitator 114 output, also can take
The bias size certainly in bias circuit 537, the control end of transistor 233 applied.
If voltage VP persistently falls the time in a preset range, exceed the one of clock signal CLK and make a reservation for
The cycle of quantity, then synchronous signal detection device 251 just can determine that outer synchronous signal EXT stops coupling
To controlling pin 111.
Such as, in Fig. 6 embodiment, synchronous signal detection device 251 can continue in detecting voltage VP
Fall 2 cycles that the time in voltage range Vp1～Vp2 exceedes clock signal CLK time, such as exist
During time T8, it is determined that outer synchronous signal EXT has been stopped and has been couple to control pin 111.Now,
As shown in sequential chart 600, synchronous signal detection device 251 can leave the observation period, and is cut by agitator 114
Shift to resistance control model.Meanwhile, control signal RCM can be switched to by synchronous signal detection device 251
High potential, stops being biased the control end of transistor 233 controlling bias circuit 537, and turns on
Switch 227 in resistance detector 112, makes resistance detector 112 start to detect non-essential resistance 130
Resistance value size, to determine electric current Ir and to control the size of electric current Iosc.
In the embodiment in fig 6, the observation period is entered due to agitator 114 in synchronous signal detection device 251
Time (that is time T7) have started to running, so when synchronous signal detection device 251 leaves the observation period (also
I.e. time T8), agitator 114 can be rapidly reached steady state operation so that agitator 114 output time
The frequency of arteries and veins signal CLK can be corresponding to the resistance value size of non-essential resistance 130.
As it was previously stated, synchronous signal detection device 251 meeting is when agitator 114 operates in control pattern signal,
Control bias circuit 537 and the control end of transistor 233 is applied predetermined bias, until agitator 114 quilt
Switch to just stop during resistance control model.Additionally, utilize the bias circuit 537 control to transistor 233
End processed applies the mode of predetermined bias, it is possible to make agitator 114 be switched to resistance control from control pattern signal
During molding formula, the frequency of produced clock signal CLK keeps stable, it is to avoid have influence on rear class
There is start by mistake in pulse-width regulating device 116.
In the embodiment in fig 6, the bias that the control end of transistor 233 is applied by bias circuit 537,
Agitator 114 can be made to be switched to control electric current received during resistance control model at the beginning
Iosc, slightly above agitator 114 reach size during steady state operation.In implementation, it is also possible to by bias plasma
The bias that the control end of transistor 233 is applied by road 537, is designed so that agitator 114 at the beginning
Control electric current Iosc slightly below agitator 114 received when being switched to resistance control model reaches steady
Size during state running.
Control circuit 110 about earlier figures 2 is switched to letter at agitator 114 from resistance control model
The running explanation of the process of number control model, is also applied for the embodiment of Fig. 5, therefore not repeated description at this.
In implementation, synchronous signal detection device 251 can also by agitator 114 from resistance control mode switch to
In observation period between control pattern signal, control bias circuit 537 and the control end of transistor 233 is applied
The mode of predetermined bias, so that the mistake that agitator 114 is from resistance control mode switch to control pattern signal
In journey, the frequency of produced clock signal CLK can keep stable, it is to avoid has influence on the PWM of rear class
There is start by mistake in device 116.
In aforesaid explanation, as long as notification signal generator 555 detects certain square wave of voltage VP
When the length in cycle is longer than previous square-wave cycle, the signal Tout that will give notice is to synchronous signal detection
Device 251.This is an embodiment, rather than the actual embodiment of limitation notification signal generator 555.
Such as, notification signal generator 555 can also be in the length of certain square-wave cycle detecting voltage VP
Longer than previous square-wave cycle more than a predetermined extent time, such as, plural number longer than previous square-wave cycle times
Time, the signal Tout that just gives notice is to synchronous signal detection device 251.Or, notification signal generator 555
The design rule of control circuit 110 can also be exceeded in the length of certain square-wave cycle detecting voltage VP
During the receptible limit of lattice, the signal Tout that just gives notice is to synchronous signal detection device 251.
In aforesaid each embodiment, switch the partial functions such as 140, switch 227 and bias circuit 537
The control signal of square is to represent with the form of high state effectively (active high), and switchs the part merits such as 243
The control signal of energy square is to represent with the form of low state effectively (active low), but this is intended merely to conveniently
Illustrate, not limit to the actual embodiment of the control signal of these function block.
It addition, previous embodiment is used for realize electric current produce the current mirror framework of module 113, simply use
Produce one of many modes of control electric current Iosc, rather than limitation electric current produces the actual reality of module 113
Execute mode.In implementation, it is also possible to utilize more transistor to form the current mirror of different framework, with reality
Existing aforementioned currents produces the function of module 113.
From preceding description, even if switch controller 150 the most actively leads to when switching external switch 140
Knowing control circuit 110, the mode switching circuit 115 in aforementioned control circuit 110 also can Auto-Sensing be
No have outer synchronous signal EXT to be coupled to control pin 111, and switching agitator 114 accordingly
Operator scheme.Therefore, 110 need of control circuit that this case proposes arrange single control pin 111,
Just it is provided that two kinds of different clock signal frequency setting modes, not only gives control circuit 110 higher
Use elasticity, moreover it is possible to effectively simplify required chip package area.
Additionally, when under agitator 114 operates at control pattern signal, be to utilize combinational logic circuit 247
Direct basis outer synchronous signal EXT produces the clock signal CLK of synchronization rather than utilizes phase-locked
The feedback control framework in loop (PLL) or delay-locked loop (DLL) etc locks outer synchronous signal
EXT.Therefore, when agitator 114 is switched to control pattern signal by mode switching circuit 115, shake
Swing device 114 and can promptly clock signal CLK be carried out synchronize with outer synchronous signal EXT, and reach
To more preferably power saving effect.And, the circuit area needed for said oscillator 114 is also phase-locked more than using
The clock pulse generator that loop or delay-locked loop realize comes little, is more beneficial for simplifying control circuit 110
Required circuit area.
Furthermore, owing to aforesaid mode switching circuit 115 is inclined at the voltage VP controlled on pin 111
When preset range, just can enter the change aspect of observation period further monitoring voltage VP, and only exist
Detect voltage VP and occur when the most periodic high electronegative potential is changed, mode switching circuit just meeting
It is determined with outer synchronous signal EXT to be coupled to control pin 111.Therefore, pattern can be prevented effectively to cut
Change circuit 115 because controlling the noise on pin 111 and the feelings of the operator scheme of mistake switching agitator 114
Condition occurs.
The foregoing is only presently preferred embodiments of the present invention, all equivalents done according to the claims in the present invention become
Change and modify, all should belong to the covering scope of the present invention.
Claims (19)
1., for a control circuit for switching type voltage stabilizer, it includes:
One controls pin, is used for coupling a non-essential resistance；
One resistance detector, is coupled to this control pin, for being coupled to this external electrical at this control pin
During resistance, detect the resistance value of this non-essential resistance；
One electric current produces module, is coupled to this resistance detector, for the detecting according to this resistance detector
Result produces a corresponding control electric current；
One agitator, is coupled to this control pin and this electric current produces module, for producing a clock signal；
And
One mode switching circuit, is coupled to this control pin and this agitator；
Wherein when this mode switching circuit arranges this oscillator operation in a resistance control model, this vibration
Device can produce this clock signal according to this control electric current, makes the frequency of this clock signal corresponding to this external electrical
The resistance value of resistance, and when this mode switching circuit arranges this oscillator operation in a control pattern signal,
This agitator can produce this clock signal according to the outer synchronous signal that this control pin is coupled, and makes this
Clock signal is synchronized with this outer synchronous signal；
Wherein this agitator includes:
One first electric capacity；
One second switch, is coupled to this first electric capacity and this electric current produces between module, for according to this mould
The control of formula switching circuit, optionally by this control current lead-through to this first electric capacity；
One second comparator, is coupled to this first electric capacity and one second reference voltage, for by this first electricity
The cross-pressure held compares with this second reference voltage, to produce a comparison signal；And
One combinational logic circuit, is coupled to this control pin, this mode switching circuit and this second ratio
Relatively device, for the control according to this mode switching circuit, produces this clock signal.
2. control circuit as claimed in claim 1, wherein controls in this resistance when this oscillator operation
During pattern, this mode switching circuit can be coupled to this outer synchronous signal at this control pin and reach a period of time
After, this agitator is switched to this control pattern signal.
3. control circuit as claimed in claim 2, wherein controls in this signal when this oscillator operation
During pattern, this mode switching circuit can stop being coupled to this outer synchronous signal at this control pin and reach one section
After time, this agitator is switched to this resistance control model.
4. control circuit as claimed in claim 3, wherein this resistance detector includes:
One first comparator, is coupled to this control pin and one first reference voltage, for this control being drawn
Voltage on foot compares with this first reference voltage；
One transistor, coupled in series produces between module and this control pin in this electric current, and this transistor
The end that controls be coupled to an outfan of this first comparator；And
One first switch, coupled in series produces between module and this control pin in this electric current, and is arranged at
On current path between this control pin of this transistor AND gate, or being arranged at this electric current produces module and is somebody's turn to do
On current path between transistor；
Wherein before this control pin is coupled to this outer synchronous signal, this mode switching circuit can turn on this
First switch, and when the change in voltage on this control pin is more than a preset range, this pattern switching electricity
This first switch can be ended in road.
5. control circuit as claimed in claim 4, wherein this transistor is arranged at this electric current and produces mould
On current path between group and this control pin.
6. control circuit as claimed in claim 5, wherein this electric current produces this control that module produces
Electric current is identical with the faradic current size flowing through this transistor or proportional relation.
7. control circuit as claimed in claim 3, wherein this electric current generation module includes:
One current mirror, includes multiple transistor；And
One bias circuit, is coupled to this mode switching circuit, for the control according to this mode switching circuit,
The control end of one of them transistor of this current mirror is applied a predetermined bias.
8. control circuit as claimed in claim 7, wherein when this mode switching circuit is by this agitator
Being arranged to operate when this control pattern signal, this mode switching circuit can control this bias circuit to this electricity
The control end of one of them transistor of stream mirror applies a predetermined bias.
9. control circuit as claimed in claim 8, wherein at this mode switching circuit by this agitator
A scheduled time slot from this resistance control mode switch to this control pattern signal, this pattern switching electricity
It is predetermined partially to the control end applying one of one of them transistor of this current mirror that road can control this bias circuit
Pressure.
10. control circuit as claimed in claim 9, wherein this electric current generation module has additionally comprised:
One second electric capacity, is coupled to the control end of one of them transistor of this current mirror.
11. control circuits as claimed in claim 1, wherein when this mode switching circuit is by this agitator
When being arranged to operate in this resistance control model, this mode switching circuit can turn on this second switch, and will
This combinational logic circuit is arranged to according to this comparison signal to produce this clock signal.
12. control circuits as claimed in claim 1, wherein when this mode switching circuit is by this agitator
When being arranged to operate in this control pattern signal, this mode switching circuit can end this second switch, and will
This combinational logic circuit is arranged to according to this outer synchronous signal to produce this clock signal.
13. control circuits as claimed in claim 3, wherein this mode switching circuit includes:
One synchronous signal detection device, is coupled to this control pin, this resistance detector and this agitator,
For detecting the voltage on this control pin, and control the running of this resistance detector and this agitator.
14. control circuits as claimed in claim 13, wherein this synchronous signal detection device can be in detecting
When the conversion of the most periodic high electronegative potential occurs in voltage on this control pin, by this agitator
Switch to this control pattern signal.
15. control circuits as claimed in claim 13, wherein this mode switching circuit has additionally comprised:
One in-phase signal generator, is coupled to this synchronous signal detection device and this agitator, for according to being somebody's turn to do
Clock signal produces an in-phase signal identical with this clock signal phase place；
Wherein can there is week one or more times in the voltage detected on this control pin in this synchronous signal detection device
The high electronegative potential conversion of phase property, and the phase of the square wave of the voltage on this control pin and this in-phase signal
When position is identical or gap is less than a marginal value, this agitator is switched to this control pattern signal.
16. control circuits as claimed in claim 15, wherein this mode switching circuit has additionally comprised:
One notification signal generator, is coupled to this control pin and this synchronous signal detection device, is used for detecting
The square-wave cycle of the voltage on this control pin, and the square-wave cycle of the voltage on this control pin exceedes
During one predetermined length, produce the notification signal of a correspondence to this synchronous signal detection device；
Wherein when this synchronous signal detection device receives this notification signal, this agitator can be switched to this electricity
Resistance control model.
17. control circuits as claimed in claim 13, wherein this mode switching circuit has additionally comprised:
One notification signal generator, is coupled to this control pin and this synchronous signal detection device, is used for detecting
The square-wave cycle of the voltage on this control pin, and the square-wave cycle of the voltage on this control pin exceedes
During one predetermined length, produce the notification signal of a correspondence to this synchronous signal detection device；
Wherein when this synchronous signal detection device receives this notification signal, this agitator can be switched to this electricity
Resistance control model.
18. 1 kinds of control circuits for switching type voltage stabilizer, it includes:
One controls pin, is used for coupling a non-essential resistance；
One resistance detector, is coupled to this control pin, for being coupled to this external electrical at this control pin
During resistance, detect the resistance value of this non-essential resistance；
One electric current produces module, is coupled to this resistance detector, for the detecting according to this resistance detector
Result produces a corresponding control electric current；
One agitator, is coupled to this control pin and this electric current produces module, for producing a clock signal；
And
One mode switching circuit, is coupled to this control pin and this agitator；
Wherein when this mode switching circuit arranges this oscillator operation in a resistance control model, this vibration
Device can produce this clock signal according to this control electric current, makes the frequency of this clock signal corresponding to this external electrical
The resistance value of resistance, and when this mode switching circuit arranges this oscillator operation in a control pattern signal,
This agitator can produce this clock signal according to the outer synchronous signal that this control pin is coupled, and makes this
Clock signal is synchronized with this outer synchronous signal；
Wherein when this oscillator operation is in this resistance control model, this mode switching circuit can be in this control
Pin is coupled to after this outer synchronous signal reaches a period of time, this agitator switch to this signal and controls mould
Formula；
Wherein when this oscillator operation is in this control pattern signal, this mode switching circuit can be in this control
Pin stops being coupled to after this outer synchronous signal reaches a period of time, this agitator switching to this resistance control
Molding formula；
Wherein this resistance detector includes:
One first comparator, is coupled to this control pin and one first reference voltage, for this control being drawn
Voltage on foot compares with this first reference voltage；
One transistor, coupled in series produces between module and this control pin in this electric current, and this transistor
The end that controls be coupled to an outfan of this first comparator；And
One first switch, coupled in series produces between module and this control pin in this electric current, and is arranged at
On current path between this control pin of this transistor AND gate, or being arranged at this electric current produces module and is somebody's turn to do
On current path between transistor；
Wherein before this control pin is coupled to this outer synchronous signal, this mode switching circuit can turn on this
First switch, and when the change in voltage on this control pin is more than a preset range, this pattern switching electricity
This first switch can be ended in road.
19. 1 kinds of control circuits for switching type voltage stabilizer, it includes:
One controls pin, is used for coupling a non-essential resistance；
One resistance detector, is coupled to this control pin, for being coupled to this external electrical at this control pin
During resistance, detect the resistance value of this non-essential resistance；
One electric current produces module, is coupled to this resistance detector, for the detecting according to this resistance detector
Result produces a corresponding control electric current；
One agitator, is coupled to this control pin and this electric current produces module, for producing a clock signal；
And
One mode switching circuit, is coupled to this control pin and this agitator；
Wherein when this mode switching circuit arranges this oscillator operation in a resistance control model, this vibration
Device can produce this clock signal according to this control electric current, makes the frequency of this clock signal corresponding to this external electrical
The resistance value of resistance, and when this mode switching circuit arranges this oscillator operation in a control pattern signal,
This agitator can produce this clock signal according to the outer synchronous signal that this control pin is coupled, and makes this
Clock signal is synchronized with this outer synchronous signal；
Wherein when this oscillator operation is in this resistance control model, this mode switching circuit can be in this control
Pin is coupled to after this outer synchronous signal reaches a period of time, this agitator switch to this signal and controls mould
Formula；
Wherein when this oscillator operation is in this control pattern signal, this mode switching circuit can be in this control
Pin stops being coupled to after this outer synchronous signal reaches a period of time, this agitator switching to this resistance control
Molding formula；
Wherein this mode switching circuit includes:
One synchronous signal detection device, is coupled to this control pin, this resistance detector and this agitator,
For detecting the voltage on this control pin, and control the running of this resistance detector and this agitator；With
And
One in-phase signal generator, is coupled to this synchronous signal detection device and this agitator, for according to being somebody's turn to do
Clock signal produces an in-phase signal identical with this clock signal phase place；
Wherein can there is week one or more times in the voltage detected on this control pin in this synchronous signal detection device
The high electronegative potential conversion of phase property, and the phase of the square wave of the voltage on this control pin and this in-phase signal
When position is identical or gap is less than a marginal value, this agitator is switched to this control pattern signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210219976.9A CN103516179B (en) | 2012-06-27 | 2012-06-27 | There is the switching type voltage stabilizer control circuit of multiple clock signal frequency setting mode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210219976.9A CN103516179B (en) | 2012-06-27 | 2012-06-27 | There is the switching type voltage stabilizer control circuit of multiple clock signal frequency setting mode |
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| CN103516179B true CN103516179B (en) | 2016-12-21 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102132628A (en) * | 2008-08-25 | 2011-07-20 | 美信集成产品公司 | Power factor correction in and dimming of solid state lighting devices |
| EP2410821A2 (en) * | 2010-07-20 | 2012-01-25 | Panasonic Electric Works Co., Ltd. | Lighting device of semiconductor light-emitting element and illumination fixture using the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102132628A (en) * | 2008-08-25 | 2011-07-20 | 美信集成产品公司 | Power factor correction in and dimming of solid state lighting devices |
| EP2410821A2 (en) * | 2010-07-20 | 2012-01-25 | Panasonic Electric Works Co., Ltd. | Lighting device of semiconductor light-emitting element and illumination fixture using the same |
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