CN103515294A - Method for manufacturing tungsten plug - Google Patents
Method for manufacturing tungsten plug Download PDFInfo
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- CN103515294A CN103515294A CN201210213955.6A CN201210213955A CN103515294A CN 103515294 A CN103515294 A CN 103515294A CN 201210213955 A CN201210213955 A CN 201210213955A CN 103515294 A CN103515294 A CN 103515294A
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- tungsten
- xenon difluoride
- medium holes
- phase etching
- layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
Abstract
The invention discloses a method for manufacturing a tungsten plug. The method comprises the following steps that; a semiconductor substrate having first conductive layers is provided and a metal interlamination dielectric layer is formed on the first conductive layers; dielectric holes are formed in the metal interlamination dielectric layer and the tops of the first conductive layers are exposed at the bottoms of the dielectric holes; barrier layers are deposited at the whole surface of the metal interlamination dielectric layer and the bottoms and the two side wall surfaces of the dielectric holes; metal tungsten is deposited at the whole surfaces of the barriers as well as in the dielectric holes, wherein at least the dielectric holes are filled with the metal tungsten; all metal tungsten, except the metal tungsten in the dielectric holes, is removed by using a xenon difluoride gaseous phase etching method; and all the barrier layers, except the barrier layers in the dielectric holes, are removed by using the xenon difluoride gaseous phase etching method, so that the metal tungsten kept in the dielectric holes forms tungsten plugs. According to the invention, because all the metal tungsten, except the metal tungsten in the dielectric holes, as well as all the barrier layers, except the barrier layers in the dielectric holes, are removed by using the xenon difluoride gaseous phase etching method, no micro scratching on the semiconductor device is caused and no mechanical stress is generated, thereby substantially improved the performance of the semiconductor device and the yield of the semiconductor device.
Description
Technical field
The present invention relates to semiconductor device processing technology field, relate in particular to a kind of method of making tungsten plug in semiconductor device.
Background technology
In semiconductor device is manufactured, tungsten, because it has good conductivity and step coverage, is often used to make tungsten plug and connects adjacent metal level.
Referring to Fig. 3, is the method for traditional fabrication tungsten plug, and the method comprises the steps:
First, on the first conductive layer of semiconductor substrate, form the dielectric layer between metal layers of a silicon dioxide;
Secondly, use anisotropic dry etch to form medium holes in described dielectric layer between metal layers, the bottom-exposed of described medium holes goes out the top of described the first conductive layer;
Then, in the whole surface of described dielectric layer between metal layers and described medium holes, deposit a barrier layer, described barrier layer is titanium and titanium nitride;
Then, plated metal tungsten in the whole surface on described barrier layer and described medium holes, described tungsten at least fills up described medium holes;
Follow again, by cmp, remove all tungstens the tungsten in medium holes;
Finally, by cmp, remove all barrier layers except medium holes Zhong barrier layer, be retained in the tungsten in described medium holes, form tungsten plug.
Yet, in the manufacturing process of above-mentioned tungsten plug, while adopting cmp to remove tungsten in medium holes and the tungsten barrier layer and barrier layer, be easy to semiconductor device to cause micro-scrape, and then make semiconductor device produce short circuit or open circuit, affect the performance of semiconductor device.For head it off, some new fine abrasives are used in cmp, and, these new fine abrasives can cause some other problemses, as undesirable in uniformity, and production capacity reduces, and control difficulty increase etc.In addition, because the mechanical performance of described the first conductive layer and other dielectric substance layers is more weak, mechanical stress in cmp can cause damage to described the first conductive layer and other dielectric substance layers, thereby reduces the performance of semiconductor device and the yield of reduction semiconductor device.
Summary of the invention
The defect that the object of the invention is to exist for above-mentioned background technology provides a kind of manufacture method of tungsten plug, and the method has significantly improved the performance of semiconductor device and the yield of semiconductor device.
For achieving the above object, the manufacture method of tungsten plug of the present invention, comprises the steps:
Provide and there is the semiconductor base of the first conductive layer and form dielectric layer between metal layers on semiconductor base and the first conductive layer;
In dielectric layer between metal layers, form medium holes, the bottom-exposed of medium holes goes out the top of the first conductive layer;
On the whole surface of dielectric layer between metal layers and the bottom of medium holes and surface deposition barrier layer, two side;
Plated metal tungsten in the whole surface on barrier layer and medium holes, tungsten at least fills up medium holes;
Adopt xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes;
Adopt xenon difluoride gas phase etching method to remove all barrier layers except medium holes Zhong barrier layer, the tungsten being retained in medium holes forms tungsten plug.
In one embodiment, before all tungstens the tungsten of removing in medium holes, on the surface of natural oxidizing layer, pass into hydrogen fluoride gas to remove the natural oxidizing layer on tungsten surface.The surface that the natural oxidizing layer on removal tungsten surface can also be included in natural oxidizing layer passes into xenon difluoride gas and a certain amount of steam simultaneously, and maintains certain hour.
In one embodiment, before all tungstens the tungsten that adopts the removal of xenon difluoride gas phase etching method in medium holes, first find critical temperature Tc, at this critical temperature Tc, the speed of xenon difluoride gas phase etching metal tungsten equates with the speed of xenon difluoride gas phase etching barrier layer, xenon difluoride gas phase etching method is removed the temperature of all tungstens the tungsten in medium holes below Tc, and xenon difluoride gas phase etching method is removed the temperature on all barrier layers except medium holes Zhong barrier layer more than Tc.Critical temperature Tc is 60 ℃ to 300 ℃.Can find critical temperature Tc by sneak into a certain amount of inert gas in xenon difluoride gas.The inert gas of sneaking into is one or several the mist in nitrogen, helium, neon, argon gas and xenon.
In one embodiment, the temperature that adopts xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes is room temperature to 400 ℃, and pressure is that 1 person of outstanding talent's holder is to 20 holders; The temperature that adopts xenon difluoride gas phase etching method to remove all barrier layers except medium holes Zhong barrier layer is 80 ℃ to 400 ℃.The preferred pressure that adopts xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes is that 10 person of outstanding talent's holders are to 10 holders.The material on barrier layer is one or several compositions in titanium, titanium nitride, tantalum and tantalum nitride.
In sum, the manufacture method of tungsten plug of the present invention is by adopting xenon difluoride gas phase etching method to remove tungsten in described medium holes and all tungstens and the barrier layer barrier layer, compare with conventional method, the present invention is in the manufacturing process of tungsten plug, can not cause micro-scrape to semiconductor device, do not have mechanical stress to produce, significantly improved the performance of semiconductor device and the yield of semiconductor device yet.
Accompanying drawing explanation
Figure 1A to 1F is the cross-sectional view of the manufacture method of tungsten plug of the present invention.
Fig. 2 is the schematic diagram that is related between the etch rate of tungsten and titanium nitride and temperature.
Fig. 3 is the method flow diagram of traditional fabrication tungsten plug.
Embodiment
For the object that describes technology contents of the present invention in detail and reach, below in conjunction with embodiment and coordinate graphic detailed description in detail.
Refer to Figure 1A to 1F, show the manufacture method of tungsten plug of the present invention.Particularly, the manufacture method of tungsten plug of the present invention comprises the steps.
Step 1: as shown in Figure 1A, provide one to there is the semiconductor base 10 of the first conductive layer 20, and form a dielectric layer between metal layers 30 on described semiconductor base 10 and described the first conductive layer 20.
Step 2: as shown in Figure 1B, use anisotropic dry etch to form medium holes 40 in described dielectric layer between metal layers 30, the bottom-exposed of described medium holes 40 goes out described the first conductive layer 20 top.
Step 3: as shown in Figure 1 C, on the whole surface of described dielectric layer between metal layers 30 and the bottom of described medium holes 40 and two side surface deposition one barrier layer 50, the material on described barrier layer 50 is that one or several in titanium, titanium nitride, tantalum and tantalum nitride form, and titanium and the titanium nitride the most frequently used barrier material that is tungsten.
Step 4: as shown in Fig. 1 D, at whole surface and the interior plated metal tungsten 60 of described medium holes 40 on described barrier layer 50, described tungsten 60 at least fills up described medium holes 40.
Step 5: as shown in Fig. 1 E, adopt xenon difluoride gas phase etching method to remove all tungstens 60 tungsten 60 in medium holes 40.Generally, after described tungsten 60 is deposited in the whole surface on described barrier layer 50 and described medium holes 40, in the transmitting procedure of described semiconductor base 10, the surface of described tungsten 60 can form one deck natural oxidizing layer, oxide generation chemical reaction due to xenon difluoride gas discord tungsten, therefore the natural oxidizing layer of described tungsten 60 Surface Creations can hinder xenon difluoride gas and reacts with described tungsten 60, thus the speed of tungsten 60 described in reduction xenon difluoride gas etching.In order to improve the etch rate of xenon difluoride gas, before all tungstens 60 the tungsten 60 that adopts the removal of xenon difluoride gas phase etching method in medium holes 40, first the natural oxidizing layer on described tungsten 60 surfaces is removed.The first method of removing described natural oxidizing layer is to pass into hydrogen fluoride gas on the surface of described natural oxidizing layer, thereby hydrogen fluoride gas and described natural oxidizing layer generation chemical reaction are removed described natural oxidizing layer.The second method of removing described natural oxidizing layer is to pass into xenon difluoride gas and a certain amount of steam on the surface of described natural oxidizing layer simultaneously, and maintain certain hour, as 10 seconds to 60 seconds, the xenon difluoride gas passing into is reacted with steam and is generated hydrogen fluoride, thereby the hydrogen fluoride of generation reacts and removes described natural oxidizing layer with described natural oxidizing layer again.Described natural oxidizing layer stops passing into steam after removing, and continues to pass into xenon difluoride gas until all tungstens 60 tungsten 60 in medium holes 40 are removed.Xenon difluoride gas can be spontaneous in certain temperature range there are chemical reactions with tungsten 60, in semiconducter process, the preferred temperature that chemical reaction occurs for xenon difluoride gas and tungsten 60 is room temperature to 400 ℃, and the product that reaction generates is volatilizable WF
6with inert gas xenon, reaction equation is as follows:
W+3XeF
2→WF
6+3Xe
Because xenon difluoride is solid-state at normal temperatures and pressures, therefore above-mentioned reaction occurs under vacuum condition, and pressure is that 1 person of outstanding talent holds in the palm to 20 holders, preferably, is that 10 person of outstanding talent's holders are to 10 holders.
Step 6: as shown in Fig. 1 F, after all tungstens 60 tungsten 60 in medium holes 40 are removed, adopt xenon difluoride gas phase etching method to remove all barrier layers 50 except medium holes 40Zhong barrier layer 50, the tungsten 60 being finally retained in described medium holes 40 forms tungsten plug.Xenon difluoride gas also can be spontaneous with titanium and/or titanium nitride generation chemical reaction.When xenon difluoride gas and described barrier layer 50 react, tungsten 60 in described medium holes 40 also can be etched, if the speed of the speed ratio etching titanium of xenon difluoride gas etching metal tungsten 60 and/or titanium nitride is a lot of soon, such as more than 5 times, xenon difluoride gas is when removing described barrier layer 50 so, tungsten 60 in described medium holes 40 is also removed, and hence one can see that, xenon difluoride gas to the selection of both etch rates than extremely important.As shown in Figure 2, xenon difluoride gas to the etch rate of tungsten 60 along with temperature raises and reduces; On the contrary, xenon difluoride gas increases along with the rising of temperature the etch rate of titanium nitride.Therefore, before step 5, first find a critical temperature Tc, at this critical temperature Tc, xenon difluoride gas equates both etch rates.By great many of experiments, finding critical temperature Tc is 60 ℃ to 300 ℃.Described in xenon difluoride gas etching, the temperature of tungsten 60 is below Tc, and described in xenon difluoride gas etching, the temperature on barrier layer 50 can reach better technological effect when Tc is above, preferably, the temperature of xenon difluoride gas etching barrier layer 50 is 80 ℃ to 400 ℃.In order more easily to find under different technology conditions corresponding Tc, can in xenon difluoride gas, sneak into a certain amount of inert gas, described inert gas can be one or several the mist in nitrogen, helium, neon, argon gas and xenon.Sneaking into of inert gas can change the etch rate of xenon difluoride gas to tungsten 60, titanium and titanium nitride, thereby can within the scope of process conditions, find described Tc widely.
From the above, the manufacture method of tungsten plug of the present invention is by adopting xenon difluoride gas phase etching method to remove all tungsten 60He barrier layer 50 the tungsten 60He barrier layer 50 in described medium holes 40, compare with conventional method, the present invention is in the manufacturing process of tungsten plug, can not cause micro-scrape to semiconductor device, do not have mechanical stress to produce, significantly improved the performance of semiconductor device and the yield of semiconductor device yet.
In sum, the manufacture method of tungsten plug of the present invention illustrates by above-mentioned execution mode and correlative type, concrete, full and accurate exposure correlation technique, those skilled in the art can be implemented according to this.And the above embodiment is just used for illustrating the present invention, rather than be used for limiting of the present invention, interest field of the present invention, should be defined by claim of the present invention.
Claims (10)
1. a manufacture method for tungsten plug, is characterized in that, comprising:
Provide and there is the semiconductor base of the first conductive layer and form dielectric layer between metal layers on described semiconductor base and described the first conductive layer;
In described dielectric layer between metal layers, form medium holes, the bottom-exposed of described medium holes goes out the top of described the first conductive layer;
On the whole surface of described dielectric layer between metal layers and the bottom of described medium holes and surface deposition barrier layer, two side;
Plated metal tungsten in the whole surface on described barrier layer and described medium holes, tungsten at least fills up described medium holes;
Adopt xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes;
Adopt xenon difluoride gas phase etching method to remove all barrier layers except medium holes Zhong barrier layer, the tungsten being retained in described medium holes forms tungsten plug.
2. the manufacture method of tungsten plug according to claim 1, is characterized in that: before all tungstens the tungsten of removing in medium holes, pass into hydrogen fluoride gas to remove the natural oxidizing layer on tungsten surface on the surface of natural oxidizing layer.
3. the manufacture method of tungsten plug according to claim 2, is characterized in that: the surface that the natural oxidizing layer on removal tungsten surface is included in natural oxidizing layer passes into xenon difluoride gas and a certain amount of steam simultaneously, and maintains certain hour.
4. the manufacture method of tungsten plug according to claim 1, it is characterized in that: before all tungstens the tungsten that adopts the removal of xenon difluoride gas phase etching method in medium holes, first find critical temperature Tc, at this critical temperature Tc, the speed of xenon difluoride gas phase etching metal tungsten equates with the speed of xenon difluoride gas phase etching barrier layer, xenon difluoride gas phase etching method is removed the temperature of all tungstens the tungsten in medium holes below Tc, xenon difluoride gas phase etching method is removed the temperature on all barrier layers except medium holes Zhong barrier layer more than Tc.
5. the manufacture method of tungsten plug according to claim 4, is characterized in that: described critical temperature Tc is 60 ℃ to 300 ℃.
6. the manufacture method of tungsten plug according to claim 4, is characterized in that: by sneak into a certain amount of inert gas in xenon difluoride gas, find described critical temperature Tc.
7. the manufacture method of tungsten plug according to claim 6, is characterized in that: the inert gas of sneaking into is one or several the mist in nitrogen, helium, neon, argon gas and xenon.
8. the manufacture method of tungsten plug according to claim 1, is characterized in that:
The temperature that adopts xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes is room temperature to 400 ℃, and pressure is that 1 person of outstanding talent's holder is to 20 holders;
The temperature that adopts xenon difluoride gas phase etching method to remove all barrier layers except medium holes Zhong barrier layer is 80 ℃ to 400 ℃.
9. the manufacture method of tungsten plug according to claim 8, is characterized in that: the pressure that adopts xenon difluoride gas phase etching method to remove all tungstens the tungsten in medium holes is that 10 person of outstanding talent's holders are to 10 holders.
10. the manufacture method of tungsten plug according to claim 8, is characterized in that: the material on described barrier layer is one or several compositions in titanium, titanium nitride, tantalum and tantalum nitride.
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| CN201210213955.6A CN103515294B (en) | 2012-06-26 | 2012-06-26 | The production method of tungsten plug |
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| CN201210213955.6A CN103515294B (en) | 2012-06-26 | 2012-06-26 | The production method of tungsten plug |
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| CN103515294B CN103515294B (en) | 2018-07-06 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050136594A1 (en) * | 2003-12-23 | 2005-06-23 | Hynix Semiconductor Inc. | Method for forming bit-line of semiconductor device |
| CN1740088A (en) * | 2004-08-23 | 2006-03-01 | 台湾积体电路制造股份有限公司 | Mirror process |
| US20060246708A1 (en) * | 2005-04-30 | 2006-11-02 | Hae-Jung Lee | Method for fabricating semiconductor device with metal line |
| CN101882595A (en) * | 2009-05-08 | 2010-11-10 | 盛美半导体设备（上海）有限公司 | Method and device for removing barrier layer |
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2012
- 2012-06-26 CN CN201210213955.6A patent/CN103515294B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050136594A1 (en) * | 2003-12-23 | 2005-06-23 | Hynix Semiconductor Inc. | Method for forming bit-line of semiconductor device |
| CN1740088A (en) * | 2004-08-23 | 2006-03-01 | 台湾积体电路制造股份有限公司 | Mirror process |
| US20060246708A1 (en) * | 2005-04-30 | 2006-11-02 | Hae-Jung Lee | Method for fabricating semiconductor device with metal line |
| CN101882595A (en) * | 2009-05-08 | 2010-11-10 | 盛美半导体设备（上海）有限公司 | Method and device for removing barrier layer |
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| CN103515294B (en) | 2018-07-06 |
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Address after: 201203 building 4, No. 1690, Cailun Road, free trade zone, Pudong New Area, Shanghai Patentee after: Shengmei semiconductor equipment (Shanghai) Co., Ltd Address before: 201203 Shanghai City, Pudong New Area China Zhangjiang High Tech Park of Shanghai Cailun Road No. 1690 building 4 Patentee before: ACM (SHANGHAI) Inc. |
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