CN103513571A - Pulse width modulation device and method with amplitude limiting function - Google Patents
Pulse width modulation device and method with amplitude limiting function Download PDFInfo
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- CN103513571A CN103513571A CN201310430887.3A CN201310430887A CN103513571A CN 103513571 A CN103513571 A CN 103513571A CN 201310430887 A CN201310430887 A CN 201310430887A CN 103513571 A CN103513571 A CN 103513571A
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Abstract
The invention discloses a pulse width modulation device and method with an amplitude limiting function. During software initialization, a pair of duty-ratio limiting registers limit_high and limit_low is arranged. Once a value computed by a system initially, namely a duty register value exceeds the limiting range of the two values, the pulse width modulation device automatically adjusts the duty ratio value to the maximum limit_high register value or the minimum limit_low register value, the software system burden is lowered, and using efficiency is improved.
Description
Technical field
The invention belongs to machine field, be specifically related to a kind of pulse width modulation apparatus with amplitude limit and method.
Background technology
In motor application, the information that can use the electric current of the motor coil of flowing through to provide, estimates motor position, and then according to demand the speed of motor is adjusted.The ishunt value that system gathers according to sampled point, calculates the dutyfactor value that needs adjustment.In application-specific, dutyfactor value need to be subject to the restriction of actual application environment, causes this dutycycle after specific calculating, just can deliver to the output that hardware module removes to realize waveform
Software systems, according to the phase current values collecting at every turn, when calculating the dutycycle in next pwm cycle, need to consider that limiting it is not more than periodic quantity, must not be less than skip distance etc. factor.These factors that need to consider are fixed under certain environment simultaneously, in the conventional method, all need software to carry out identical calculating at every turn.
Realizing in technology of pwm module, hardware need to produce three pairs with the complementary signal at certain hour interval, hardware has a counter first upwards to count down to a definite value and then counts down to 0 downwards, hardware logic can be during counter be greater than the value of fiducial value register configuration, export a high level, a low level of all the other time outputs, finally according to this waveform, be divided into two again, produce an a pair of complementary signal with Dead Time interval, as the T1 of Fig. 4 and T1_n, all the other two pairs of signals in like manner draw.In common system applies, different according to applied environment, may need the dutycycle of configuration to limit, such as limiting it, needs are not more than periodic quantity, must not be less than skip distance etc., all need in the conventional method software through same calculating at every turn, just can draw a final dutyfactor value, this has increased the burden of software systems undoubtedly.
Summary of the invention
The present invention is directed to the problems referred to above, a kind of pulse width modulation apparatus with amplitude limit and method are provided.By software, when the initialization, configure limit register limit_high and the limit_low of a pair of dutycycle.Once the value that system initial calculation goes out is the limited range that duty register exceeds these two values, it is that limit_high register value or minimum limit value are limit_low register value that pulse width modulation apparatus is adjusted to dutyfactor value maximum automatically, alleviate software systems burden, improve service efficiency.
The present invention addresses the above problem adopted technical scheme: a kind of pulse width modulation apparatus with amplitude limit, comprising: limit_high register, limit_low register, duty register, period register and counter module; Described limit_high register, limit_low register and duty register are connected counter module; Described period register connects counter module.
Further, a kind of pulse duration modulation method with amplitude limit, comprises the following steps: software, when initialization, configures limit register limt_high and the limit_low of a pair of dutycycle.Once the value that system initial calculation goes out is the limited range that duty register exceeds these two values, with the pulse width modulation apparatus of amplitude limit, automatically dutyfactor value is adjusted to maximum limit_high register value or minimum limit value limit_low register value, alleviate software systems burden, improve service efficiency.
Advantage of the present invention is: software, when initialization, configures limit register limit_high and the limit_low of a pair of dutycycle.Once the value that system initial calculation goes out is the limited range that duty register exceeds these two values, it is that limit_high register value or minimum limit value are limit_low register value that hardware module is adjusted to dutyfactor value maximum automatically, do not need a large amount of computation process, alleviate software systems burden, improve service efficiency.
Except object described above, feature and advantage, the present invention also has other object, feature and advantage.Below with reference to figure, the present invention is further detailed explanation.
Accompanying drawing explanation
The accompanying drawing that forms the application's a part is used to provide a further understanding of the present invention, and schematic description and description of the present invention is used for explaining the present invention, does not form inappropriate limitation of the present invention.
In the accompanying drawings:
Fig. 1 is the pulse width modulation apparatus inner structure schematic diagram with amplitude limit of the present invention;
Fig. 2 is sequential chart of the present invention;
Fig. 3 is the existing conceptual scheme before the present invention;
Fig. 4 is the prior art sequential chart before the present invention.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the present invention in detail.
With reference to figure 1 and Fig. 2, a kind of pulse width modulation apparatus with amplitude limit as depicted in figs. 1 and 2, comprising: limit_high register, limit_low register, duty register, period register and counter module; Described limit_high register, limit_low register and duty register counter module; Described period register connects counter module.
A pulse duration modulation method with amplitude limit, comprises the following steps: software, when initialization, configures limit register limit_high and the limit_low of a pair of dutycycle.Once the value that system initial calculation goes out is the limited range that duty register exceeds these two values, with the pulse width modulation apparatus of amplitude limit, automatically dutyfactor value being adjusted to maximum is that limit_high register value or minimum limit value are limit_low register value, alleviate software systems burden, improve service efficiency.
As shown in Figure 3, in existing scheme, system, according to the electric bridge bus current ishunt gathering, calculates the dutyfactor value that needs adjustment, such as after the dutycycle of the ub of Fig. 2, the original waveform of output should be as shown in the ub of Fig. 2, consider the restriction of other factors such as dead band, the dutycycle finally obtaining is likely identical with periodic quantity, causes the final complete output low level of ub waveform, obviously in as the application of seven segmentations of Fig. 2, be not allow to occur like this.
With reference to figure 2, as shown in Figure 2, in the present invention, need only and go out a pair of dutycycle upper lower limit value according to calculation of parameter such as actual dead band, cycles, hardware can be according to actual conditions, actual duty cycle is limited in to this scope inner, two vertical lines, i.e. dutycycle restriction value, hardware can be limited in initial duty cycle one side immediate with it automatically like this, and final output waveform is as shown in ub2.
The foregoing is only the preferred embodiments of the present invention, the present invention includes but be not limited to this example, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (2)
1. with a pulse width modulation apparatus for amplitude limit, it is characterized in that, comprising: limit_high register, limit_low register, duty register, period register and counter module; Described limit_high register, limit_low register and duty register are connected counter module; Described period register connects counter module.
2. with a pulse duration modulation method for amplitude limit, it is characterized in that, comprise the following steps: software, when initialization, configures limit register limit_high and the limit_low of a pair of dutycycle.Once the value duty that system initial calculation goes out exceeds the limited range of these two values, with the pulse width modulation apparatus of amplitude limit, automatically dutyfactor value being adjusted to value or the minimum limit value that maximum is limit_high register is the value of limit_low register, alleviate software systems burden, improve service efficiency.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310430887.3A CN103513571A (en) | 2013-09-18 | 2013-09-18 | Pulse width modulation device and method with amplitude limiting function |
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| CN201310430887.3A CN103513571A (en) | 2013-09-18 | 2013-09-18 | Pulse width modulation device and method with amplitude limiting function |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI594561B (en) * | 2015-11-10 | 2017-08-01 | A method and system for adjusting the peak frequency at a duty ratio |
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| CN101645702A (en) * | 2009-08-03 | 2010-02-10 | 和芯微电子(四川)有限公司 | Dutyfactor adjusting method and circuit |
| CN102939708A (en) * | 2010-06-08 | 2013-02-20 | 松下电器产业株式会社 | Motor drive device, brushless motor, and motor drive method |
| US20130234769A1 (en) * | 2012-03-09 | 2013-09-12 | Denso Corporation | Pwm duty cycle converter |
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| CN101166895A (en) * | 2005-05-12 | 2008-04-23 | 康蒂特米克微电子有限公司 | Method and device for electrically actuating a valve with a mechanical closing element |
| CN101141394A (en) * | 2006-09-07 | 2008-03-12 | Sap股份公司 | Duty cycle control for networks of nodes |
| CN101159415A (en) * | 2006-10-04 | 2008-04-09 | 电力集成公司 | Method and apparatus for a power supply controller responsive to a feedforward signal |
| CN101252323A (en) * | 2007-02-20 | 2008-08-27 | 通用汽车环球科技运作公司 | Method and apparatus to reduce PWM voltage distortion in electric drives |
| US20080211550A1 (en) * | 2007-03-02 | 2008-09-04 | Denso Corporation | Noise reduced PWM driver |
| CN101645702A (en) * | 2009-08-03 | 2010-02-10 | 和芯微电子(四川)有限公司 | Dutyfactor adjusting method and circuit |
| CN102939708A (en) * | 2010-06-08 | 2013-02-20 | 松下电器产业株式会社 | Motor drive device, brushless motor, and motor drive method |
| US20130234769A1 (en) * | 2012-03-09 | 2013-09-12 | Denso Corporation | Pwm duty cycle converter |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI594561B (en) * | 2015-11-10 | 2017-08-01 | A method and system for adjusting the peak frequency at a duty ratio | |
| US9825542B2 (en) | 2015-11-10 | 2017-11-21 | On-Bright Electronics (Shanghai) Co., Ltd. | Systems and methods for adjusting peak frequencies with duty cycles |
| US10199946B2 (en) | 2015-11-10 | 2019-02-05 | On-Bright Electronics (Shanghai) Co., Ltd. | Systems and methods for adjusting peak frequencies with duty cycles |
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