CN103473390A - Parameter adjusting circuit for integrated circuit, adjusting module thereof and method for adjusting parameter of integrated circuit - Google Patents
Parameter adjusting circuit for integrated circuit, adjusting module thereof and method for adjusting parameter of integrated circuit Download PDFInfo
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Abstract
The invention discloses an adjusting module for a parameter adjusting circuit of an integrated circuit. The adjusting module is used for receiving an adjusting signal comprising at least two data bits, generating an adjusting coefficient alpha according to the adjusting signal, and adjusting a circuit parameter X by adopting an adjusting formula below together with a preset proportional coefficient beta, so that a reference value Xa based on design is adjusted to a desired value Xb: Xb=(1+alpha)*beta*Xa, wherein the adjusting coefficient alpha is generated in a way that the difference between the data bits of two corresponding adjusting signals of two adjusting coefficients alpha with adjacent numerical values is only one bit. Moreover, the invention further provides an adjusting circuit using the adjusting module and a corresponding adjusting method of the adjusting circuit. When the adjusting module, the adjusting circuit and the adjusting method fail in adjusting, a correct adjusting coefficient can be further obtained for performing secondary adjustment. The economic benefit can be increased.
Description
Technical field
The present invention relates to technical field of integrated circuits, particularly relate to a kind of integrate circuit parameter and trim circuit and trim module, integrate circuit parameter method for repairing and regulating.
Background technology
In integrated circuit (IC) design, when the very high and explained hereafter of the precision of the circuit parameter be designed can't meet this accuracy requirement, usually need to introduce and extra trim circuit to revise process deviation.Trimming circuit generally comprises the burning signal generator module and trims module.
As depicted in figs. 1 and 2, be respectively the burning signal generator module of 4 pins (2 input 2 outputs) and 6 pins (3 input 3 outputs).The burning signal generator module of Fig. 2 of take is example, input pin An(A1～A3) connect respectively pad, output pin Tn(T1～T3) with trim module and be connected.As input pin An(A1～A3) while not dealing with, corresponding output pin Tn(T1～T3) be low level signal 0, as An(A1～A3) making alive or power up after stream carries out burning, and fuse is blown, and the Tn of correspondence is pulled to high level signal 1.Therefore, after An～A1 is carried out to selectively burning, will obtain one group of corresponding burning signal (Tn ... T1), can obtain 2 at most
ngroup burning signal, these signals pass to and trim in module for controlling the desired amplitude that trims.
In trimming module, Xb=(1+ α) * β * Xa, (wherein Xb is the expectation constant parameter, and α trims coefficient, and β is the scale-up factor of Xb to design load Xa, and Xa is reference value or the reference value of design).It is the minimum increment rate of the value of trimming to initial value while trimming that traditional way that trims general employing is exemplified as table 1 and table 2(λ), its basic characteristics are yard (Tn in the continuous variation of α ... T1) be by the variation of 8421 yards.
| T2 | T1 | α |
| 0 | 0 | 0 |
| 0 | 1 | λ |
| 1 | 0 | -λ |
| 1 | 1 | -2λ |
Table 1
| T3 | T2 | T1 | α |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | -3λ |
| 0 | 1 | 0 | -2λ |
| 0 | 1 | 1 | -λ |
| 1 | 0 | 0 | λ |
| 1 | 0 | 1 | 2λ |
| 1 | 1 | 0 | 3λ |
| 1 | 1 | 1 | 4λ |
Table 2
In traditional method for repairing and regulating, can't guarantee in the situation that once trim failure and carry out secondary and trim in order to correct and trim error.That is to say, in the time of in process deviation drops on overriding amplitude range, because once trimming failure, can't carry out secondary and trim corrigendum, reduced the yield of product, can not increase economic efficiency.
As shown in table 2, when amplitude that needs trim is near-2.5 λ, can't determines by α=-2 λ or by the amplitude of α=-3 λ and trim correctly.When having selected to trim by α=-2 λ, and actual needs will cause trimming failure while trimming by α=-3 λ.Worse, because code T3T2T1 corresponding to α=-2 λ is that the code T3T2T1 that 010, α=-3 λ are corresponding is 001, and the T2=1 in code corresponding to α=-2 λ is also that the fuse in corresponding A2 is blown, and can't recover.So can't be more again burning obtain code 001 that (α=-3 λ) are corresponding and carry out secondary and trim to correct and trim failure.
Summary of the invention
Based on this, be necessary to provide a kind of secondary that can carry out to trim to correct the integrate circuit parameter that trims failure and trim circuit.
A kind of integrate circuit parameter trims the module that trims of circuit, comprise trimming signal and producing and trim factor alpha according to the described signal that trims of at least two data bit for receiving, and together with the scale-up factor β set in advance, trim formula below employing circuit parameter X is trimmed, make the reference value Xa based on design be trimmed as expectation value Xb:Xb=(1+ α) * β * Xa; The described factor alpha that trims produces in the following ways: two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one.
In embodiment, the described signal that trims is two data bit T2T1 therein, and for meaning 00,01,10 and 11 4 kind of signal, wherein: the coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ; The coefficient that trims of 10 correspondences is λ; And the coefficient that trims of 11 correspondences is 2 λ.
Therein in embodiment, resistance R 1, resistance R 2, resistance R 3, resistance R 4 and the resistance R 5 of between the input end that is included in described reference value Xa and ground, connecting successively; The described module that trims also comprises the signal selected cell, described signal selected cell comprises: switching tube M11 and switching tube M12, the input end of described switching tube M11 is connected with the common port of resistance R 2 with resistance R 1, the output terminal of described switching tube M11 is connected with the input end of switching tube M12, and the output terminal of described switching tube M12 is connected with the output terminal of expectation value Xb; Switching tube M21 and switching tube M22, the input end of described switching tube M21 is connected with the common port of resistance R 3 with resistance R 2, the output terminal of described switching tube M21 is connected with the input end of switching tube M22, and the output terminal of described switching tube M22 is connected with the output terminal of expectation value Xb; Switching tube M31 and switching tube M32, the input end of described switching tube M31 is connected with the common port of resistance R 4 with resistance R 3, the output terminal of described switching tube M31 is connected with the input end of switching tube M32, and the output terminal of described switching tube M32 is connected with the output terminal of expectation value Xb; Switching tube M41 and switching tube M42, the input end of described switching tube M41 is connected with the common port of resistance R 5 with resistance R 4, the output terminal of described switching tube M41 is connected with the input end of switching tube M42, and the output terminal of described switching tube M42 is connected with the output terminal of expectation value Xb; The control end of described switching tube M11 and switching tube M21 is accepted the described input that trims the data bit T2 in signal, and described data bit T2 also inputs the control end of described switching tube M31 and switching tube M41 after negate; The control end of described switching tube M12 and switching tube M42 is accepted the described input that trims the data bit T1 in signal, and described data bit T1 also inputs the control end of described switching tube M22 and switching tube M32 after negate.
In embodiment, the described signal that trims is three data bit T3T2T1 therein, and for meaning 000,001,010,011,100,101,110,111 8 kind of signal, wherein: the coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 011 correspondence is 2 λ; The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 000 correspondence is 0; The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 110 correspondences is-2 λ; The coefficient that trims of 111 correspondences is-3 λ; And the coefficient that trims of 101 correspondences is-4 λ.
Therein in embodiment, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 8 and the resistance R 9 of between the input end that is included in described reference value Xa and ground, connecting successively; The described module that trims also comprises the signal selected cell, and described signal selected cell comprises: switching tube Mn1, switching tube Mn2 and switching tube Mn3, the integer that wherein n is 1～8; The input end of described switching tube Mn1 is connected with the common port of resistance R (n+1) with resistance R n, the output terminal of described switching tube Mn1 is connected with the input end of switching tube Mn2, the output terminal of described switching tube Mn2 is connected with the input end of switching tube Mn3, and the output terminal of described switching tube Mn3 is connected with the output terminal of expectation value Xb; The control end of described switching tube M51, switching tube M61, switching tube M71 and switching tube M81 is accepted the described input that trims the data bit T3 in signal, and described data bit T3 also inputs the control end of described switching tube M11, switching tube M21, switching tube M31 and switching tube M41 after negate; The control end of described switching tube M12, switching tube M22, switching tube M62 and switching tube M72 is accepted the described input that trims the data bit T2 in signal, and described data bit T2 also inputs the control end of described switching tube M32, switching tube M42, switching tube M52 and switching tube M82 after negate; The control end of described switching tube M23, switching tube M33, switching tube M73 and switching tube M83 is accepted the described input that trims the data bit T1 in signal, and described data bit T1 also inputs the control end of described switching tube M13, switching tube M43, switching tube M53 and switching tube M63 after negate.
A kind of integrate circuit parameter trims circuit, comprise burning signal generator module and the above-mentioned module that trims, described burning signal generator module comprise at least two input pins and with described at least two input pins at least two output pins one to one, described input pin is used for by being applied in voltage or electric current with the fusing internal resistance, and makes corresponding output pin become high level by low level;
The described output pin of module by described burning signal generator module that trim receives the signal that trims that comprises at least two data bit.
Therein in embodiment, described burning signal generator module comprises and the corresponding burning of input pin quantity unit, and described burning unit comprises switching tube MP, pull down resistor and fusing resistor; The input end of described switching tube MP input noble potential VDD, the output terminal of described switching tube MP connects ground connection after described pull down resistor and fusing resistor, the control end ground connection of described switching tube MP successively; The common port of described pull down resistor and fusing resistor is connected with input pin, and the output terminal of described switching tube MP connects in output pin.
A kind of integrate circuit parameter method for repairing and regulating, for comprising burning signal generator module and the circuit that trims that trims module, comprise the steps: the corresponding input pin of burning signal generator module is applied to voltage or the electric current for fusing resistor; Trimming the output pin of circuit by described burning signal generator module receives and trims signal; Trimming circuit produces and to trim factor alpha according to the described signal that trims, and together with the scale-up factor β set in advance, trim formula below employing circuit parameter X is trimmed, make the reference value Xa based on design be trimmed as expectation value Xb:Xb=(1+ α) * β * Xa; The described factor alpha that trims produces in the following ways: two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one; Apply the step for voltage or the electric current of fusing resistor at the described corresponding input pin to the burning signal generator module, two that the numerical value obtained for expectation is adjacent trim coefficient, in the time of need to therefrom selecting, and the preferential resistance of selecting the fusing lesser amt.
In embodiment, the described signal that trims is two data bit T2T1 therein, and for meaning 00,01,10 and 11 4 kind of signal, wherein: the coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ; The coefficient that trims of 10 correspondences is λ; And the coefficient that trims of 11 correspondences is 2 λ.
In embodiment, the described signal that trims is three data bit T3T2T1 therein, and for meaning 000,001,010,011,100,101,110,111 8 kind of signal, wherein: the coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 011 correspondence is 2 λ; The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 000 correspondence is 0; The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 110 correspondences is-2 λ; The coefficient that trims of 111 correspondences is-3 λ; And the coefficient that trims of 101 correspondences is-4 λ.
Above-mentionedly trim module, trim circuit and method for repairing and regulating, only differ a data bit by the signal that trims that coefficient is corresponding that trims that makes adjacent numerical value, when selecting to trim coefficient, preferential select to need fusing resistor less trim coefficient, thereby, when trimming unsuccessfully, can also further obtain the correct coefficient that trims and carry out secondary and trim.Can increase economic efficiency.
The accompanying drawing explanation
The pinouts that Fig. 1 and Fig. 2 are the burning signal generator module;
The module map that trims circuit that Fig. 3 is an embodiment;
Fig. 4 be an embodiment trim the modular circuit structure principle chart;
Fig. 5 a～Fig. 5 d is for receiving and process the signal access way schematic diagram that trims the signal selected cell in module that trims signal of 2 data bit;
What Fig. 6 was another embodiment trims the modular circuit structure principle chart;
Fig. 7 a～Fig. 7 d is for receiving and process the signal access way schematic diagram that trims the signal selected cell in module that trims signal of 3 data bit;
The cut-away view of the burning signal generator module that trims circuit that Fig. 8 is an embodiment;
Fig. 9 is the circuit diagram of realizing that electric current trims;
The method for repairing and regulating process flow diagram that Figure 10 is an embodiment.
Embodiment
Below in conjunction with specific embodiments and the drawings, be further described.
With reference to figure 3, for the circuit that trims that integrate circuit parameter is trimmed, comprise burning signal generator module 100 and trim module 200.In Fig. 3, apply voltage or electric current by the input pin A1 to burning signal generator module 100 and/or A2, can make the fusing of its inner resistance, thereby the output of corresponding output pin T1 and T2 becomes noble potential by electronegative potential, thus produce 00,01,10 and 11 4 kind trim signal.Be appreciated that in other embodiments, burning signal generator module 100 can have n(>=3) individual input pin A1～An and corresponding output pin T1～Tn, thus produce 2
nplant and trim signal.
Wherein, the described factor alpha that trims produces in the following ways: two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one.
In one embodiment, trim signal and be two data bit T2T1(for the sake of simplicity, adopt the output pin mark to mean altogether to trim signal herein), thereby to trim signal can be 00,01,10 and 11 4 kind.Trim between the numerical value of coefficient and usually differ " to the minimum increment rate of initial value ", be made as λ.Therefore, take 0 as starting point, and consider to trim the increase that may occur or the situation of minimizing, can arrange 4 coefficients that trim that differ successively λ to be: 2 λ, λ, 0 and-λ, or λ, 0 ,-λ and-2 λ.
Only differ each other one for making adjacent two of numerical value trim corresponding two data bit that trim signal of factor alpha, can adopt following distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; The coefficient that trims of 11 correspondences is 2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is λ;
The coefficient that trims of 10 correspondences is-λ; The coefficient that trims of 11 correspondences is-2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is λ;
The coefficient that trims of 10 correspondences is-λ; The coefficient that trims of 11 correspondences is 2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; The coefficient that trims of 11 correspondences is-2 λ.
Above-mentioned 4 kinds of different allocation scheme be based on λ be always on the occasion of the time mode that produces, when λ can be for negative value, in fact the first two allocation scheme can be summarized as a kind of.In like manner, the latter two allocation scheme also can be summarized as a kind of when λ can be for negative value.
Like this, take the first allocation scheme as example, visible coefficient 0 and the λ correspondence of trimming trims signal 00 and 01 and only differs one (T2 is identical, the T1 difference), trimming coefficient 0 and-λ correspondence trims signal 00 and 10 and only differs one (T2 is different, T1 is identical), trim coefficient lambda and trim signal 10 and 11 with 2 λ correspondences and only differ one (T2 is identical, the T1 difference).
Thus, trim the some scopes between coefficient and trim direction can't determine the time in these four when trimming amplitude, take the first allocation scheme as example, the amplitude that for example trims is near 1.5 λ, while not knowing that this employing trims coefficient lambda or 2 λ and trimmed, can first choose and trim coefficient lambda and trimmed.Due to trim coefficient lambda corresponding trim signal 10 resistance (being also the resistance that T2 is corresponding) that only needs to fuse, so when trimming unsuccessfully, can be again by another resistance fusing (being also the resistance that T1 is corresponding), obtain trimming signal 11, carry out secondary and trim thereby obtain trimming coefficient 2 λ.
Please refer to Fig. 4, is a kind of circuit structure schematic diagram of realizing above-mentioned the first allocation scheme.As shown in Figure 4, trim resistance R 1, resistance R 2, resistance R 3, resistance R 4 and the resistance R 5 of connecting successively between input end that module 200 is included in described reference value Xa and ground; Also comprise signal selected cell 210.Between signal Xa and ground, the dividing potential drop through each resistance, can obtain a plurality of partial pressure value by the node between resistance.Signal selected cell 210 can be output as Xb according to the input of T2T1 by the partial pressure value of one of them through selecting.
Please refer to Fig. 5 a, signal selected cell 210 comprises switching tube M11, switching tube M12, switching tube M21, switching tube M22, switching tube M31, switching tube M32, switching tube M41 and switching tube M42.
The input end of switching tube M11 is connected with the common port of resistance R 2 with resistance R 1, and the output terminal of switching tube M11 is connected with the input end of switching tube M12, and the output terminal of switching tube M12 is connected with the output terminal of expectation value Xb; The input end of switching tube M21 is connected with the common port of resistance R 3 with resistance R 2, and the output terminal of switching tube M21 is connected with the input end of switching tube M22, and the output terminal of switching tube M22 is connected with the output terminal of expectation value Xb; The input end of switching tube M31 is connected with the common port of resistance R 4 with resistance R 3, and the output terminal of switching tube M31 is connected with the input end of switching tube M32, and the output terminal of switching tube M32 is connected with the output terminal of expectation value Xb; The input end of switching tube M41 is connected with the common port of resistance R 5 with resistance R 4, and the output terminal of switching tube M41 is connected with the input end of switching tube M42, and the output terminal of switching tube M42 is connected with the output terminal of expectation value Xb.
The control end of switching tube M11 and switching tube M21 accepts to trim the input of the data bit T2 in signal, and data bit T2 goes back the control end of input switch pipe M31 and switching tube M41 after negate.The control end of switching tube M12 and switching tube M42 accepts to trim the input of the data bit T1 in signal, and data bit T1 goes back the control end of input switch pipe M22 and switching tube M32 after negate.
Analyze known, when T2T1 is 00, signal selected cell 210 is selected signal netc output, when T2T1 is 01, signal selected cell 210 is selected signal netd output, and when T2T1 is 10, signal selected cell 210 is selected signal netb output, when T2T1 is 11, signal selected cell 210 is selected signal neta output.Resistance R 1～R5 equivalence, signal neta, netb, netc, netd are respectively 4Xa/5,3Xa/5,2Xa/5, Xa/5.
Be appreciated that when adopting other allocation scheme, the mode to each switching tube that only needs the change signal to input is carried out correspondence and is got final product.Particularly, when adopting the present embodiment the second allocation scheme, as shown in Figure 5 b, T2N is input to switching tube M11 and switching tube M21, T2 are input to switching tube M31 and switching tube M41, T1 are input to switching tube M12 and switching tube M42, T1N are input to switching tube M22 and switching tube M32 to input pattern signal.
When adopting the third allocation scheme of the present embodiment, as shown in Figure 5 c, T1 is input to switching tube M11 and switching tube M21, T1N are input to switching tube M31 and switching tube M41, T2 are input to switching tube M12 and switching tube M42, T2N are input to switching tube M22 and switching tube M32 to input pattern signal.
When adopting the 4th kind of allocation scheme of the present embodiment, input pattern signal is as shown in Fig. 5 d, and T1N is input to switching tube M11 and switching tube M21, T1 are input to switching tube M31 and switching tube M41, T2 are input to switching tube M12 and switching tube M42, T2N are input to switching tube M22 and switching tube M32.
In another embodiment, trim signal and be three data bit T3T2T1(for the sake of simplicity, adopt the output pin mark to mean altogether to trim signal herein), thereby to trim signal can be 000,001,010,011,100,101,110 and 111 8 kind.Trim between the numerical value of coefficient and usually differ " to the minimum increment rate of initial value ", be made as λ.Therefore, take 0 as starting point, and consider to trim the increase that may occur or the situation of minimizing, can arrange 8 coefficients that trim that differ successively λ to be: 3 λ, 2 λ, λ, 0 ,-λ ,-2 λ ,-3 λ and-4 λ, or 4 λ, 3 λ, 2 λ, λ, 0 ,-λ ,-2 λ and-3 λ.
Only differ each other one for making adjacent two of numerical value trim corresponding two data bit that trim signal of factor alpha, can adopt following distribution:
The coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; The coefficient that trims of 101 correspondences is-4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is-3 λ; The coefficient that trims of 011 correspondence is-2 λ;
The coefficient that trims of 001 correspondence is-λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is λ; The coefficient that trims of 110 correspondences is 2 λ;
The coefficient that trims of 111 correspondences is 3 λ; The coefficient that trims of 101 correspondences is 4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 110 correspondences is 2 λ;
The coefficient that trims of 100 correspondences is λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 001 correspondence is-λ; The coefficient that trims of 011 correspondence is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; The coefficient that trims of 101 correspondences is-4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is-3 λ; The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 111 correspondences is 3 λ; The coefficient that trims of 101 correspondences is 4 λ.
Above-mentioned 4 kinds of different allocation scheme be based on λ be always on the occasion of the time mode that produces, when λ can be for negative value, in fact the first two allocation scheme can be summarized as a kind of.In like manner, the latter two allocation scheme also can be summarized as a kind of when λ can be for negative value.
In the present embodiment, take the first allocation scheme as example, visible:
Trimming coefficient 3 λ and 2 λ correspondences trims signal 010 and 011 and only differs one (T1);
Trimming coefficient 2 λ and λ correspondence trims signal 011 and 001 and only differs one (T2);
Trimming coefficient lambda and 0 correspondence trims signal 001 and 000 and only differs one (T1);
Trim coefficient 0 and-the λ correspondence trims signal 000 and 100 and only differs one (T3);
Trimming coefficient-λ and-2 λ correspondences trims signal 100 and 110 and only differs one (T2);
Trimming coefficient-2 λ and-3 λ correspondences trims signal 110 and 111 and only differs one (T1);
Trimming coefficient-3 λ and-4 λ correspondences trims signal 111 and 101 and only differs one (T2).
Thus, trim the some scopes between coefficient and trim direction can't determine the time in these four when trimming amplitude, take the first allocation scheme as example, the amplitude that for example trims is near 1.5 λ, while not knowing that this employing trims coefficient lambda or 2 λ and trimmed, can first choose and trim coefficient lambda and trimmed.Due to trim coefficient lambda corresponding trim signal 001 resistance (being also the resistance that T1 is corresponding) that only needs to fuse, so when trimming unsuccessfully, can be again by another resistance fusing (being also the resistance that T2 is corresponding), obtain trimming signal 011, carry out secondary and trim thereby obtain trimming coefficient 2 λ.
Please refer to Fig. 6, is a kind of circuit structure schematic diagram of realizing the present embodiment the first allocation scheme.As shown in Figure 6, trim the resistance R 1～R9 connected successively between input end that module 200 is included in described reference value Xa and ground; Also comprise signal selected cell 210.Between signal Xa and ground, the dividing potential drop through each resistance, can obtain a plurality of partial pressure value by the node between resistance.Signal selected cell 210 can be output as Xb according to the input of T3T2T1 by the partial pressure value of one of them through selecting.
As shown in Figure 7, the signal selected cell comprises: switching tube Mn1, switching tube Mn2 and switching tube Mn3, the integer that wherein n is 1～8.
The input end of switching tube Mn1 is connected with the common port of resistance R (n+1) with resistance R n, the output terminal of switching tube Mn1 is connected with the input end of switching tube Mn2, the output terminal of switching tube Mn2 is connected with the input end of switching tube Mn3, and the output terminal of switching tube Mn3 is connected with the output terminal of expectation value Xb.Be also that " input end of switching tube M11 is connected with the common port of resistance R 2 with resistance R 1, the output terminal of switching tube M11 is connected with the input end of switching tube M12, the output terminal of switching tube M12 is connected with the input end of switching tube M13, the output terminal of switching tube M13 is connected with the output terminal of expectation value Xb ", " input end of switching tube M21 is connected with the common port of resistance R 3 with resistance R 2, the output terminal of switching tube M21 is connected with the input end of switching tube M22, the output terminal of switching tube M22 is connected with the input end of switching tube M23, the output terminal of switching tube M23 is connected with the output terminal of expectation value Xb ", " input end of switching tube M81 is connected with the common port of resistance R 9 with resistance R 8, the output terminal of switching tube M81 is connected with the input end of switching tube M82, the output terminal of switching tube M82 is connected with the input end of switching tube M83, the output terminal of switching tube M83 is connected with the output terminal of expectation value Xb ".
The control end of switching tube M51, switching tube M61, switching tube M71 and switching tube M81 accepts to trim the input of the data bit T3 in signal, and data bit T3 (T3N) after negate goes back the control end of input switch pipe M11, switching tube M21, switching tube M31 and switching tube M41.
The control end of switching tube M12, switching tube M22, switching tube M62 and switching tube M72 accepts to trim the input of the data bit T2 in signal, and data bit T2 (T2N) after negate goes back the control end of input switch pipe M32, switching tube M42, switching tube M52 and switching tube M82.
The control end of switching tube M23, switching tube M33, switching tube M73 and switching tube M83 accepts to trim the input of the data bit T1 in signal, and data bit T1 (T1N) after negate goes back the control end of input switch pipe M13, switching tube M43, switching tube M53 and switching tube M63.
Analyze known, when T3T2T1 is
000the time, signal selected cell 210 is selected signal netd output;
When T3T2T1 is
001the time, signal selected cell 210 is selected signal netc output;
When T3T2T1 is
010the time, signal selected cell 210 is selected signal neta output;
When T3T2T1 is
011the time, signal selected cell 210 is selected signal netb output;
When T3T2T1 is
100the time, signal selected cell 210 is selected signal nete output;
When T3T2T1 is
101the time, signal selected cell 210 is selected signal neth output;
When T3T2T1 is
110the time, signal selected cell 210 is selected signal netf output;
When T3T2T1 is
111the time, signal selected cell 210 is selected signal netg output.
Be appreciated that when adopting other allocation scheme, the mode to each switching tube that only needs the change signal to input is carried out correspondence and is got final product.
Particularly, when adopting the present embodiment the second allocation scheme, input pattern signal as shown in Figure 7b, that is:
T3N is input to switching tube M51, switching tube M61, switching tube M71 and switching tube M81;
T3 is input to switching tube M11, switching tube M21, switching tube M31 and switching tube M41;
T2N is input to switching tube M13, switching tube M43, switching tube M53 and switching tube M63;
T2 is input to switching tube M23, switching tube M33, switching tube M73 and switching tube M83;
T1N is input to switching tube M32, switching tube M42, switching tube M52 and switching tube M82;
T1 is input to switching tube M12, switching tube M22, switching tube M62 and switching tube M72.
When adopting the third allocation scheme of the present embodiment, input pattern signal as shown in Figure 7 c, that is:
T3N is input to switching tube M13, switching tube M43, switching tube M53 and switching tube M63;
T3 is input to switching tube M23, switching tube M33, switching tube M73 and switching tube M83;
T2N is input to switching tube M32, switching tube M42, switching tube M52 and switching tube M82;
T2 is input to switching tube M12, switching tube M22, switching tube M62 and switching tube M72;
T1N is input to switching tube M11, switching tube M21, switching tube M31 and switching tube M41;
T1 is input to switching tube M51, switching tube M61, switching tube M71 and switching tube M81.
When adopting the 4th kind of allocation scheme of the present embodiment, input pattern signal is as shown in Fig. 7 d, that is:
T3N is input to switching tube M32, switching tube M42, switching tube M52 and switching tube M82;
T3 is input to switching tube M12, switching tube M22, switching tube M62 and switching tube M72;
T2N is input to switching tube M13, switching tube M43, switching tube M53 and switching tube M63;
T2 is input to switching tube M23, switching tube M33, switching tube M73 and switching tube M83;
T1N is input to switching tube M51, switching tube M61, switching tube M71 and switching tube M81;
T1 is input to switching tube M11, switching tube M21, switching tube M31 and switching tube M41.
As shown in Figure 8, burning signal generator module 100 comprises and the corresponding burning of input pin quantity unit 110.Burning unit 110 comprises switching tube MP, pull down resistor Rp and fusing resistor Rm.The input end of switching tube MP input noble potential VDD, the output terminal of switching tube MP connects ground connection after pull down resistor Rp and fusing resistor Rm, the control end ground connection of switching tube MP successively.The common port of pull down resistor Rp and fusing resistor Rm is connected with input pin An, and the output terminal of switching tube MP connects in output pin Tn.
When from An, applying certain voltage or electric current, fusing resistor Rm fusing, corresponding Tn output noble potential.
Further, before output Xb, also adopt circuit as shown in Figure 9 to realize that electric current trims, obtain high-precision electric current output.
As shown in figure 10, be the integrate circuit parameter method for repairing and regulating process flow diagram of an embodiment.The method is based on the above-mentioned circuit that trims that comprises burning signal generator module 100 and trim module 200.The method comprises the steps.
Step S101: the corresponding input pin to the burning signal generator module applies voltage or the electric current for fusing resistor.
Step S102: trim the output pin of circuit by described burning signal generator module and receive and trim signal.
Step S103: trim circuit and according to the described signal that trims, the reference value Xa based on design is trimmed as expectation value Xb.Trimming circuit produces and to trim factor alpha according to the described signal that trims, and together with the scale-up factor β set in advance, employing trims formula Xb=(1+ α) * β * Xa circuit parameter X is trimmed, and makes the reference value Xa based on design be trimmed as expectation value Xb.The described factor alpha that trims produces in the following ways: two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one.
Particularly, trim signal and be two data bit T2T1(for the sake of simplicity, adopt the output pin mark to mean altogether to trim signal herein), thereby to trim signal can be 00,01,10 and 11 4 kind.Trim between the numerical value of coefficient and usually differ " to the minimum increment rate of initial value ", be made as λ.Therefore, take 0 as starting point, and consider to trim the increase that may occur or the situation of minimizing, can arrange 4 coefficients that trim that differ successively λ to be: 2 λ, λ, 0 and-λ, or λ, 0 ,-λ and-2 λ.
Only differ each other one for making adjacent two of numerical value trim corresponding two data bit that trim signal of factor alpha, can adopt following distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; The coefficient that trims of 11 correspondences is 2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is λ;
The coefficient that trims of 10 correspondences is-λ; The coefficient that trims of 11 correspondences is-2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is λ;
The coefficient that trims of 10 correspondences is-λ; The coefficient that trims of 11 correspondences is 2 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 00 correspondence is 0; The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; The coefficient that trims of 11 correspondences is-2 λ.
In another embodiment, trim signal and be three data bit T3T2T1(for the sake of simplicity, adopt the output pin mark to mean altogether to trim signal herein), thereby to trim signal can be 000,001,010,011,100,101,110 and 111 8 kind.Trim between the numerical value of coefficient and usually differ " to the minimum increment rate of initial value ", be made as λ.Therefore, take 0 as starting point, and consider to trim the increase that may occur or the situation of minimizing, can arrange 8 coefficients that trim that differ successively λ to be: 3 λ, 2 λ, λ, 0 ,-λ ,-2 λ ,-3 λ and-4 λ, or 4 λ, 3 λ, 2 λ, λ, 0 ,-λ ,-2 λ and-3 λ.
Only differ each other one for making adjacent two of numerical value trim corresponding two data bit that trim signal of factor alpha, can adopt following distribution:
The coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; The coefficient that trims of 101 correspondences is-4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is-3 λ; The coefficient that trims of 011 correspondence is-2 λ;
The coefficient that trims of 001 correspondence is-λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is λ; The coefficient that trims of 110 correspondences is 2 λ;
The coefficient that trims of 111 correspondences is 3 λ; The coefficient that trims of 101 correspondences is 4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is 3 λ; The coefficient that trims of 110 correspondences is 2 λ;
The coefficient that trims of 100 correspondences is λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 001 correspondence is-λ; The coefficient that trims of 011 correspondence is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; The coefficient that trims of 101 correspondences is-4 λ.
Perhaps adopt following the distribution:
The coefficient that trims of 010 correspondence is-3 λ; The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 100 correspondences is-λ; The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 001 correspondence is λ; The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 111 correspondences is 3 λ; The coefficient that trims of 101 correspondences is 4 λ.
Based on above-mentioned, in step S101, two that the numerical value obtained for expectation is adjacent trim coefficient, in the time of need to therefrom selecting, and the preferential resistance of selecting the fusing lesser amt.
The above embodiment has only expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. an integrate circuit parameter trims the module that trims of circuit, comprise trimming signal and producing and trim factor alpha according to the described signal that trims of at least two data bit for receiving, and together with the scale-up factor β set in advance, trim formula below employing circuit parameter X trimmed, make the reference value Xa based on design be trimmed as expectation value Xb:
Xb=(1+α)×β×Xa；
It is characterized in that, the described factor alpha that trims produces in the following ways:
Two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one.
2. integrate circuit parameter according to claim 1 trims the module that trims of circuit, it is characterized in that, the described signal that trims is two data bit T2T1, for meaning 00,01,10 and 11 4 kind of signal, wherein:
The coefficient that trims of 00 correspondence is 0;
The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; And
The coefficient that trims of 11 correspondences is 2 λ.
3. integrate circuit parameter according to claim 2 trims the module that trims of circuit, it is characterized in that, resistance R 1, resistance R 2, resistance R 3, resistance R 4 and the resistance R 5 of between the input end that is included in described reference value Xa and ground, connecting successively;
The described module that trims also comprises the signal selected cell, and described signal selected cell comprises:
Switching tube M11 and switching tube M12, the input end of described switching tube M11 is connected with the common port of resistance R 2 with resistance R 1, the output terminal of described switching tube M11 is connected with the input end of switching tube M12, and the output terminal of described switching tube M12 is connected with the output terminal of expectation value Xb;
Switching tube M21 and switching tube M22, the input end of described switching tube M21 is connected with the common port of resistance R 3 with resistance R 2, the output terminal of described switching tube M21 is connected with the input end of switching tube M22, and the output terminal of described switching tube M22 is connected with the output terminal of expectation value Xb;
Switching tube M31 and switching tube M32, the input end of described switching tube M31 is connected with the common port of resistance R 4 with resistance R 3, the output terminal of described switching tube M31 is connected with the input end of switching tube M32, and the output terminal of described switching tube M32 is connected with the output terminal of expectation value Xb;
Switching tube M41 and switching tube M42, the input end of described switching tube M41 is connected with the common port of resistance R 5 with resistance R 4, the output terminal of described switching tube M41 is connected with the input end of switching tube M42, and the output terminal of described switching tube M42 is connected with the output terminal of expectation value Xb;
The control end of described switching tube M11 and switching tube M21 is accepted the described input that trims the data bit T2 in signal, and described data bit T2 also inputs the control end of described switching tube M31 and switching tube M41 after negate;
The control end of described switching tube M12 and switching tube M42 is accepted the described input that trims the data bit T1 in signal, and described data bit T1 also inputs the control end of described switching tube M22 and switching tube M32 after negate.
4. integrate circuit parameter according to claim 1 trims the module that trims of circuit, it is characterized in that, the described signal that trims is three data bit T3T2T1, for meaning 000,001,010,011,100,101,110,111 8 kind of signal, wherein:
The coefficient that trims of 010 correspondence is 3 λ;
The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 001 correspondence is λ;
The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is-λ;
The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; And
The coefficient that trims of 101 correspondences is-4 λ.
5. integrate circuit parameter according to claim 4 trims the module that trims of circuit, it is characterized in that resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 8 and the resistance R 9 of connecting successively between the input end that is included in described reference value Xa and ground;
The described module that trims also comprises the signal selected cell, and described signal selected cell comprises: switching tube Mn1, switching tube Mn2 and switching tube Mn3, the integer that wherein n is 1～8;
The input end of described switching tube Mn1 is connected with the common port of resistance R (n+1) with resistance R n, the output terminal of described switching tube Mn1 is connected with the input end of switching tube Mn2, the output terminal of described switching tube Mn2 is connected with the input end of switching tube Mn3, and the output terminal of described switching tube Mn3 is connected with the output terminal of expectation value Xb;
The control end of described switching tube M51, switching tube M61, switching tube M71 and switching tube M81 is accepted the described input that trims the data bit T3 in signal, and described data bit T3 also inputs the control end of described switching tube M11, switching tube M21, switching tube M31 and switching tube M41 after negate;
The control end of described switching tube M12, switching tube M22, switching tube M62 and switching tube M72 is accepted the described input that trims the data bit T2 in signal, and described data bit T2 also inputs the control end of described switching tube M32, switching tube M42, switching tube M52 and switching tube M82 after negate;
The control end of described switching tube M23, switching tube M33, switching tube M73 and switching tube M83 is accepted the described input that trims the data bit T1 in signal, and described data bit T1 also inputs the control end of described switching tube M13, switching tube M43, switching tube M53 and switching tube M63 after negate.
6. an integrate circuit parameter trims circuit, comprise the described module that trims of burning signal generator module and claim 1～5 any one, described burning signal generator module comprise at least two input pins and with described at least two input pins at least two output pins one to one, described input pin is used for by being applied in voltage or electric current with the fusing internal resistance, and makes corresponding output pin become high level by low level;
The described output pin of module by described burning signal generator module that trim receives the signal that trims that comprises at least two data bit.
7. integrate circuit parameter according to claim 6 trims circuit, and described burning signal generator module comprises and the corresponding burning of input pin quantity unit, and described burning unit comprises switching tube MP, pull down resistor and fusing resistor; The input end of described switching tube MP input noble potential VDD, the output terminal of described switching tube MP connects ground connection after described pull down resistor and fusing resistor, the control end ground connection of described switching tube MP successively; The common port of described pull down resistor and fusing resistor is connected with input pin, and the output terminal of described switching tube MP connects in output pin.
8. an integrate circuit parameter method for repairing and regulating, for comprising burning signal generator module and the circuit that trims that trims module, comprise the steps:
Corresponding input pin to the burning signal generator module applies voltage or the electric current for fusing resistor;
Trimming the output pin of circuit by described burning signal generator module receives and trims signal;
Trim circuit and produce and to trim factor alpha according to the described signal that trims, and, together with the scale-up factor β set in advance, trim formula below employing circuit parameter X is trimmed, make the reference value Xa based on design be trimmed as expectation value Xb:
Xb=(1+α)×β×Xa；
It is characterized in that, the described factor alpha that trims produces in the following ways: two that numerical value is adjacent trim corresponding two data bit that trim signal of factor alpha and only differ each other one;
Apply the step for voltage or the electric current of fusing resistor at the described corresponding input pin to the burning signal generator module, two that the numerical value obtained for expectation is adjacent trim coefficient, in the time of need to therefrom selecting, and the preferential resistance of selecting the fusing lesser amt.
9. integrate circuit parameter method for repairing and regulating according to claim 8, is characterized in that, the described signal that trims is two data bit T2T1, for meaning 00,01,10 and 11 4 kind of signal, wherein:
The coefficient that trims of 00 correspondence is 0;
The coefficient that trims of 01 correspondence is-λ;
The coefficient that trims of 10 correspondences is λ; And
The coefficient that trims of 11 correspondences is 2 λ.
10. integrate circuit parameter method for repairing and regulating according to claim 8, is characterized in that, the described signal that trims is three data bit T3T2T1, for meaning 000,001,010,011,100,101,110,111 8 kind of signal, wherein:
The coefficient that trims of 010 correspondence is 3 λ;
The coefficient that trims of 011 correspondence is 2 λ;
The coefficient that trims of 001 correspondence is λ;
The coefficient that trims of 000 correspondence is 0;
The coefficient that trims of 100 correspondences is-λ;
The coefficient that trims of 110 correspondences is-2 λ;
The coefficient that trims of 111 correspondences is-3 λ; And
The coefficient that trims of 101 correspondences is-4 λ.
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| CN104656006A (en) * | 2015-01-20 | 2015-05-27 | 辉芒微电子（深圳）有限公司 | Chip parameter trimming circuit, trimming method and chip comprising trimming circuit |
| CN105445648A (en) * | 2015-12-18 | 2016-03-30 | 浙江大华技术股份有限公司 | Testing trimming circuit and integrated circuit |
| CN115202423A (en) * | 2022-07-07 | 2022-10-18 | 芯海科技（深圳）股份有限公司 | Low dropout linear voltage stabilizing circuit |
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| CN1349251A (en) * | 2000-01-24 | 2002-05-15 | 02细微国际股份有限公司 | Circuit and method used for micro-regualtion integrated circuit |
| US20080248601A1 (en) * | 2007-02-13 | 2008-10-09 | Akiko Tsukamoto | Method of fusing trimming for semiconductor device |
| CN101740566A (en) * | 2009-12-21 | 2010-06-16 | 西安电子科技大学 | Current fusing-based polycrystalline fuse circuit |
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| CN1349251A (en) * | 2000-01-24 | 2002-05-15 | 02细微国际股份有限公司 | Circuit and method used for micro-regualtion integrated circuit |
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| CN104656006A (en) * | 2015-01-20 | 2015-05-27 | 辉芒微电子（深圳）有限公司 | Chip parameter trimming circuit, trimming method and chip comprising trimming circuit |
| CN105445648A (en) * | 2015-12-18 | 2016-03-30 | 浙江大华技术股份有限公司 | Testing trimming circuit and integrated circuit |
| CN105445648B (en) * | 2015-12-18 | 2020-04-03 | 浙江大华技术股份有限公司 | Test trimming circuit and integrated circuit |
| CN115202423A (en) * | 2022-07-07 | 2022-10-18 | 芯海科技（深圳）股份有限公司 | Low dropout linear voltage stabilizing circuit |
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