Pure electric automobile AD sample circuit
Technical field
The invention belongs to the electric vehicle motor controller technology, be specifically related to a kind of pure electric automobile AD sample circuit.
Background technology
At present, digital signal processing (Digital Signal Processing is called for short DSP) has become the main flow of signal processing technology.That TMS320 series DSP chip has is cheap, be simple and easy to, by, characteristics such as powerful, become one of the most influential DSP series processors at present.Facing Digital is controlled, the TMS320 series of motion control, have abundant On-Chip peripheral, integrated ADC module, be 12 kernels, built-in pair of sampling holder (S/H), 16 passages, multichannel is selected input, can meet collection, the transformation function of the simulating signals such as controller for motor of pure electric vehicle electric current, voltage.
Pure electric vehicle is the popular domain of research and development, and the application of DSP on electric vehicle motor controller is increasingly extensive.The current signal of pure electric vehicle electric machine controller and the accuracy of voltage signal and actual effect, very crucial for the Electric Machine Control of pure electric vehicle.
Although at present the TMS320 series of DSP can meet the work such as collection, conversion, processing of the signals such as pure electric vehicle electric current, voltage, temperature, but, in actual applications, tend to have many errors because the problems such as technique or hardware wiring cause AD to change, and also there is certain offset error in the AD converter of TMS320 series itself.Therefore, improving the AD conversion accuracy is necessary to the precision that improves whole control system.
For AD, there is this phenomenon of error in conversion, general adopt gathers two-way known reference voltage more, carry out again program calculating in DSP, calculate gain error deviation ratio and migration parameter, the method can take two-way AD passage more, and needs the cost certain hour to come calculated gains error deviation coefficient and migration parameter.
General disposal route: as Fig. 1.
Common method be in order to eliminate gain error and offset error in the AD sampling module, add two-way reference voltage value of being adopted to calculate.As shown in Figure 1, reference voltage 2V and 1.5V.The basic ideas of this method are the calculating of gain coefficient and deviation ratio:
As shown in Figure 2, gain coefficient K=(Ha-La)/(Hr-Lr), Hr is with reference to high voltage, and Lr is low reference voltage, and Ha is corresponding sampling high-voltage value, and La is corresponding sampling low voltage value.Deviation ratio P=La-KLr, K is gain coefficient.
The digital value that AD is converted to like this can be proofreaied and correct with following formula: U=KUs+P, U is the magnitude of voltage after proofreading and correct.Us is sampled value.
There are following three weak points in existing method:
(1) need to take the two-way sampling channel more make reference the voltage input;
(2) before each AD sampling transforms, need first according to two-way reference voltage sampled value, to be calculated, gain coefficient and deviation ratio, increased so undoubtedly the operand of program and increased the program duration;
(3) if due to the sporadic AD sample offset that system is unstable or hardware problem causes, said method can not solve.
Summary of the invention
The purpose of this invention is to provide a kind of pure electric automobile AD sample circuit, can reduce gain error and the skew of AD conversion, and do too much calculations of offset without program, can improve the accuracy of sampling, ageing.
Pure electric automobile of the present invention AD sample circuit, comprise sensor, subtraction circuit, dsp chip, comparator circuit and reference voltage circuit;
Described dsp chip comprises AD sampling module and PWM output module;
The output terminal of described sensor is connected with the input end of subtraction circuit, comparator circuit respectively, the output terminal of described subtraction circuit is connected with the AD sampling module of dsp chip, the PWM output module of dsp chip is connected with the input end of described comparator circuit, the output terminal of described comparator circuit is connected with the IO mouth of dsp chip and the input end of reference voltage circuit respectively, and the output terminal of described reference voltage circuit is connected with the input end of subtraction circuit;
Described sensor is by the analog voltage A difference input subtraction circuit and the comparator circuit that gather, the correction voltage value A0 exported after the subtraction circuit correction enters the AD sampling module of dsp chip, and by an analog voltage A1 of PWM output module output, analog voltage A1 and analog voltage A enter comparator circuit and compare, when analog voltage A1 is greater than analog voltage A, comparator circuit is exported high level and output reference voltage VCE after the reference voltage circuit dividing potential drop, reference voltage VCE carries out the next round feedback regulation with the input that former simulation voltage A forms subtraction circuit jointly again, until analog voltage A1 is less than or equal to former simulation magnitude of voltage A, now, the comparator circuit output low level, when detecting this low level by the IO mouth, dsp chip controls AD sampling module collection correction voltage value A0 now.
Described dsp chip is TMS320C28XX series.
The output terminal of described subtraction circuit also connects a negative circuit, and the reference voltage VCE of the analog voltage A that described sensor gathers and rear class feedback, as the input of subtraction circuit, exports correction voltage value A0 after subtraction circuit, negative circuit, and A0=A-VCE.
The output terminal of the PWM output module of described dsp chip also connects a low-pass filter, and described correction voltage value A0 obtains analog voltage A1 successively after AD sampling module, PWM output module and low-pass filter are processed.Described correction voltage value A0 transforms and to obtain a digital value through the AD sampling module, and this digital value is exported as a PWM dutycycle divided by being assigned to the PWM output module after 4095, finally by obtaining analog voltage A1 after low-pass filter filtering.
The in-phase end of described comparator circuit is connected with the PWM output module of dsp chip, the end of oppisite phase of described comparator circuit is connected with sensor, when analog voltage A1 is greater than analog voltage A, the high level that the comparator circuit output voltage values is B, when analog voltage A1 is less than or equal to analog voltage A, comparator circuit output is close to the low level of 0V.
Described reference voltage circuit is a bleeder circuit, and the magnitude of voltage B of described comparator circuit output draws VCE after the bleeder circuit dividing potential drop.
The present invention has the following advantages: the reference voltage VCE of the analog voltage A that sensor is passed back and rear class feedback enters subtraction circuit, the correction voltage value A0 of subtraction circuit output enters the AD sampling module of dsp chip, and obtain an analog voltage A1 by the DA circuit formed by the PWM output module, analog voltage A1 and analog voltage A enter comparator circuit, whether comparator circuit determines output reference voltage VCE or output O according to the size of analog voltage A1 and analog voltage A, reference voltage level VCE forms the input of subtraction circuit more jointly with analog voltage A, whole circuit forms a closed loop circuit, output analog voltage A1 capable of dynamic is regulated, until reach an equilibrium point, be that analog voltage A1 equals correction voltage value A0, the curve that finally makes sampling obtain infinitely approaches ideal curve, reach mobile equilibrium, the present invention can effectively reduce gain error and the skew of AD conversion, and does too much calculations of offset without program, has greatly improved the accuracy of sampling, ageing, and this circuit is simple, practical, easy to implement.
The accompanying drawing explanation
Fig. 1 is existing AD sample circuit block diagram;
Fig. 2 is existing AD sampling error figure (that is: ADC curve of output);
Fig. 3 is structured flowchart of the present invention;
Fig. 4 is subtraction circuit schematic diagram in the present invention;
Fig. 5 is the DA output principle figure of PWM module in the present invention;
Fig. 6 is comparator circuit schematic diagram in the present invention;
Fig. 7 is reference voltage circuit schematic diagram in the present invention;
Fig. 8 is AD Sampling and Correcting schematic diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described:
The AD sample circuit of pure electric automobile as shown in Figure 3, comprise sensor 1, subtraction circuit 2, dsp chip, comparator circuit 6 and reference voltage circuit 3;
Described dsp chip is TMS320C28XX series, and described dsp chip comprises AD sampling module 4 and PWM output module 5; Shown in AD sampling module 4 be 12 kernels, built-in pair of sampling holder (S/H), analog input requires 0, in 3V, 16 passages are arranged, multichannel is selected input;
The output terminal of described sensor 1 is connected with the input end of subtraction circuit 2, comparator circuit 6 respectively, the output terminal of described subtraction circuit 2 is connected with the AD sampling module 4 of dsp chip, the PWM output module 5 of dsp chip is connected with the input end of described comparator circuit 6, the output terminal of described comparator circuit 6 is connected with the input end of reference voltage circuit 3 with the IO mouth of dsp chip respectively, and the output terminal of described reference voltage circuit 3 is connected with the input end of subtraction circuit 2;
Described sensor 1 is by the analog voltage A difference input subtraction circuit 2 and the comparator circuit 6 that gather, after subtraction circuit 2 is revised, the correction voltage value A0 of output enters the AD sampling module 4 of dsp chip, and by an analog voltage A1 of PWM output module 5 outputs, analog voltage A1 and analog voltage A enter comparator circuit 6 and compare, when analog voltage A1 is greater than analog voltage A, comparator circuit 6 is exported high level and output reference voltage VCE after reference voltage circuit 3 dividing potential drops, reference voltage VCE carries out the next round feedback regulation with the input that former simulation magnitude of voltage A forms subtraction circuit 2 jointly again, until analog voltage A1 is less than or equal to former simulation magnitude of voltage A, now, comparator circuit 6 output low levels, when detecting this low level by the IO mouth, dsp chip controls the correction voltage value A0 that AD sampling module 4 gathers now, whole circuit forms a closed loop circuit, and output analog voltage A1 capable of dynamic is regulated, until reach an equilibrium point, net result is that the curve that sampling obtains infinitely approaches ideal curve, reaches mobile equilibrium.
As shown in Figure 4, the output terminal of described subtraction circuit 2 also connects a negative circuit, also be provided with a RC filtering circuit between subtraction circuit 2 and negative circuit, described subtraction circuit comprises amplifier and resistance R 1, R2, R3, R4, described RC filtering circuit comprises resistance R 5 and capacitor C 1, described negative circuit comprises resistance amplifier and resistance R 6, R7, R8, wherein amplifier adopts AD822 or other automotive grade amplifier, subtraction circuit output voltage U o=(R2/R1) (VCE-A), in this example, R1, R2, R3, R4 are 1K, therefore Uo=VCE-A; Uo after the filtering of RC filtering circuit as the input of negative circuit, output voltage A0=-(R7/R6) Uo after negative circuit is anti-phase, in this example, R6, R7 are 1K, therefore A0=A-VCE.
As shown in Figure 5, the output terminal of the PWM output module 5 of described dsp chip also connects a low-pass filter, described correction voltage value A0 transforms and obtains a digital value through AD sampling module 4, and this digital value is exported as a PWM dutycycle divided by being assigned to PWM output module 5 after 4095, finally by obtaining analog voltage A1 after low-pass filter filtering.
Described low-pass filter comprises this schmitt trigger SN74LVC2G14, resistance R 9 and capacitor C 2, C3, C4, wherein, resistance R 9 and capacitor C 4 form a first-order filtering circuit, and the effect of Schmidt trigger SN74LVC2G14 is to keep the PWM waveform stabilization, eliminates burr.Realize the method for pwm signal to D/A conversion output: adopt simulation low-pass filter to filter the HFS of PWM output, the DC component that retains low-frequency range, can obtain corresponding D/A output, and the bandwidth of low-pass filter has determined the bandwidth range of D/A output.That is: as long as change the dutycycle of pwm signal, just can obtain voltage range is that the 0 D/A conversion of arriving 3.3V is exported.
As shown in Figure 6, described comparator circuit 6 comprises comparer LM193D, resistance R 10, R11 and capacitor C 5, C6, C7, the in-phase end of described comparator circuit 6 is connected with the PWM output module 5 of dsp chip, the end of oppisite phase of described comparator circuit 6 is connected with sensor 1, analog voltage A is through resistance R 10, enter the crus secunda of comparer LM193D after capacitor C 5 filtering, analog voltage A1 is through resistance R 11, enter the tripod of comparer LM193D after capacitor C 6 filtering, when analog voltage A1 is greater than analog voltage A, the high level that comparator circuit 6 output voltage values are B, the supply voltage that B is comparer LM193D, in the present embodiment, the supply voltage of comparer LM193D is 5V, when analog voltage A1 is less than or equal to analog voltage A, comparator circuit 6 outputs are close to the low level of 0V, about 100mv.
As shown in Figure 7, described reference voltage circuit 3 is a bleeder circuit, this bleeder circuit comprises resistance R 12, R13, R14, magnitude of voltage B to described comparator circuit 6 outputs carries out voltage division processing, empty breakpoint in Fig. 7 is an input stage in subtraction circuit 2, resolution due to power amplifier, the output terminal of described comparator circuit 6 forms a loop to the GNDC of reference voltage circuit 3, VCE=(R14/(R12+R13+R14)) * B, wherein, R12 is 48K, R13 is 1K, R14 is 1K, when analog voltage A1 is greater than analog voltage A, B is 5V, be VCE=0.1V, when analog voltage A1 is less than or equal to analog voltage A, comparator circuit 6 outputs are close to the low level of 0V, and approximately 100mv, because approach very much 0 after the bleeder circuit dividing potential drop, do not feed back so this 100mv can not have influence on rear class.
As shown in Figure 8, below take input analog voltage value A and the present invention be specifically described as 2V, analog voltage A obtains digital signal after entering the AD sampling module 4 of dsp chip, transform and obtain analog quantity Y1 through DA 2V, what now Y1 reacted is that a true AD conversion values adds an error amount.But should be also 2V according to desirable AD curve output, so this error amount Y1-2 is calculated, input as a subtracter, with former simulation magnitude of voltage A do poor, obtaining new input signal is correction voltage value A0=X1=2-(Y1-2), correction voltage value A0 is output analog voltage A1 after dsp chip is processed again, now, analog voltage A1 again with former simulation magnitude of voltage A as the difference input comparator, if analog voltage A1 still is greater than analog voltage A, enter the next round feedback regulation, continuation reduces the size of input correction voltage value A0 by reference to voltage VCE, as through overregulating, analog voltage A1 is less than or equal to former simulation magnitude of voltage A, comparer output low level, and now, reference voltage VCE is output as 0.Now, the low level signal of access comparer output is through the IO interface identification of DSP, and the numerical variable that DSP inside collects is the G point in Fig. 8, is the true samples value, and consistent with ideal curve.