CN103460387A - Electrode structures for arrays of nanostructures and methods thereof - Google Patents

Electrode structures for arrays of nanostructures and methods thereof Download PDF

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CN103460387A
CN103460387A CN2012800167545A CN201280016754A CN103460387A CN 103460387 A CN103460387 A CN 103460387A CN 2012800167545 A CN2012800167545 A CN 2012800167545A CN 201280016754 A CN201280016754 A CN 201280016754A CN 103460387 A CN103460387 A CN 103460387A
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contact layer
nano wire
contact
scope
nano
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马修·L·斯卡林
马达夫·A·卡里
亚当·洛里默
塞尔文·姆肯海恩
加布里埃尔·马特斯
贾斯汀·泰内斯·卡德尔
芭芭拉·瓦克尔
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Alphabet Energy Inc
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    • HELECTRICITY
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    • H10N10/00Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
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    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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Abstract

A thermoelectric device and methods thereof are provided. The thermoelectric device includes nanowires, a contact layer, and a shunt. Each of the nanowires includes a first end and a second end. The contact layer electrically couples the nanowires through at least the first end of each of the nanowires. The shunt is electrically coupled to the contact layer. All of the nanowires are substantially parallel to each other. A first contact resistivity between the first end and the contact layer ranges from 10<-13> [omega]-m<2> to 10<-7> [omega]-m<2>. A first work function between the first end and the contact layer is less than 0.8 electron volts. The contact layer is associated with a first thermal resistance ranging from 10<-2> K/W to 10<10> K/W.

Description

Electrode structure and method thereof for nano-structure array
Technical field
The application requires the U.S. Provisional Application No.61/438 of the common transfer of submission on February 2nd, 2011, and 709 priority is for all purposes, incorporated herein by reference by it.The application still is filed in the U.S. Patent application No.13/331 on December 20th, 2011,768 part continuation application, this application requires the U.S. Provisional Application No.61/425 of the common transfer of submission on December 21st, 2010,362 priority, for all purposes, that it is incorporated herein by reference.
In addition, the application relates to U.S. Patent application No.12/299, and 179 and No.13/308,945, it is attached to herein for all purposes by reference.
Working portion as herein described is supported by USAF SBIR contract number W911QY10-C-0063 and W11QY-11-C-0027.Therefore, U.S. government enjoys some right to the present invention.
The present invention is directed to nanostructure.More specifically, the invention provides electrode structure and the method thereof for nano-structure array.Only in the mode of example, the present invention be applied to be embedded in one or more packing materials, the belt electrode structure, be used in the nano-structure array in thermoelectric device.Yet, need to recognize, the present invention has the application of wider scope, includes but not limited to for solar electric power, battery electrode and/or energy storage, catalysis and/or light-emitting diode.
Background technology
Thermoelectric material is in the situation that solid state and do not have movable part for example can for example, will considerable thermal energy be converted to electric power or for example, at the lower material that aspirates heat of applied electric field (Peltier effect) applied temperature gradient (Seebeck effect) is lower.The application of solid state heat force engine is a large amount of, comprises from being no matter once or the various thermals source of waste heat source generate electricity, and cooling space or object such as microchip and transducer.Owing to having the enhancing thermoelectricity capability, (for example efficiency, power density or thermoelectric figure of merit feeding ZT, wherein ZT equals S to part 2σ/k and S are Seebeck coefficients, σ is conductivity, and k is the thermal conductivity of thermoelectric material) the progress of nano structural material, and due to for using used heat as power recovery to improve energy efficiency or the cooling integrated circuit increase needs with the system of improving its performance, use is comprised to the concern of the thermoelectric device of thermoelectric material increases in recent years.
So far, thermoelectricity has limited commercial suitability because of these devices with realizing the poor cost-performance that energy generates or other technology of the similar means of refrigeration is compared.In the situation that other technology is adapted at using in light and low area occupied application unlike thermoelectricity usually equally, yet usually being subject to its sky high cost, thermoelectricity limits.Realize aspect the serviceability of thermoelectricity importantly comprising the manufacturability of the device (for example module) of high performance thermoelectric material in business application.These modules preferably guarantee that according to making with minimum cost for example the mode of maximum performance produces.
Current can with the business electrothermal module in thermoelectric material generally by be all poisonous, be difficult to manufacture and obtain the bismuth telluride high with processing cost or lead telluride forms.Along with the current strong needs to alternative power generation and miniature level cooling capacity, height can be manufactured, motive force low-cost, the high-performance thermoelectricity increases.
Thermoelectric device usually divides and serves as reasons such as Bi 2te 3that form, that electrically contact and the thermoelectric leg for example, for example, in refrigeration (Peltier) or power conversion (Seebeck) device assembling with the conventional thermoelectric material of PbTe and so on.This usually relates to and joins thermoelectric leg to hard contact in the configuration of the electrical connection that allows configured in series, provides heat configuration in parallel, so that set up the temperature gradient across all branches simultaneously simultaneously.But many shortcomings are present in the generation of conventional thermoelectric device.For example, usually higher with the cost of processing and the outside thermoelectric leg formed of assembling is associated.Conventional treatment or assemble method usually make and are difficult to manufacture the required mini thermoelectric heat device of many thermoelectric applications.Conventional thermoelectric material is normally poisonous and expensive.
Nanostructure usually refers to for example to be had, at least one measured physical dimension of nanoscale (between 0.1nm and 1000nm).For example, nano wire is characterized by has a kind of area of section, its have the opposite side distance measured at nanoscale from, even the length of nano wire may be quite long.In another example, nanotube or hollow Nano line are characterised in that to have a kind of wall thickness and total cross-sectional area, its have the opposite side distance measured at nanoscale from, even the length of nanotube may be quite long.In another example, nano-pore is characterized by the space with a kind of area of section, wherein have the opposite side distance measured at nanoscale from, even the length of nano-pore may be quite long.In another example, the nanometer net is a kind of array sometimes interlinked, and comprises a plurality of other nanostructures such as nano wire, nanotube and/or nano-pore.
Nanostructure has shown that for improving thermoelectricity capability be likely.Create from thermoelectric material thermoelectric power generation or the cooling effectiveness that 0D, 1D or 2D nanostructure can be improved that material in some cases, and highly significant (100 or the above factor) sometimes in other cases.But, in comprising actual macroscopical thermoelectric device of many nanostructures, aspect alignment, scale and the mechanical strength of required nanostructure, have many restrictions.With the processing to silicon, similar method is processed this class nanostructure and can be had the significant cost benefit.For example, create the smooth semiconductor processes of nano-structure array support such as metallization with flat surfaces etc.
Therefore, greatly expect that material from having favourable electricity, heat and engineering properties forms these nano-structure arrays and is used in thermoelectric device.
Summary of the invention
The present invention is directed to nanostructure.More specifically, the invention provides electrode structure and the method thereof for nano-structure array.Only in the mode of example, the present invention be applied to be embedded in one or more packing materials, the belt electrode structure, be used in the nano-structure array in thermoelectric device.Yet, need to recognize, the present invention has the applicability of wider scope, includes but not limited to for solar electric power, battery electrode and/or energy storage, catalysis and/or light-emitting diode.
According to an embodiment, thermoelectric device comprises nano wire, contact layer and shunt.Each nano wire comprises first end and the second end.Contact layer electrically connects nano wire via at least first end of each nano wire.Shunt is electrically coupled to contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and contact layer is less than 0.8 electron-volt.Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.
According to another embodiment, thermoelectric device comprises nano wire, the first electrode structure and the second electrode structure.Each nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects nano wire via at least the second end of each nano wire, and the second shunt is electrically coupled to the second contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the second end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
According to another embodiment, thermoelectric device comprises the first nano wire, the first electrode structure, second nano wire and second electrode structure different from the first nano wire.Each first nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.The second end is electrically coupled to the 4th end.
According to another embodiment, thermoelectric device comprises first nano wire relevant to the first side of substrate, the first electrode structure, second nano wire and second electrode structure relevant to the second side of substrate.Each first nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.The second nano wire is different from the first nano wire.The second side is relative with the first side.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises formation nano wire, deposition contact layer and forms shunt.Each nano wire comprises first end and the second end.Contact layer electrically connects nano wire via at least first end of each nano wire.Shunt is electrically coupled to contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and contact layer is less than 0.8 electron-volt.Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises the formation nano wire, forms the first electrode structure, and forms the second electrode structure.Each nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects nano wire via at least the second end of each nano wire, and the second shunt is electrically coupled to the second contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the second end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
In yet another embodiment, a kind of method for the manufacture of thermoelectric device comprises formation the first nano wire, forms the first electrode structure, forms second nano wire different from the first nano wire, forms the second electrode structure, and electrically connects the second end to the four ends.Each first nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises the first nano wire that formation is relevant to the first side of substrate, forms the first electrode structure, forms second metal wire relevant to the second side of substrate, and forms the second electrode structure.Each first nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.The second nano wire is different from the first nano wire.The second side is relative with the first side.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, this method is according at least Figure 19 realization.
According to embodiment, can realize the one or more of these beneficial effects.With reference to following the detailed description and the accompanying drawings, can complete understanding these beneficial effects of the present invention and various additional purpose, feature and advantage.
The accompanying drawing explanation
Fig. 1 is the simplification view that has shown the nano-wire array of belt electrode structure according to an embodiment of the invention.
Fig. 2 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.
Fig. 3 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.
Fig. 4 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.
Fig. 5 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.
Fig. 6 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.
Fig. 7 A is the simplification view that has shown thermoelectric device pillar according to an embodiment of the invention.
Fig. 7 B is the simplification view that has shown the part of thermoelectric device according to an embodiment of the invention.
Fig. 8 A has shown the simplification view of thermoelectric device pillar in accordance with another embodiment of the present invention.
Fig. 8 B has shown the simplification view of the part of thermoelectric device in accordance with another embodiment of the present invention.
Fig. 9 A has shown the simplification view of thermoelectric device pillar in accordance with another embodiment of the present invention.
Fig. 9 B has shown the simplification view of the part of thermoelectric device in accordance with another embodiment of the present invention.
Figure 10 has shown the simplification view that is used to form the method for the electrode structure on nano-structure array according to an embodiment of the invention.
Figure 11 be shown according to an embodiment of the invention, as the simplification view of a part, the process that be used to form the nano-structure array in one or more substrates of the method that is used to form the electrode structure on nano-structure array.
Figure 12 A be shown for according to an embodiment of the invention, as the part of the method that is used to form the electrode structure on nano-structure array, for the simplification view of the substrate of process that substrate is provided.
Figure 12 B be shown according to an embodiment of the invention, by a part, the process as shown in figure 11 of the method as being used to form the electrode structure on nano-structure array, form the simplification view of nano-structure array in substrate.
Figure 13 be shown according to an embodiment of the invention, as the part of the method that is used to form the electrode structure on nano-structure array, for the simplification view of the process at substrate filled with nanostructures array.
Figure 14 be according to an embodiment of the invention, by a part, the simplification view that is filled in the nano-structure array in substrate that process in Figure 13 forms of the method as being used to form the electrode structure on nano-structure array.
Figure 15 be shown according to an embodiment of the invention, as the part of the method that is used to form the electrode structure on nano-structure array, for the simplification view of the process that forms one or more contact layers on nano-structure array.
Figure 16 A be according to an embodiment of the invention, by the part of the method as being used to form the electrode structure on nano-structure array, planarization forms in substrate, has filled and the simplification view of the nano-structure array of complanation.
Figure 16 B be according to an embodiment of the invention, by the method as being used to form the electrode structure on nano-structure array a part, that for the process that exposes the nanostructure section, form, fill and complanation, with the simplification view of the nano-structure array of exposed length.
Figure 17 A has shown that according to an embodiment of the invention, conduct is used to form a part, the scanning electron microscopy picture nano-structure array surface before the exposed length that exposes nano-structure array of the method for the electrode structure on nano-structure array.
Figure 17 B has shown that according to an embodiment of the invention, conduct is used to form a part, the scanning electron microscopy picture after the exposed length that exposes nano-structure array, the nano-structure array surface of the method for the electrode structure on nano-structure array.
Figure 18 is the simplification view that has shown in accordance with another embodiment of the present invention, has been used to form the method for the electrode structure on nano-structure array.
Figure 19 is the simplification view that has shown in accordance with another embodiment of the present invention, has been used to form the method for the electrode structure on nano-structure array.
Figure 20 be according to an embodiment of the invention, by the part of the method as being used to form the electrode structure on nano-structure array, for the relative both sides in substrate form that the process of nano-structure array forms, with the simplification view of the substrate of the nano-wire array on the relative both sides of substrate.
Figure 21 A and 21B have shown for fixing thermoelectricity cross-sectional area, simplification view for different electrode structure thickness, TEG power with respect to the curve of plant bulk.
Figure 22 A and 22B have shown at fixing cross-sectional area, simplification view for different electrode structure thickness, TEG power with respect to the curve of plant bulk.
Embodiment
The present invention is directed to nanostructure.More specifically, the invention provides electrode structure and the method thereof for nano-structure array.Only in the mode of example, the present invention be applied to be embedded in one or more packing materials, the belt electrode structure, be used in the nano-structure array in thermoelectric device.Yet, need to recognize, the present invention has the applicability of wider scope, includes but not limited to for solar electric power, battery electrode and/or energy storage, catalysis and/or light-emitting diode.
In general, the serviceability of thermoelectric material depends on the physical geometry of material.For example, the surface area of the thermoelectric material provided in the hot and cold side of thermoelectric device is larger, and the ability that thermoelectric material supports heat and/or energy to transmit by the increase of power density is larger.In another example, the hot side of thermoelectric material and the suitable minimum range between cold side (that is, the length of thermoelectricity nanostructure) help to support better the higher thermal gradient across thermoelectric device.This can increase again the ability of supporting that by increasing power density heat and/or energy transmit.
The thermoelectricity nanostructure of one type is the nano-wire array with suitable thermoelectric property.Nano wire can have favourable thermoelectric property, but so far, and conventional nano wire and nano-wire array are being restricted because of the reduced size of array and the short length of made nano wire aspect its adaptability of technology always.Nanostructure with another kind of type of thermoelectricity applicability is nano-pore or nanometer net.Nano-pore or nanometer net array are also because wherein creating or the small size of synthetic these nanostructures has limited applicability.For example, the conventional nanostructure that is shorter in length than 100 μ m has limited applicability aspect generating and/or hot-plug, and be shorter in length than the conventional nanostructure of 10 μ m because keep across these short length by the available heat switching technology or the ability of setting up temperature gradient is greatly reduced, and applicability is less.In addition, in another example, the array that is less than the wafer size of 4,6,8 and 12 inches commercially is restricted.
The exploitation of the large array of the formed overlength nanostructure of the semi-conducting material of use such as silicon can be useful in forming thermoelectric device.For example, there is low heat conductivity and the silicon nanostructure that forms can be used in a plurality of thermoelectric elements that are formed for making the single-wafer thermoelectric device in the presumptive area of semiconductor base.In another example, the silicon nanowires formed in the presumptive area of semiconductor base can be as the N-shaped in the assembled heat electric installation or p-type branch or both.
But, in forming and utilizing nano-structure array, usually have many difficulties.For example, nanostructure is usually crisp, and can be easy to bending or fracture.In another example, nanostructure can not be applied directly to the high temperature surface.In another example, nanostructure can not be exposed to adverse circumstances.In another example, nanostructure needs supporting material to form the required reliable planar metal contact of thermoelectric applications.Therefore, nano-structure array can benefit to embed in suitable matrix.
More specifically, according to some embodiment, nanostructure need to meet the electrode structure of complexity and potential competition demand.For example, electrode structure itself should have the low contact resistance with nanostructure.In another example, electrode structure should have low work function at the nanostructure boundary.In another example, the conductance that electrode structure should provide in the same pillar of thermoelectric device, between the end of nanostructure.In another example, electrode structure props up intercolumniation in the difference of thermoelectric device should provide interconnection (it has low resistance).In another example, electrode structure should have high thermal conductivity and/or should have low thermal resistance.In another example, electrode structure should stand the high temperature that thermoelectric device may expose.Unfortunately, be difficult to find the homogenous material of the desirable physics of the band be used in thermoelectric device and chemical attribute, because required temperature range, geometry, size and combination electricity and hot attribute.Therefore, according to some embodiment, with the electrode structure of a plurality of collaborative materials, to realizing required, target is useful.
According to some embodiment, if a plurality of material, for electrode structure, can bring the considerations of more physics, electricity, chemical aspect.Link and/or the bonding that for example, between a plurality of materials, at (one or more) point of interface place, will have.In another example, between a plurality of materials, to there is low thermal expansion not mate.In another example, storeroom diffusion that will be limited between a plurality of materials.Therefore, according to some embodiment, the little electrode structure be formed centrally is useful to nano-structure array.
Fig. 1 is the simplification view that has shown the nano-wire array of belt electrode structure according to an embodiment of the invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 1, nano-wire array 110 is formed on (for example, semiconductor base) in the semi-conducting material piece.In one example, semiconductor base is whole wafer.In another example, semiconductor base is 4 inches wafers.In another example, semiconductor base is panel, and it is greater than 4 inches wafers.In another example, semiconductor base is 6 inches wafers.In another example, semiconductor base is 8 inches wafers.In another example, semiconductor base is 12 inches wafers.In another example, semiconductor base is panel, and it is greater than 12 inches wafers.In another example, semiconductor base is the shape of non-wafer.In another example, semiconductor base is single crystals.In another example, semiconductor base is many crystallizations.In another example, semiconductor base comprises silicon.
In certain embodiments, semiconductor base is through functionalization.For example, semiconductor base through overdoping to form the N-shaped semiconductor.In another example, semiconductor base through overdoping to form the p-type semiconductor.In another example, semiconductor base adulterates with III family and/or V group element.In another example, semiconductor base is through functionalization, in order to control electricity and/or the thermal property of semiconductor base.In another example, semiconductor base comprises the silicon doped with boron.In another example, semiconductor base is through overdoping, in order to the resistivity of semiconductor base is adjusted between about 0.00001 Ω-m and 3000 Ω-m.In another example, semiconductor base is through functionalization, in order to provide the thermal conductivity between 0.1 watt every meter every degree Kelvin and 500 watts every meter every degree Kelvin for nano-structure array 110.
In other embodiments, nano-structure array 110 forms in semiconductor base.For example, nano-structure array 110 is all forming in semiconductor base basically.In another example, nano-structure array 110 comprises a plurality of nanostructures 120.In another example, each of a plurality of nanostructures 120 has end 130.In another example, the common array area that forms in the end 130 of a plurality of nanostructures 120.In another example, array area is 0.01mm * 0.01mm.In another example, array area is 0.1mm * 0.1mm.In another example, the diameter of array area is 450mm.In another example, the distance between the opposite end 140 of each of the end 130 of a plurality of nanostructures 120 and each of a plurality of nanostructure 120 is at least 200 μ m.In another example, the distance between the opposite end 140 of each of the end 130 of a plurality of nanostructures 120 and each of a plurality of nanostructure 120 is at least 300 μ m.In another example, the distance between the opposite end 140 of each of the end 130 of a plurality of nanostructures 120 and each of a plurality of nanostructure 120 is at least 400 μ m.In another example, the distance between the opposite end 140 of each of the end 130 of a plurality of nanostructures 120 and each of a plurality of nanostructure 120 is at least 500 μ m.In another example, the distance between the opposite end 140 of each of the end 130 of a plurality of nanostructures 120 and each of a plurality of nanostructure 120 is at least 525 μ m.
In another example, all nano wires of a plurality of nano wires 120 are arranged essentially parallel to each other.In another example, a plurality of nano wires 120 substantially perpendicularly form at semiconductor base.In another example, a plurality of nano wires 120 are substantially perpendicular to array area and come directed.In another example, each of a plurality of nano wires 120 has rough surface.In another example, each of a plurality of nano wires 120 comprises the area of uniform cross-section basically with big-length area of section ratio.In another example, the area of section of each of a plurality of nano wires 120 of cross-sectional area is circular basically.In another example, the cross-sectional area of each of a plurality of nano wires 120 at opposite side 1nm between 250nm.
In further embodiments, a plurality of nano wires 120 have corresponding spacing 150 between them.For example each corresponding spacing 150 at opposite side 25nm between 1000nm.In another example, corresponding spacing 150 is filled with one or more packing materials 160 basically.In another example, one or more packing materials 160 form matrix.In another example, matrix is porous.In another example, one or more packing materials 160 have low thermal conductivity.In another example, thermal conductivity is between 0.0001W/ (mK) and 50W/ (mK).In another example, thermal conductivity is less than 1W/ (mK).In another example, one or more packing materials 160 provide additional mechanical stability to a plurality of nano wires 120.In another example, one or more packing materials 160 can the device work the prolongation cycle in bearing temperature over 350 ℃.In another example, one or more packing materials 160 can the device work the prolongation cycle in bearing temperature over 550 ℃.In another example, one or more packing materials 160 can the device work the prolongation cycle in bearing temperature over 650 ℃.In another example, one or more packing materials 160 can bearing temperature over 750 ℃.In another example, one or more packing materials 160 can bearing temperature over 800 ℃.In another example, one or more packing materials 160 have low thermal linear expansion coefficient.In another example, thermal linear expansion coefficient is between 0.01 μ m/mK and 30 μ m/mK.In another example, one or more packing materials 160 can be flattened.In another example, one or more packing materials 160 can polishing.In another example, one or more packing materials 160 provide support base portion for allowing above other material is placed on.In another example, one or more packing materials 160 are conductive.In another example, one or more packing materials 160 are supported the formation contacted with the good electric of a plurality of nano wires 120.In another example, the formation of the good thermo-contact of one or more packing materials 160 supports and a plurality of nano wires 120.
In another embodiment, one or more packing materials comprise at least one that choose in the group from being comprised of photoresist, spin coating (spin-on) glass, spin coating dopant, aeroge, xerogel and oxide etc. separately.For example, one or more photoresists comprise that long UV wavelength G linear light causes resist.For example, photoresist comprises long UV wavelength G line (for example about 436nm) photoresist.In another example, photoresist has the negative photoresist characteristic.In another example, photoresist presents the excellent adhesion of the various backing materials to comprising Si, GaAs, InP and glass.In another example, photoresist has excellent adhesion to the various metals that comprise Au, Cu and Al.In another example, spin-coating glass has high-k.In another example, the spin coating dopant comprises N-shaped and/or p-type dopant.In another example, apply to the spin coating dopant areas, wherein in the different area of nano-structure array, there is different dopant.In another example, the spin coating dopant comprises boron and/or phosphorus etc.In another example, spin-coating glass comprises one or more spin coating dopants.In another example, aeroge is drawn by the silica gel that is characterised in that about 0.1W/ (mK) and lower utmost point low heat conductivity.In another example, one or more packing materials comprise the long-chain of one or more oxides.In another example, oxide comprises Al 2o 3, FeO, FeO 2, Fe 2o 3, TiO, TiO 2, ZrO 2, ZnO, HfO 2, CrO, Ta 2o 5, SiN, TiN, BN, SiO 2, AlN, CN etc.
According to some embodiment, one or more packing materials 160 are also not exclusively filled the corresponding spacing 150 between a plurality of nano wires 120.In one example, end 130 extends beyond one or more packing materials 160 to form nose section 135.In another example, end 130, opposed end 140, and one or more packing material 160 limits along a plurality of zones of length of each of a plurality of nano wires 120.In another example, from end, 130 extend to one or more packing materials 160 and approach the zone on surface of end 130 most corresponding to nose section 135.
According to some embodiment, nano-wire array 110 is embedded in one or more packing materials 160 has advantageous feature.The nano-wire array 110 for example embedded aligns well.In another example, the nano-wire array 110 of embedding stands high-temperature gradient and is not bad.In another example, the nano-wire array 110 of embedding does not stand high-temperature gradient and is crooked or damage a plurality of nano wires 120.In another example, the enhance mechanical strength of the nano-wire array 110 of embedding allows to carry out one or more surface finish and/or planarization on one or more surfaces of the nano-wire array 110 embedded.In another example, the enhance mechanical strength of the nano-wire array 110 of embedding provides support on the nano-wire array 110 embedding, carrying out processing, machine work and/or manufacture process.In another example, nose section 135 is supported one or more electricity and/or the formation contacted one or more heat with nano-wire array 110.
According to some embodiment, electrode structure 195 is formed on nano-wire array 110.For example each nose section 135 partially or even wholly covers with corresponding semiconductor contact material 170.In another example, the conformal coating that semiconductor contact material 170 forms on corresponding nose section 135.In another example, semiconductor contact material 170 forms layer.In certain embodiments, semiconductor contact material 170 comprises one or more conductive materials separately.For example, one or more conductive materials comprise at least one being selected from the group that comprises semiconductor, semimetal, metal etc.In another example, semiconductor is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As, In etc. separately.In another example, semiconductor adulterates.In another example, semimetal is selected from the group that comprises B, Ge, Si, Sn etc.In another example, metal is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, WSi etc.
In another example, semiconductor contact material 170 forms with the one or more of end 130 of a plurality of nano wires 120 and electrically contacts.In another example, one or more ohmic contact of the end 130 of 170 formation of semiconductor contact material and a plurality of nano wires 120.In another example, semiconductor contact material 170 is configured to form one or more good thermo-contact with one or more surfaces for setting up the one or more hot paths via one or more groups a plurality of nano wires 120, and the heat limited in one or more packing materials 160 is revealed.In another example, semiconductor contact material 170 has the low contact resistivity with nose section 135.In another example, contact resistivity is less than 10 -7Ω-m 2.In another example, contact resistivity is 10 -13Ω-m 2with 10 -7Ω-m 2between.In another example, semiconductor contact material 170 has the low work function between semiconductor contact material 170 and nose section 135.In another example, work function is less than 0.8 electron-volt.In another example, semiconductor contact material 170 has almost the same with a plurality of nano wires 120 thermal expansion.In another example, semiconductor contact material 170 has the thermal expansion between 0.4 μ m/ (mK) and 25 μ m/ (mK).
According to some embodiment, contact layer 174 forms to provide the electrical connection between each nose section 135 in nano-wire array 110.For example, nano-wire array forms the part of the pillar of thermoelectric device.In another example, contact layer 174 has 10 6s/m and 10 8conductance between S/m.In another example, contact layer 174 has high thermal conductivity.In another example, thermal conductivity is greater than 1W/ (mK).In another example, contact layer has low thermal resistance.In another example, thermal resistance between 10 -2k/W and 10 10k/W.In another example, contact layer 174 comprises one or more conductive materials.For example, one or more conductive materials comprise at least one being selected from the group that comprises semiconductor, semimetal, metal etc.In another example, semiconductor is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As, In etc. separately.In another example, semiconductor adulterates.In another example, semimetal is selected from the group that comprises B, Ge, Si, Sn etc.In another example, metal is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, WSi etc.In another example, contact layer 174 approaches the thickness of 50nm.In another example, contact layer 174 has the thickness between 1nm and 100,000nm.
According to some embodiment, contact layer 174 utilizes one or more link materials 172 to be attached on semiconductor contact material 170.In one example, link material 172 and form layer.In another example, link material 172 and comprise the soldering scolder.In another example, the soldering scolder comprises coming at least one material of the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, link material 172 and comprise that brazing material comprises coming at least one material of the group of self-contained Ga, Ge, Ag, Au, Pt etc.In another example, link material 172 and comprise the silver-base metal adhesive.In another example, link material 172 and there is 100nm or less thickness.In another example, link material 172 and there is 1000nm or less thickness.Link material 172 and there is the thermal expansion between 0.4 μ m/ (mK) and 25 μ m/ (mK) in another example.In another example, link material 172 and there is low thermal resistance.In another example, thermal resistance is 10 -2k/W and 10 10between K/W.In another example, link material 172 and there is low sheet resistance.In another example, sheet resistance is 10 -10between Ω/ and 10 Ω/ (ohms per square).
According to some embodiment, shunt 180 forms to be provided at the electrical connection between other devices in contact layer 174 and thermoelectric device.For example, other devices comprise one or more contact layers of other pillars of thermoelectric device.In another example, shunt 180 forms layer.In another example, shunt 180 has low sheet resistance.In another example, sheet resistance is 10 -10between Ω/ and 10 Ω/.In another example, shunt 180 comprises one or more conductive materials.In another example, one or more conductive materials comprise that at least one is selected from the group of alloy of comprising Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, NiSi, WSi, graphite, steel, dilval, cobalt chromium ferronickel molybdenum manganese etc.In another example, dilval is alloy 42, and it comprises about 42% nickel, about 57% iron, and the carbon of trace, manganese, phosphorus, sulphur, silicon, chromium, aluminium and/or cobalt (on weight).In another example, the alloy of cobalt chromium ferronickel molybdenum manganese is Egiloy, and it comprises about 39-41% cobalt, about 19-21% chromium, about 14-16% nickel, about 11.3-20.5% iron, approximately 6-8% molybdenum, and/or about 1.5-2.5% manganese (on weight).In another example, shunt 180 has thickness between 1nm and 100, the 000nm.
According to some embodiment, shunt 180 is attached to and utilizes one or more link material 185 contact layers 170.In one example, link material 185 and form layer.In another example, link material 185 and comprise the soldering scolder.In another example, the soldering scolder comprises coming at least one material of the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, link material 185 and comprise brazing material, it comprises coming at least one material of the group of self-contained Ga, Ge, Si, Ag, Au, Pt etc.In another example, link material 185 and comprise the silver-base metal adhesive.In another example, link material 185 and there is 100nm or less thickness.In another example, link material 185 and there is 1000nm or less thickness.Link material 185 and there is the thermal expansion between 0.4 μ m/ (mK) and 25 μ m/ (mK) in another example.In another example, link material 185 and there is low thermal resistance.In another example, thermal resistance is 10 -2k/W and 10 10between K/W.In another example, link material 185 and there is low sheet resistance.In another example, sheet resistance is 10 -10between Ω/ and 10 Ω/.
According to some embodiment, insulating barrier 190 protection shunts 180.For example, insulating barrier 190 provides electric insulation to shunt 180.In another example, insulating barrier 190 reduces the possibility of shunt 180 meeting short circuits on other conduction surfaces.In another example, insulating barrier 190 has at least high resistance of 1M Ω.In another example, insulating barrier 190 has at least thermal conductivity of 2W/ (mK) (that is, every meter every degree Kelvin of watt).In another example, insulating barrier 190 has 100nm or less thickness.In another example, insulating barrier 190 comprises being selected from and comprises SiO 2, Si 3n 4, SiN, Al 2o 3etc. one or more materials of group.In another example, insulating barrier 190 is attached to shunt 180.In another example, insulating barrier 190 is parts of heat exchanger, and thermoelectric device uses in this heat exchanger.
According to some embodiment, each layer that is selected from the group that comprises semiconductor contact material 170, link material 172, contact layer 172, link material 185, shunt 180 and insulating barrier 190 has the suitable material attribute be used in thermoelectric device.For example, these layers jointly form the electrode structure 195 of the end that is applicable to the thermoelectric device B-C post.In another example, electrode structure 195 has scope from tens microns to the general thickness that surpasses 10cm.In another example, electrode structure 195 is based on required heat exchanger condition, target surface temperature, and/or nano wire attribute and optimizing.In another example, electrode structure 195 is optimized with for maximum heat electric generator (TEG) power.
In another example, each layer has the bonds well of the material in the adjacent layer of electrode structure 195.In another example, there is the low variation of the thermal linear expansion coefficient between adjacent layer.In another example, each layer has the thermal linear expansion coefficient between 0.01 μ m/ (mK) and 30 μ m/ (mK).
In another example, the thermal conductivity of electrode structure is at 1W/ (mK) and 1000W/ (between mK.In another example, electrode structure 195 can the device work the prolongation cycle in bearing temperature over 350 ℃.In another example, electrode structure 195 can the device work the prolongation cycle in bearing temperature over 550 ℃.In another example, electrode structure 195 can the device work the prolongation cycle in bearing temperature over 650 ℃.In another example, electrode structure 195 can bearing temperature over 750 ℃.In another example, electrode structure 195 can bearing temperature over 800 ℃.
In another example, diffusion-barrier coating be formed on any other two-layer between.In another example, be selected from and comprise semiconductor contact material 170, link material 172, contact layer 172, link material 185, and arbitrary layer of the group of shunt 180 is diffusion-barrier coatings.
According to other embodiment, the one or more layers that are selected from the list electrode structure 195 that comprises semiconductor contact material 170, link material 172, contact layer 172, link material 185, shunt 180 and insulating barrier 190 are optional.
Fig. 2 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 2, link material 185 and dispense from electrode structure 295.For example, electrode structure 295 comprises semiconductor contact material 170, links material 172, contact layer 174, shunt 180 and insulating barrier 190.In another example, insulating barrier 190 is omitted.
Fig. 3 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 3, link material 172 and dispense from electrode structure 395.For example, electrode structure 295 comprises semiconductor contact material 170, contact layer 174, links material 185, shunt 180 and insulating barrier 190.In another example, insulating barrier 190 is omitted.
Fig. 4 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 4, link material 172 and dispense from electrode structure 495 with link material 185.For example, electrode structure 295 comprises semiconductor contact material 170, contact layer 174, shunt 180 and insulating barrier 190.In another example, insulating barrier 190 is omitted.
According to other embodiment, semiconductor contact material 170 and contact layer 174 combination alternatively.
Fig. 5 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 5, semiconductor contact material and contact layer form the part of the contact layer 570 of combination as electrode structure 595 in conjunction with usining.For example, electrode structure 595 comprises contact layer 570, link material 185, shunt 180 and the insulating barrier 190 of combination.In another example, each nose section 135 is covered by the contact layer 570 of combination.In certain embodiments, in conjunction with contact layer 570 comprise one or more conductive materials.For example, one or more conductive materials comprise at least one being selected from the group that comprises semiconductor, semimetal, metal etc.In another example, semiconductor is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As, In etc. separately.In another example, semiconductor adulterates.In another example, semimetal is selected from the group that comprises B, Ge, Si, Sn etc.In another example, metal is selected from the group that comprises Ti, A1, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, WSi etc.
In another example, in conjunction with contact layer 570 form with the one or more of end 130 of a plurality of nano wires 120 and electrically contact.In another example, in conjunction with contact layer 570 form the one or more ohmic contact with the end 130 of a plurality of nano wires 120.In another example, in conjunction with contact layer 570 be configured to define with the one or more good thermo-contact on one or more surfaces for setting up the one or more hot paths via one or more groups a plurality of nano wires 120, and the heat limited in one or more packing materials 160 is revealed.In another example, contact resistivity between the contact layer 570 of combination and nose section lower than 10 -8Ω-m 2.In another example, in conjunction with contact layer 570 have in the contact layer 570 of combination and the low work function between nose section 135.In another example, work function is less than 0.8 electron-volt.In another example, in conjunction with contact layer 570 there is almost the same with a plurality of nano wires 120 thermal expansion.The contact layer 570 of combination in another example has the thermal expansion between 0.4 μ m/ (mK) and 25 μ m/ (mK).In another example, in conjunction with contact layer 570 approach the thickness of 50nm.In another example, in conjunction with contact layer 570 there is the thickness between 1nm and 100,000nm.In another example, insulating barrier 190 is omitted.
Fig. 6 has shown the simplification view of the nano-wire array of belt electrode structure in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 6, semiconductor contact material and contact layer be in conjunction with to form the contact layer 570 of combination, and link material 185, as the part of electrode structure 695, dispenses.For example, electrode structure 695 comprises contact layer 570, shunt 180 and the insulating barrier 190 of combination.In another example, insulating barrier 190 is omitted.
As mentioned above and this place emphasize, Fig. 1-6 are only examples, it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, form nanostructure rather than nano wire.In certain embodiments, nanostructure is fully inserted in one or more packing materials 160.For example, corresponding spacing 150 fully is filled with one or more packing materials 160.In another example, the surface of more than 130 the one or more packing materials of nano wire substantial alignment in end.In another example, nose section 135 dispenses basically, and the contact layer 570 of semiconductor contact material 172 and/or combination contacts with end 130.In certain embodiments, one or more packing materials 160 are omitted.
Fig. 7 A is the simplification view that has shown thermoelectric device pillar according to an embodiment of the invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 7 A, thermoelectric device pillar 700 comprises nano-wire array 710.For example each nano wire in nano-wire array 710 comprises nose section 720 and nose section 725.In another example, nose section 720 is corresponding to the nose section 135 of Fig. 1-6.In another example, nose section 725 is corresponding to the nose section 135 of Fig. 1-6.In another example, electrode structure 730 is formed on nose section 720.In another example, electrode structure 730 is electrode structures 195 as shown in Figure 1, and comprises semiconductor contact material, link material, contact layer, link material, shunt and insulating barrier.In another example, electrode structure 735 is formed on nose section 730.In another example, electrode structure 735 is electrode structures 195 as shown in Figure 1, and comprises semiconductor contact material, link material, contact layer, link material, shunt and insulating barrier.
Fig. 7 B is the simplification view that has shown the part of thermoelectric device according to an embodiment of the invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 7 B, thermoelectric device 790 comprises a plurality of thermoelectric device pillar 700A, 700B, and 700C.Each thermoelectric device pillar 700A for example, 700B, and 700C is thermoelectric device pillar 700.In another example, thermoelectric device pillar 700 comprises electrode structure 730.In another example, thermoelectric device pillar 700 comprises electrode structure 735.In another example, thermoelectric device pillar 700B comprises electrode structure 730B.In another example, thermoelectric device pillar 700B comprises electrode structure 735B.In another example, thermoelectric device pillar 700C comprises electrode structure 730C.In another example, thermoelectric device pillar 700C comprises electrode structure 735C.
In another example, electrode structure 730A and electrode structure 730B share shunt 740AB.In another example, electrode structure 730A and electrode structure 730B share insulating barrier 750AB.In another example, electrode structure 735B and electrode structure 735C share shunt 745BC.In another example, electrode structure 735B and electrode structure 735C share insulating barrier 755BC.
In another example, each thermoelectric device pillar 700A, 700B, and 700C is formed at same semiconductor base.In another example, each thermoelectric device pillar 700A, 700B, and 700C is formed at two or more semiconductor bases.In another example, each thermoelectric device pillar 700A, 700B, and 700C has different electrical properties.In another example, each thermoelectric device pillar 700A, 700B, and 700C has different hot attributes.
As mentioned above and emphasize, Fig. 7 A and 7B are only examples herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, use nanostructure rather than nano wire.In other embodiments, different electrode structures is for electrode structure 730 and/or electrode structure 735.For example, electrode structure 295 as shown in Figure 2, electrode structure 395 as shown in Figure 3, electrode structure 495 as shown in Figure 4, electrode structure 595 as shown in Figure 5, and/or replacement electrode structure 730,730A, 730B, 730C, 735,735A, 735B and/or 735C one or more of electrode structure 695 as shown in Figure 6.In another example, any combination of different electrode structures is for electrode structure 730,730A, 730B, 730C, 735,735A, 735B, and/or each of 735C.In certain embodiments, one or more substrates are for various thermoelectric device pillars.Each thermoelectric device pillar 700A for example, 700B, and 700C is formed in same substrate.In another example, thermoelectric device pillar 700A, 700B, and/or the one or more of 700C are formed in different substrates.In certain embodiments, insulating barrier 750AB and/or insulating barrier 755BC are omitted.
Fig. 8 A has shown the simplification view of thermoelectric device pillar in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 8 A, thermoelectric device pillar 800 comprises the section of nano wire 810 and the section of nano wire 815.For example, the section of nano wire 810 utilizes section to link the section that material 880 is attached to nano wire 815.In another example, section links material 880 and comprises the soldering scolder.In another example, the soldering scolder comprises that at least one material carrys out the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, section links material 880 and comprises that brazing material comprises coming at least one material of the group of self-contained Ga, Ge, Si, Ag, Au, Pt etc.In another example, section links material 880 and comprises the silver-base metal adhesive.In another example, section links material 880 and has 100nm or less thickness.In another example, section links material 880 and has 1000nm or less thickness.Link material 880 in another example stage casing and there is the thermal expansion between 0.4 μ m/ (mK) and 25 μ m/ (mK).In another example, section links material 880 and has low thermal resistance.In another example, thermal resistance is 10 -2k/W and 10 10between K/W.In another example, section links material 880 and has low sheet resistance.In another example, sheet resistance is 10 -10between Ω/ and 10 Ω/.
In another example, in nano wire 810, the section of each nano wire comprises nose section 820.In another example, nose section 820 is corresponding to the nose section 135 of Fig. 1-6.In another example, each nano wire in the section of nano wire 815 comprises nose section 825.In another example, nose section 825 is corresponding to the nose section 135 of Fig. 1-6.
In another example, electrode structure 830 is formed on nose section 820.In another example, electrode structure 830 is electrode structures 195, and comprises semiconductor contact material as shown in Figure 1, links material, and contact layer, link material, shunt, and insulating barrier.In another example, electrode structure 835 is formed on nose section 830.In another example, electrode structure 835 is electrode structures 195 as shown in Figure 1, and comprises semiconductor contact material, link material, contact layer, link material, shunt and insulating barrier.
Fig. 8 B has shown the simplification view of the part of thermoelectric device in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 8 B, thermoelectric device 890 comprises a plurality of thermoelectric device pillar 800A, 800B, and 800C.Each thermoelectric device pillar 800A for example, 800B, and 800C is thermoelectric device pillar 800.In another example, thermoelectric device pillar 800 comprises electrode structure 830.In another example, thermoelectric device pillar 800 comprises electrode structure 835.In another example, thermoelectric device pillar 800B comprises electrode structure 830B.In another example, thermoelectric device pillar 800B comprises electrode structure 835B.In another example, thermoelectric device pillar 800C comprises electrode structure 830C.In another example, thermoelectric device pillar 800C comprises electrode structure 835C.
In another example, electrode structure 830A and electrode structure 830B share shunt 840AB.In another example, electrode structure 830A and electrode structure 830B share insulating barrier 850AB.In another example, electrode structure 835B and electrode structure 835C share shunt 845BC.In another example, electrode structure 835B and electrode structure 835C share insulating barrier 855BC.
In another example, each thermoelectric device pillar 800A, 800B, and 800C has different electrical properties.In another example, each thermoelectric device pillar 800A, 800B, and 800C has different hot attributes.
As mentioned above and emphasize, Fig. 8 A and 8B are only examples herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, use nanostructure rather than nano wire.In other embodiments, different electrode structures is for electrode structure 830 and/or electrode structure 835.Electrode structure 295 as shown in Figure 2 for example, electrode structure 395 as shown in Figure 3, electrode structure 495 as shown in Figure 4, electrode structure 595 as shown in Figure 5, and/or the replacement electrode structure 830 of electrode structure 695 as shown in Figure 6,830A, 830B, 830C, 835,835A, 835B, and/or 835C.In another example, any combination of different electrode structures is for each electrode structure 830,830A, 830B, 830C, 835,835A, 835B, and/or 835C.In certain embodiments, nano-wire array is used in the thermoelectric device pillar more than two sections.For example, the extra segment of nano wire be bound up on nano wire 810 the section and nano wire 815 the section between.In certain embodiments, one or more substrates are for various thermoelectric device pillars.For example, the section of the section of nano wire 810 and nano wire 815 is formed in same substrate.In another example, the section of nano wire 810 and the section of nano wire 815 are formed in two different substrates.In another example, each thermoelectric device pillar 800A, 800B, and 800C is formed in same substrate.In another example, one or more thermoelectric device pillar 800A, 800B, and/or 800C is formed in different substrates.In certain embodiments, insulating barrier 850AB and/or insulating barrier 855BC are omitted.
Fig. 9 A has shown the simplification view of thermoelectric device pillar in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 9 A, thermoelectric device pillar 900 comprises nano-wire array 910 and is formed on the nano-wire array 915 on the opposite side of semiconductor base 980.For example each nano wire in nano-wire array 910 comprises nose section 920.In another example, each nano wire in nano-wire array 910 comprises nose section 925.In another example, nose section 920 is corresponding to the nose section 135 of Fig. 1-6.In another example, nose section 925 is corresponding to the nose section 135 of Fig. 1-6.In another example, electrode structure 930 is formed on nose section 920.In another example, electrode structure 930 is electrode structures 195 as shown in Figure 1, and comprises semiconductor contact material, link material, contact layer, link material, shunt and insulating barrier.In another example, electrode structure 935 is formed on nose section 930.In another example, electrode structure 935 is electrode structures 195 as shown in Figure 1, and comprises semiconductor contact material, link material, contact layer, link material, shunt and insulating barrier.
Fig. 9 B has shown the simplification view of the part of thermoelectric device in accordance with another embodiment of the present invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In Fig. 9 B, thermoelectric device 990 comprises a plurality of thermoelectric device pillar 900A, 900B, and 900C.Each thermoelectric device pillar 900A for example, 900B, and 900C is thermoelectric device pillar 900.In another example, thermoelectric device pillar 900 comprises electrode structure 930.In another example, thermoelectric device pillar 900 comprises electrode structure 935.In another example, thermoelectric device pillar 900B comprises electrode structure 930B.In another example, thermoelectric device pillar 900B comprises electrode structure 935B.In another example, thermoelectric device pillar 900C comprises electrode structure 930C.In another example, thermoelectric device pillar 900C comprises electrode structure 935C.
In another example, electrode structure 930A and electrode structure 930B share shunt 940AB.In another example, electrode structure 930A and electrode structure 930B share insulating barrier 950AB.In another example, electrode structure 935B and electrode structure 935C share shunt 945BC.In another example, electrode structure 935B and electrode structure 935C share insulating barrier 955BC.
In another example, each thermoelectric device pillar 900A, 900B, and 900C is formed at same semiconductor base.In another example, each thermoelectric device pillar 900A, 900B, and 900C is formed at two or more semiconductor bases.In another example, each thermoelectric device pillar 900A, 900B, and 900C has different electrical properties.In another example, each thermoelectric device pillar 900A, 900B, and 900C has different hot attributes.
As mentioned above and emphasize, Fig. 9 A and 9B are only examples herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, use nanostructure rather than nano wire.In other embodiments, different electrode structures is for electrode structure 930 and/or electrode structure 935.Electrode structure 295 as shown in Figure 2 for example, electrode structure 395 as shown in Figure 3, electrode structure 495 as shown in Figure 4, electrode structure 595 as shown in Figure 5, and/or the replacement electrode structure 930 of electrode structure 695 as shown in Figure 6,930A, 930B, 930C, 935,935A, 935B, and/or 935C's is one or more.In another example, any combination of different electrode structure is for each electrode structure 930,930A, 930B, 930C, 935,935A, 935B, and/or 935C.In certain embodiments, one or more substrates are for various thermoelectric device pillars.Each thermoelectric device pillar 900A for example, 900B, and 900C is formed in same substrate.In another example, one or more thermoelectric device pillar 900A, 900B, and/or 900C is formed in different substrates.In certain embodiments, insulating barrier 950AB and/or insulating barrier 955BC are omitted.
As mentioned above and emphasize, Fig. 7 A, 7B, 8A, 8B, 9A and 9B are only examples herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, the thermoelectricity pillar of different types is used in same thermoelectric device.For example, thermoelectric device comprises thermoelectric device pillar 700A, thermoelectric device pillar 800B, and thermoelectric device pillar 900C.In another example, in conjunction with thermoelectric device pillar 700,800 and/or 900, be included in same thermoelectric device arbitrarily.
Figure 10 has shown the simplification view that is used to form the method for the electrode structure on nano-structure array according to an embodiment of the invention.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Method 1000 comprises that process 1005 is used to form the nano-structure array in one or more substrates, process 1010 is for the filled with nanostructures array, process 1015 for forming one or more contact layers on nano-structure array, process 1020 is used to form the one or more shunts between nano-structure array, process 1025 is used to form insulating barrier, process 1030 is for from one or more substrate removing materials, process 1035 for forming one or more contact layers on nano-structure array, process 1040 is used to form the one or more shunts between nano-structure array, and process 1045 is used to form insulating barrier.For example, method 1000 is used for forming thermoelectric device pillar 700 (as shown in Figure 7 A) and thermoelectric device 790 (as shown in Figure 7 B).In another example, process 1025 and/or 1045 one or more being skipped.In another example, process 1010 is skipped.
Figure 11 be shown according to an embodiment of the invention, as the simplification view of a part, the nano-structure array process 1005 that be used to form one or more substrates of the method 1000 for form electrode structure on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Process 1005 comprises that process 1110 is for providing semiconductor base, process 1120 is for the functionalization semiconductor base, process 1130 is for the washing semi-conductor substrate, process 1140 is for the part of mask semiconductor base, process 1150 is for applying metalized film to semiconductor base, process 1160 is for the etching semiconductor substrate, and process 1170 is for cleaning etched semiconductor base and process 1180 for the etched semiconductor base of drying.
Figure 12 be shown according to one embodiment of present invention, for the simplification view of a part, the substrate that be used to provide substrate process 1110 of the method 1000 as for form electrode structure on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, substrate 1210 is semi-conducting material piece (for example, semiconductor bases).In another example, semiconductor base 1210 is whole wafers.In another example, semiconductor base 1210 is 4 inches wafers.In another example, semiconductor base is the panel that is greater than 4 inches wafers.In another example, semiconductor base 1210 is 6 inches wafers.In another example, semiconductor base 1210 is 8 inches wafers.In another example, semiconductor base 1210 is 12 inches wafers.In another example, semiconductor base 1210 is the panels that are greater than 12 inches wafers.In another example, the shape of semiconductor base 1210 is not wafer.In another example, semiconductor base 1210 is single crystals.In another example, semiconductor base 1210 is many crystallizations.In another example, semiconductor base 1210 comprises silicon.
In certain embodiments, semiconductor base 1210 is functionalization.For example, semiconductor base 1210 adulterates to form the N-shaped semiconductor.In another example, semiconductor base 1210 adulterates to form the p-type semiconductor.In another example, semiconductor base 1210 utilizes III family and/or V group element doping.In another example, semiconductor base 1210 be functionalization with control the electricity and/or hot attribute semiconductor base 1210.In another example, semiconductor base 1210 comprises the silicon doped with boron.In another example, semiconductor base 1210 adulterates to adjust the resistivity of semiconductor base 1210 between about 0.00001 Ω-m and 10 Ω-m.In another example, semiconductor base 1210 be functionalization to adjust thermal conductivity between 0.1W/ (mK) (that is, every meter every degree Kelvin of watt) and the 500W/ (mK).
Figure 12 B has shown according to one embodiment of present invention as a part, simplification view be formed on the substrate nano-structure array by process 1005 as shown in figure 11 for the method 1000 of formation electrode structure on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, nano-structure array 1220 utilizes process 1005 to form.In another example, nano-structure array 1220 is nano-wire array 110 (as shown in Fig. 1-6) and/or nano-wire array 710 (as shown in Figure 7 A).In another example, nano-structure array 1220 is arrays of nano-pore.In another example, nano-structure array 1220 is arrays of nanotube.In another example, nano-structure array 1220 is nanometer nets.
Figure 13 be shown according to one embodiment of present invention as the part of the method 1000 for form electrode structure on nano-structure array, for the simplification view of process 1010 at substrate filled with nanostructures array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Optional process 1010 comprises that process 1320 is for the preheating nano-structure array, and process 1330 is for the preparation of one or more packing materials, process 1340 for filled with nanostructures array and process 1350 for solidifying one or more packing materials.For example, process 1010 is used for filling at least in part nano-wire array 110 (as shown in Fig. 1-6) and/or nano-wire array 710 (as shown in Figure 7 A).In another example, process 1010 forms one or more packing materials 160 (as shown in Fig. 1-6).In another example, process 1010 is used for filling the array of nano-pore, array and/or the nanometer net of nanotube.In another example, process 1320 and/or 1350 is skipped.
Figure 14 is according to one embodiment of present invention as the simplification view part of the method 1000 for form electrode structure on nano-structure array, the nano-structure array that is filled in substrate that formed by the process 1010 of Figure 13.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, the nano-structure array 1420 be formed in substrate 1410 is filled with one or more packing materials 1430.In another example, one or more packing materials 1430 are one or more packing materials 160.In another example, nano-structure array 1420 is nano-structure array 110 and/or nano-structure array 710.In another example, one or more packing materials 1430 comprise separately being selected from and comprise photoresist, spin-coating glass, spin coating dopant, aeroge, xerogel, and at least one in the group of oxide etc.For example, photoresist comprises long UV wavelength degree G line (for example, about 436nm) photoresist.In another example, photoresist has passive photoresist characteristic.In another example, photoresist is shown to the excellent bonds of various base materials, comprises Si, GaAs, InP, and glass.In another example, photoresist is shown to the excellent bonds of various metals, comprises Au, Cu and Al.In another example, spin-coating glass has high-k.In another example, the spin coating dopant comprises N-shaped and/or p-type dopant.In another example, the spin coating dopant applies by different dopants by zone in the zones of different of nano-wire array 1420.In another example, the spin coating dopant comprises boron and/or phosphorus etc.In another example, spin-coating glass comprises one or more spin coating dopants.In another example, aeroge is derived from the silica gel with extremely low approximately 0.1W/ (mK) and lower thermal conductivity.In another example, one or more packing materials comprise the long-chain of one or more oxides.In another example, one or more packing materials comprise being selected from and comprise Al 2o 3, FeO, FeO 2, Fe 2o 3, TiO, TiO 2, ZrO 2, ZnO, HfO 2, CrO, Ta 2o 5, SiN, TiN, BN, SiO 2, AlN, CN, etc. at least one of group.
Figure 15 be shown according to one embodiment of present invention as the part of the method 1000 for form electrode structure on nano-structure array, for form the simplification view of one or more contact layer processes 1015 and/or process 1035 on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Process 1015 and/or process 1035 comprise the surface of process 1510 for the complanation nanostructure, process 1520 is for exposing the section of nanostructure, process 1530, on the exposed length of nanostructure, forming semiconductor contact layer, is used to form contact layer for applying the process 1540 and the process 1550 that link material.For example, process 1015 and/or process 1035 are used for forming semiconductor contact material 160, link material 162, and/or contact layer 164 (as shown in Fig. 1-6).In another example, process 1510,1520, and/or 1540 one or more being skipped.In another example, process 1530 and 1550 is combined into single process.
Figure 16 be according to one embodiment of present invention as the part of the method 1000 for form electrode structure on nano-structure array, form and fill and the simplification view of the nano-structure array of complanation in substrate by planarization 1510.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, at optional process 1510 places, the nano-structure array 1420 of having filled is flattened.In another example, at least one surface 1640 of the nano-structure array 1420 of having filled is made basically flat.In another example, planarization 1510 exposes the end of nano-structure array 1420.In another example, planarization 1510 comprises that at least one process selects self-contained group of plasma etching, wet chemical etch, lapping (lapping), mechanical polishing, chemico-mechanical polishing, spontaneous dry etching etc.In another example, the lapping process comprises the 6 μ m diamond slurries that use with copper base.In another example, plasma etching is used SF in vacuum chamber 6.In another example, spontaneous dry etching is used XeF 2, planarization 1510 comprises plasma etching.In another example, the nano-structure array 1420 that planarization 1510 preparations have been filled is for further processing, processing, and/or manufacture process.
Figure 16 B be according to one embodiment of present invention as the part of the method 1000 for form electrode structure on nano-structure array, that form by the process 1520 for exposing the nanostructure section, fill and complanation, with the simplification view of the nano-structure array of exposed length.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, at optional process 1520 places, be formed for the exposed length 1650 of each nanostructure in nano-structure array 1420.In another example, exposed length 1650 is nose section 135 (as shown in Fig. 1-6), nose section 720 (as shown in Figure 7 A) and/or nose section 725 (as shown in Figure 7 A).In another example, for expose nanostructure the section process 1520 comprise a part that removes one or more packing materials 1430.In another example, for the process 1520 of the section that exposes nanostructure, comprise and utilize the etching of HF solution.In another example, HF solution comprises at least one that is selected from the group that comprises buffer, surfactant and other additives.In another example, for expose nanostructure the section process 1520 be included in the etching of examples of reactions etcher.
Figure 17 A is the scanning electron microscopy picture shown according to one embodiment of present invention as a part, the nano-structure array surface before the exposed length that exposes nano-structure array of the method 1000 for form electrode structure on nano-structure array.This image is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.The exposed length of 7 nano-structure arrays does not as shown in Figure 1 expose well.For example, a plurality ofly in Figure 17 A than dark areas, represent nanostructure.In another example, a plurality ofly represent one or more packing materials than bright area in Figure 17 A.In another example, the existence of one or more packing materials makes to form high-quality electricity and/or hot joining thixotroping difficulty.In another example, Figure 17 A has described process 1520 nano-structure array 1420 before of the section for exposing nanostructure.
Figure 17 B is the scanning electron microscopy picture shown according to one embodiment of present invention as a part, the nano-structure array surface after the exposed length that exposes nano-structure array of the method 1000 for form electrode structure on nano-structure array.This image is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.The exposed length of 7B nano-structure array as shown in Figure 1 exposes well.For example the exposed length of nano-structure array is effectively outstanding.In another example, Figure 17 B has described process 1520 nano-structure array 1420 afterwards of the section for exposing nanostructure.
Get back to Figure 15, according to some embodiment, form at process 1530 semiconductor contact layers.For example, in process 1530, the exposed length 1650 of nanostructure has semiconductor contact material formed thereon.In another example, semiconductor contact material is semiconductor contact material 170 (as Figure 1-4).In another example, the process 1530 that is used to form semiconductor contact layer comprise be selected from comprise metallide, electroless plating (electroless plating), evaporate, splash, at least one process of the group of molecular beam epitaxy, chemical vapour desposition, ald, dipping, selectivity coating etc.
According to some embodiment, semiconductor contact material comprises one or more conductive materials.For example, one or more conductive materials comprise at least one being selected from the group that comprises semiconductor, semimetal, metal etc.In another example, semiconductor is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As, In etc. separately.In another example, semiconductor adulterates.In another example, semimetal is selected from the group that comprises Be, Ge, Si, Sn etc.In another example, metal is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, WSi etc.In another example, semiconductor contact material comprises the TiW of 10 to 90 ratios.In another example, semiconductor contact material comprises the TiW of 10 to 90 ratios, and Ni.
In another example, semiconductor contact material forms with the one or more of section 1650 and electrically contacts.In another example, semiconductor contact material forms the one or more ohmic contact with section 1650.In another example, semiconductor contact material structure becomes to form the one or more good thermo-contact with one or more surfaces, this surface is for setting up the one or more hot paths via nano-structure array 1420, and the heat limited in one or more packing materials 1430 is revealed.
According to some embodiment, in optional process 1540, link material and be applied to semiconductor contact material.In one example, link material and be formed on the layer between semiconductor contact material and contact layer.In another example, linking material is to link material 172 (as illustrated in fig. 1 and 2).In another example, link material and comprise the soldering scolder.In another example, the soldering scolder comprises coming at least one material of the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, link material and comprise brazing material, it comprises coming at least one material of the group of self-contained Ga, Ge, Si, Ag, Au, Pt etc.In another example, link material and comprise the silver-base metal adhesive.In another example, link material and there is 100nm or less thickness.In another example, the link material use is selected from and comprises silk screen printing, splash, and evaporation, sauce distributes (paste dispensing), and one or more processes of the group of paper tinsel (foils) etc. form.
According to some embodiment, in process 1550, contact layer forms.For example, nano-wire array forms the part of the pillar of thermoelectric device.For example contact layer is contact layer 174 (as Figure 1-4).In another example, the process 1550 that is used to form contact layer comprises being selected from and comprises metallide, electroless plating, and evaporation, splash, molecular beam epitaxy, chemical vapour desposition, ald, dipping, at least one process of the group of selectivity coating etc.
According to some embodiment, contact layer comprises one or more conductive materials.For example, one or more conductive materials comprise at least one being selected from the group that comprises semiconductor, semimetal, metal etc.In another example, semiconductor is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As, In etc. separately.In another example, semiconductor adulterates.In another example, semimetal is selected from the group that comprises Be, Ge, Si, Sn etc.In another example, metal is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, WSi etc.
As mentioned above and emphasize, Figure 15 is only example herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, the one or more processes that are used to form one or more diffusing barrier layers also are implemented.For example, diffusion-barrier coating is formed between the nose section and semiconductor contact layer of nanostructure.In another example, diffusion-barrier coating is formed on semiconductor contact layer and links between material.In another example, diffusion-barrier coating is formed on and links between material and contact layer.In certain embodiments, for applying the process 1540 that links material, be omitted, and be used to form the process 1530 of semiconductor contact layer and be used to form process 1550 combinations of contact layer.For example, the process of this combination forms the contact layer 570 (as Fig. 5 and 6) of combination.
Get back to Figure 10, according to some embodiment, in process 1020, one or more shunts are formed between nano-structure array.For example each of one or more shunts is shunt 180 (as shown in Fig. 1-6), shunt 740AB (as shown in Figure 7 B) and/or shunt 745BC (as shown in Figure 7 B).In another example, each of one or more shunts is provided at the electrical connection between other devices in one or more contact layers and thermoelectric device.In another example, other devices comprise one or more contact layers one or more of other pillars of thermoelectric device.In another example, each of one or more shunts has low sheet resistance.In another example, sheet resistance is 10 -10between Ω/ and 10 Ω/.In another example, process 1020 comprises being selected from and comprises metallide, electroless plating, and evaporation, splash, molecular beam epitaxy, chemical vapour desposition, at least one process of the group of ald etc.In another example, chemical vapour desposition occurs in low pressure.In another example, chemical vapour desposition is that plasma is strengthened.In another example, each of one or more shunts comprises one or more conductive materials.In another example, one or more conductive materials comprise at least one of the group that is selected from alloy of comprising Ti, A1, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, NiSi, WSi, graphite, steel, dilval, cobalt chromium ferronickel molybdenum manganese etc.In another example, dilval is alloy 42, and it comprises about 42% nickel, about 57% iron, and the carbon of trace, manganese, phosphorus, sulphur, silicon, chromium, aluminium and/or cobalt (on weight).In another example, the alloy of cobalt chromium ferronickel molybdenum manganese is Egiloy, and it comprises about 39-41% cobalt, about 19-21% chromium, about 14-16% nickel, about 11.3-20.5% iron, approximately 6-8% molybdenum, and/or about 1.5-2.5% manganese (on weight).In another example, each of one or more shunts has the thickness between 1nm and 100,000nm.
According to some embodiment, for the process 1020 that forms one or more shunts between nano-structure array, comprise that optional subprocess is for applying one or more link materials.In one example, link material and be formed on the layer between one or more contact layers and one or more shunt.In another example, linking material is as Figure 13, and the link material 185 shown in 5.In another example, link material and comprise the soldering scolder.In another example, the soldering scolder comprises that at least one material carrys out the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, link material and comprise brazing material, it comprises coming at least one material of the group of self-contained Ga, Ge, Si, Ag, Au, Pt etc.In another example, link material and comprise the silver-base metal adhesive.In another example, link material and there is 100nm or less thickness.In another example, the link material use is selected from and comprises silk screen printing, splash, and evaporation, sauce distributes, and one or more processes of the group of paper tinsel etc. form.In another example, one or more shunts provide the second substrate in more treatment step, to support the thermoelectric device pillar.
According to some embodiment, in optional process 1025, insulating barrier is formed on each of one or more shunts.For example, insulating barrier comprises being selected from and comprises chemical vapour desposition, low pressure chemical vapor deposition, plasma-enhanced chemical vapor deposition, one or more processes of the group of anodization etc.For example, at least one of dielectric protection layer shunt.For example, insulating barrier is insulating barrier 750AB and/or insulating barrier 755BC.In another example, insulating barrier provides at least one to shunt of electric insulation.In another example, insulating barrier reduces the possibility of at least one short circuit on other conduction surfaces of shunt.In another example, insulating barrier has at least high resistance of 1M Ω.In another example, insulating barrier has at least thermal conductivity of 2W/ (mK) (that is, every meter every degree Kelvin of watt).In another example, insulating barrier has 100nm or less thickness.In another example, insulating barrier comprises being selected from and comprises SiO 2, Si 3n 4, SiN, Al 2o 3etc. one or more materials of list.
According to some embodiment, in process 1030, material removes from substrate is one or more.For example material removes from the one or more substrates that wherein form one or more nano-structure arrays.In another example, one or more substrates remove basically.In another example, any of one or more substrates is substrate 1410 (as shown in Figure 14 and 16).
In another example, for the process 1530 of removing materials, comprise slightly and thin (course thining).In another example, slightly thin and comprise being selected from and comprise lapping, mill (grinding), sand papering, wet chemical etch, plasma etching, and one or more processes of the group of spontaneous dry etching etc.In another example, spontaneous dry etching is included in voltage-controlled chamber and applies XeF 2gas.In another example, slightly thin and remove one or more substrates etc. great majority.In another example, slightly thin and remove all one or more substrates basically.In another example, slightly thin the 150 μ m that are less than that stay one or more substrates.
In certain embodiments, process 1530 comprises that for removing materials essence thins (fine thinning).For example essence thins and comprises being selected from and comprise plasma etching, wet chemical etch, lapping, mechanical polishing, chemico-mechanical polishing, and one or more processes of the group of spontaneous dry etching etc.In another example, spontaneous dry etching comprises and applies XeF 2gas is in voltage-controlled chamber.In another example, plasma etching comprises and applies SF 6in vacuum chamber.In another example, plasma etching comprises and applies SF 6in the examples of reactions etcher.In another example, plasma etch applications is in the predetermined time section.In another example, essence thins all remainders that process removes one or more substrates basically.In another example, essence thins process and removes high one or more substrates to 150 μ m.In another example, essence thins at least some parts of one or more nano-structure arrays that process exposes lower floor.In another example, essence thins the part that process removes one or more nano-structure arrays of lower floor.
According to some embodiment, in process 1035, one or more contact layers are formed on nano-structure array.For example, process 1035 is basically similar in appearance to process 1015 (as shown in figure 15).In another example, the one or more contact layers that are formed on process 1035 are used the material same with the one or more contact layers that are formed on process 1015.In another example, the one or more contact layers that are formed on process 1035 are used the material different from the one or more contact layers that are formed on process 1015.In another example, the one or more contact layers that are formed on process 1035 have with one or more contact layers and are formed on the same structure of process 1015.In another example, the one or more contact layers that are formed on process 1035 have from one or more contact layers and are formed on the structure that process 1015 is different.In another example, the one or more contact layers that are formed on process 1035 comprise semiconductor contact material, link material and contact layer, and are formed on the contact layer that the one or more contact layers of process 1015 only comprise combination.
According to some embodiment, in process 1040, one or more shunts are formed between nano-structure array.For example, process 1040 is basically similar in appearance to process 1020.In another example, process 1040 forms shunt 745BC and/or shunt 740AB (as shown in Figure 7 B).In another example, the one or more shunts that form in process 1040 use the material same with the one or more shunts that form in process 1020.In another example, the one or more shunts that form in process 1040 use the material different from the one or more shunts that form in process 1020.In another example, the one or more shunts that form in process 1040 have same structure with the one or more shunts that are formed on process 1020.In another example, the one or more shunts that form in process 1040 have the structure different from the one or more shunts that are formed on process 1020.In another example, the one or more shunts that form in process 1040 comprise and link material and one or more shunt, and the one or more shunts that are formed on process 1020 comprise only one or more shunts.
According to some embodiment, at optional process 1045 insulating barriers, be formed on one or more shunts.For example, process 1045 is basically similar in appearance to process 1025.In another example, process 1045 forms insulating barrier 755BC and/or insulating barrier 750AB (as shown in Figure 7 B).In another example, the insulating barrier that is formed on process 1045 is used the material same with the insulating barrier that is formed on process 1025.In another example, the insulating barrier that is formed on process 1045 is used the material different from the insulating barrier that is formed on process 1025.
As mentioned above and emphasize, Figure 10 is only example herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, the one or more processes that are used to form one or more diffusing barrier layers also are implemented.For example one or more diffusing barrier layers are formed between one or more contact layers and/or one or more shunt.
Figure 18 is the simplification view that has shown in accordance with another embodiment of the present invention, has been used to form the method for the electrode structure on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Method 1800 comprises that process 1805 is used to form the nano-structure array in one or more substrates, process 1810 is for the filled with nanostructures array, process 1815 for forming one or more contact layers on nano-structure array, process 1820 is used to form one or more shunts between nano-structure array, process 1825 is used to form insulating barrier, process 1830 is for from one or more substrate removing materials, process 1835 arrives together for linking nano-structure array, process 1840 for forming one or more contact layers on nano-structure array, process 1845 is used to form one or more shunts between nano-structure array, and process 1850 is used to form insulating barrier.For example, method 1800 is used for forming thermoelectric device pillar 800 (as shown in Figure 8 A) and thermoelectric device 890 (as shown in Figure 8 B).In another example, process 1810,1825 and/or 1850 one or more being skipped.
In certain embodiments, in process 1805, nano-structure array is formed in one or more substrates.For example, process 1805 is basically similar in appearance to process 1005 as shown in figure 11.In another example, in process 1805, process 1005 is for forming dividually each nano-structure array.In another example, in process 1805, process 1005 is used for forming all nano-structure arrays simultaneously.In another example, nano-structure array is nano-wire array (for example, thermoelectricity section) 810 and nano-wire array 815 (as shown in Figure 8 A).
In certain embodiments, in optional process 1810, nano-structure array is filled.For example, process 1810 is basically similar in appearance to process 1010 (as shown in figure 13).In another example, in process 1810, process 1010 is used for same one or more packing material filled with nanostructures arrays.In another example, in process 1810, process 1010 is used for different one or more packing material filled with nanostructures arrays.
In certain embodiments, in process 1815, one or more contact layers are formed on nano-structure array.For example, process 1815 is process 1015 (as shown in figure 15).In another example, process 1815 forms one or more contact layers on nose section 820 and/or nose section 825 (as shown in Figure 8 A).
According to some embodiment, in process 1820, one or more shunts are formed between nano-structure array.For example, process 1820 is processes 1020.In another example, process 1820 forms shunt 840AB and/or shunt 845BC (as shown in Figure 8 B).
According to some embodiment, in optional process 1825, form one or more insulating barriers.For example, process 1825 is processes 1025.In another example, process 1825 forms insulating barrier 850AB and/or insulating barrier 855BC (as shown in Figure 8 B).
In certain embodiments, in process 1830, material removes from one or more substrates.For example, process 1830 is basically similar in appearance to process 1030.In another example, in process 1830, process 1030 is used for exposing the end (as shown in Figure 8 A) of a plurality of nano wires in the section of having filled (it is relative with nose section 820) of nano wire 810.In another example, in process 1830, process 1030 is used for exposing the end (as shown in Figure 8 A) of a plurality of nano wires in the section of having filled (it is relative with nose section 825) of nano wire 815.
In certain embodiments, in process 1840, two or more nano-structure arrays are bound up.For example, two or more nano-structure arrays are bound up and utilize the one or more process silk screen printings select self-contained group, splash, evaporation, sauce distribute, paper tinsel etc.In another example, two or more nano-structure array utilization sections link material and are bound up.In another example, section links material and comprises the soldering scolder.In another example, the soldering scolder comprises that at least one material carrys out the group of self-contained Ag, Cu, Sn, Pb, Au, In, Cd, Zn, Bi etc.In another example, section links material and comprises that brazing material comprises coming at least one material of the group of self-contained Ga, Ge, Si, Ag, Au, Pt etc.In another example, section links material and comprises the silver-base metal adhesive.
In certain embodiments, in process 1840, one or more contact layers are formed on nano-structure array.For example, process 1840 is process 1035 (as shown in figure 15).In another example, process 1840 forms one or more contact layers on nose section 825 and/or nose section 820 (as shown in Figure 8 A).
According to some embodiment, in process 1845, one or more shunts are formed between nano-structure array.For example, process 1845 is processes 1040.In another example, process 1845 forms shunt 845BC and/or shunt 840AB (as shown in Figure 8 B).
According to some embodiment, in optional process 1850, form one or more insulating barriers.For example, process 1850 is processes 1045.In another example, process 1850 forms insulating barrier 855BC and/or insulating barrier 850AB (as shown in Figure 8 B).
As mentioned above and emphasize, Figure 18 is only example herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, the one or more processes that are used to form one or more diffusing barrier layers also are implemented.For example one or more diffusing barrier layers are formed between one or more contact layers and/or one or more shunt.In certain embodiments, the different modification of one or more contact layers is formed on process 1815 from the one or more contact layers that are formed on process 1040.In certain embodiments, the different modification of one or more shunts are formed on process 1820 from the one or more shunts that are formed on process 1845.In certain embodiments, the nano-wire array more than two sections is used in the thermoelectric device pillar.For example, the extra segment of nano wire be bound up on nano wire 810 the section and nano wire 815 the section between (as shown in Figure 8 A).
Figure 19 is the simplification view that has shown in accordance with another embodiment of the present invention, has been used to form the method for the electrode structure on nano-structure array.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.Method 1900 comprises that process 1905 is used to form nano-structure array in the opposite side of one or more substrates, process 1910 is for the filled with nanostructures array, process 1915 for forming one or more contact layers on nano-structure array, process 1920 is used to form one or more shunts between nano-structure array, process 1925 is used to form insulating barrier, process 1930 for forming one or more contact layers on nano-structure array, process 1935 is used to form one or more shunts between nano-structure array, and process 1940 is used to form insulating barrier.For example, method 1900 is used for forming thermoelectric device pillar 900 (as shown in Figure 9 A) and thermoelectric device 990 (as shown in Fig. 9 B).In another example, process 1910,1925 and/or 1940 one or more being skipped.
In certain embodiments, in process 1905, nano-structure array is formed in the opposite side of one or more substrates.For example, process 1905 is basically similar in appearance to process 1005 as shown in figure 11.Figure 20 be according to one embodiment of present invention, that form by the process 1905 of a part of the method 1900 as being used to form the electrode structure on nano-structure array, with the simplification view of the substrate of the nano-wire array on the relative both sides of substrate.This schematic diagram is only example, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, nano-structure array 2020 is formed on a side of substrate 2010, and another nano-structure array 2030 is formed on the opposite side of substrate 2010.In another example, substrate 2010 is substrate 980 (as shown in Figure 9 A).In another example, nano-structure array 2020 is nano-wire array 910 and/or nano-wire array 915 (as shown in Figure 9 A).In another example, nano-structure array 2030 is nano-wire array 915 and/or nano-wire array 910 (as shown in Figure 9 A).
In certain embodiments, in optional process 1910, nano-structure array is filled.For example, process 1910 is basically similar in appearance to process 1010 (as shown in figure 13).In another example, during process 1910, process 1010 is used for same one or more packing material filled with nanostructures arrays.In another example, during process 1910, process 1010 is used for different one or more packing material filled with nanostructures arrays.
In certain embodiments, in process 1915, one or more contact layers are formed on nano-structure array.For example, process 1915 is process 1015 (as shown in figure 15).In another example, process 1915 forms one or more contact layers on nose section 920 and/or nose section 925 (as shown in Figure 9 A).
According to some embodiment, in process 1920, one or more shunts are formed between nano-structure array.For example, process 1920 is processes 1020.In another example, process 1920 forms shunt 940AB and/or shunt 945BC (as shown in Fig. 9 B).
According to some embodiment, in optional process 1925, one or more insulating barriers form.For example, process 1925 is processes 1025.In another example, process 1925 forms insulating barrier 950AB and/or insulating barrier 955BC (as shown in Fig. 9 B).
In certain embodiments, in process 1930, one or more contact layers are formed on nano-structure array.For example, process 1930 is process 1035 (as shown in figure 15).In another example, process 1930 forms one or more contact layers on nose section 925 and/or nose section 920 (as shown in Figure 9 A).
According to some embodiment, in process 1935, one or more shunts are formed between nano-structure array.For example, process 1935 is basically similar in appearance to process 1040.In another example, process 1935 forms shunt 945BC and/or shunt 940AB (as shown in Fig. 9 B).
According to some embodiment, in optional process 1940, one or more insulating barriers form.For example, process 1940 is processes 1045.In another example, process 1940 forms insulating barrier 955BC and/or insulating barrier 950AB (as shown in Fig. 9 B).
As mentioned above and emphasize, Figure 19 is only example herein, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.In certain embodiments, the one or more processes that are used to form one or more diffusing barrier layers also are implemented.For example one or more diffusing barrier layers are formed between one or more contact layers and/or one or more shunt.In certain embodiments, the one or more contact layers of the different modification of one or more contact layers from be formed on process 1930 are formed in process 1915.In certain embodiments, the different modification of one or more shunts are formed on process 1920 from the one or more shunts that are formed on process 1935.
According to some embodiment, the thermoelectric device based on nano wire is provided with the nano-wire array of functionalization, and it is clipped in and is arranged to for generation of between the pair of electrodes structure of optimizing thermoelectric generator (TEG) power.As example, apparatus module is built into to have and is clipped in two nano-wire arrays between electrode structure.In another example, allow an electrode structure in high inlet temperature place and exhaust-heat exchanger (EHX) thermo-contact (for example, the temperature of target thermal source, at for example 300 ℃), for example, and another electrode structure (contacts with refrigerant heat exchanger (CHX) in low inlet temperature, the water cold-producing medium, at about temperature).In another example, be clipped in the opposite side that two redundancy nano-wire arrays between electrode structure are attached to EHX, in the mirror image symmetric position.In another example, device has length L xbe parallel to fluid stream (cold-producing medium, it is in the adverse current of EHX) and width L yperpendicular to fluid, flow.In another example, the long-pending size A that provides device of Lx and Ly xy.In another example, the supposition of nano-wire array in array and redundant array has the line length of about 200 μ m and scope from 100 to 0.01mm 2effective cross section long-pending.In another example, for the electrode structure of array and redundant array, there is scope from thickness and the 2x10 of 1 micron to 1000 microns -9ohmcm 2contact resistivity.In another example, electrode structure comprises Tungsten, and relevant electricity and hot attribute all apply.In another example, EHX and CHX can be designed to some standard feature, comprise that the substrate that place at interval is coated with a plurality of heat radiation Fin.In another example, the EHX inlet temperature is 300 or 600C.In another example, it is 90W/ (mK) that array and redundant array have thermal conductivity.
According to some embodiment, array and redundant array device parameter can evaluate and optimize in view of generated TEG performance number.For example the electrode structure material is selected relatively for the TEG power of different materials, easily to determine by direct.In another example, have been found that Tungsten for example, better selects than dilval (, alloy 42).In another example, optimized contact scheme thickness also can be determined.
Figure 21 A and 21B have shown for fixing thermoelectricity cross-sectional area, simplification view for different electrode structure thickness, TEG power with respect to the curve of plant bulk.These views are only examples, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, nano-wire array thickness (for example, line length) is made as 200 μ m and the exhaust gas entrance temperature is made as 600C °.In another example, with electrode structure thickness, approximately in the situation of 500 μ m, the TEG power that device produces is to some plant bulk A xyproduce peak value.
Figure 22 A and 22B have shown at fixing cross-sectional area, simplification view for different electrode structure thickness, TEG power with respect to the curve of plant bulk.These views are only examples, and it should not limit the scope of claim undeservedly.Those of ordinary skills will appreciate that various modification, substitutions and modifications.For example, under rated condition, longer nano-wire array thickness can cause higher TEG power.In another example, the exhaust gas entrance temperature is also played an important role affecting aspect the generation of TEG power.In another example, TEG power is can be when the exhaust gas entrance temperature is 600C ° significantly higher 300C ° the time than exhaust gas entrance temperature, even nano-wire array thickness have in front kind of situation 200 μ m than low height, and there is the larger height of 450 μ m under latter instance.In another example, nano-wire array thickness is 450 μ m and the exhaust gas entrance temperature is 300C °.
According to an embodiment, thermoelectric device comprises nano wire, contact layer and shunt.Each nano wire comprises first end and the second end.Contact layer electrically connects nano wire via at least first end of each nano wire.Shunt is electrically coupled to contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and contact layer is less than 0.8 electron-volt.Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, device is according at least Fig. 1,2,3,4,5 and/or 6 realizations.
In another example, device also comprises the one or more packing materials between nano wire, and nano wire passes through one or more packing materials fixed position relative to each other.In another example, each nano wire also comprises the first paragraph relevant with first end and the second segment relevant with the second end, second segment is surrounded by one or more packing materials basically, first paragraph is outstanding from one or more packing materials, and contact layer electrically connects nano wire via at least first paragraph of each nano wire.In another example, one or more packing materials comprise at least one material that is selected from the group that comprises photoresist, spin-coating glass, spin coating dopant, aeroge, xerogel, nitride and oxide separately.In another example, each of one or more packing materials is relevant with the thermal conductivity that is less than 50 watts of every meter every degree Kelvins.In another example, the distance between first end and the second end is at least 300 μ m.In another example, distance is at least 525 μ m.In another example, the corresponding zone of nano wire, this zone is less than 0.01mm dimensionally 2.In another example, the corresponding zone of nano wire, this zone is 100mm at least dimensionally 2.In another example, device is with at least sublimation temperature and melt temperature are relevant, and sublimation temperature and melt temperature are higher than 350 ℃.In another example, melt temperature and sublimation temperature are higher than 800 ℃.
In another example, contact layer comprises being selected from and comprises semiconductor, at least one of the group of semimetal and metal or a plurality of material.In another example, semiconductor comprises at least one that is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As and In.In another example, semimetal comprises at least one that is selected from the group that comprises B, Ge, Si and Sn.In another example, metal comprises at least one that is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi and WSi.In another example, contact layer and scope are from 1nm to 100, and the thickness of 000nm is relevant.In another example, shunt comprises being selected from and comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, NiSi, WSi, graphite, steel, at least one of the group of the alloy of dilval and n cobalt chromium ferronickel molybdenum manganese or a plurality of material.In another example, shunt and scope are from 1nm to 100, and the thickness of 000nm is relevant.
In another example, device also comprises that binder couse connects contact layer and shunt, and binder couse and scope are from 10 -10the sheet resistance that every quadratic sum 10 Ω of Ω is every square and scope are from 10 -2k/W to 10 10the thermal resistance of K/W is relevant.In another example, binder couse comprises being selected from and comprises soldering, brazing material, and one or more link materials of the group of silver-base metal adhesive.In another example, device also comprises the insulating barrier be formed on shunt.In another example, insulating barrier comprises being selected from and comprises SiO 2, Si 3n 4, SiN and l 2o 3one or more materials of group.In another example, shunt is arranged to electrically connect nano wire to one or more devices.
In another example, contact layer comprises that one or more the first contact materials are connected at least first end of each nano wire, and one or more the second contact material electrically connects each nano wire via at least one or a plurality of the first contact material.The second contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between first end and one or more the first contact material is less than 0.8 electron-volt.One or more the first contact materials and scope are from 10 -2k/W to 10 10the second thermal resistance of K/W is relevant.One or more the second contact materials and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.In another example, device also comprises that binder couse connects one or more the first contact materials to one or more the second contact materials, and binder couse and scope are from 10 -10the sheet resistance that every quadratic sum 10 Ω of Ω is every square and scope are from 10 -2k/W to 10 10the thermal resistance of K/W is relevant.
In another example, binder couse comprises being selected from and comprises soldering, brazing material, and one or more link materials of the group of silver-base metal adhesive.In another example, the first contact resistivity and the second contact resistivity are identical.In another example, the first work function and the second work function are identical.In another example, one or more the first contact materials and one or more the second contact material are identical.In another example, one or more the first contact materials and one or more the second contact material are different.
According to another embodiment, thermoelectric device comprises nano wire, the first electrode structure and the second electrode structure.Each nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects nano wire via at least the second end of each nano wire, and the second shunt is electrically coupled to the second contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the second end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, device is according at least Fig. 7 A and/or 7B carry out.
In another example, device also comprises that connecting the first shunt links to one or more first of the first contact one or more the second link materials that material contacts with connection the second shunt to the second.One or more the first link materials and scope are from 10 -10every square of first sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.One or more the second link materials and scope are from 10 -10every square of second sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 4th thermal resistance of K/W is relevant.In another example, the first contact layer comprises one or more the first contact materials, and it is electrically coupled at least first end of each nano wire, and one or more the second contact material, via at least one or a plurality of the first contact material, electrically connects each nano wire.The 3rd contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2.The 3rd work function between first end and one or more the first contact material is less than 0.8 electron-volt.One or more the first contact materials are relevant to the 3rd thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.One or more the second contact materials are relevant to the 4th thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.
In another example, the first shunt is arranged to electrically connect the first end of each nano wire to one or more devices.In another example, the second shunt is arranged to electrically connect the second end of each nano wire to one or more devices.
According to another embodiment, thermoelectric device comprises the first nano wire, the first electrode structure, second nano wire and second electrode structure different from the first nano wire.Each first nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.The second end is electrically coupled to the 4th end.For example, device is according at least Fig. 8 A and/or 8B realize.
In another example, device also comprises one or more link materials, and it comprises the first side and second side relative with the first side.The first side is electrically coupled to the second end and the second side is electrically coupled to the 4th end.One or more link materials and scope are from 10 -10every square of sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.In another example, one or more link materials are selected from and comprise soldering, brazing material, and the group of silver-base metal adhesive.In another example, device also comprises that connecting the first shunt links to one or more first of the first contact one or more the second link materials that material contacts with connection the second shunt to the second.One or more the first link materials and scope are from 10 -10every square of first sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.One or more the second link materials and scope are from 10 -10every square of second sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 4th thermal resistance of K/W is relevant.
According to another embodiment, thermoelectric device comprises first nano wire relevant to the first side of substrate, the first electrode structure, second nano wire and second electrode structure relevant to the second side of substrate.Each first nano wire comprises first end and second end relative with first end.The first electrode structure comprises the first contact layer and the first shunt, and the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.The second nano wire is different from the first nano wire.The second side is relative with the first side.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.The second electrode structure comprises the second contact layer and the second shunt, and the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, device is according at least Fig. 9 A and/or 9B realize.
In another example, device also comprises that connecting the first shunt links to one or more first of the first contact one or more the second link materials that material contacts with connection the second shunt to the second.One or more the first link materials and scope are from 10 -10every square of first sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.One or more the second link materials and scope are from 10 -10every square of second sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 4th thermal resistance of K/W is relevant.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises formation nano wire, deposition contact layer and forms shunt.Each nano wire comprises first end and the second end.Contact layer electrically connects nano wire via at least first end of each nano wire.Shunt is electrically coupled to contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and contact layer is less than 0.8 electron-volt.Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, method is according at least Figure 10 realization.
In another example, method also comprises utilizes one or more link materials to link contact layer to shunt.In another example, method also is included on shunt and forms insulating barrier.In another example, for the process that deposits contact layer, comprise one or more the first contact materials of deposition at least first end of each nano wire and deposition electrically connects one or more second contact materials of each nano wire via at least one or a plurality of the first contact material.The second contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between first end and one or more the first contact material is less than 0.8 electron-volt.One or more the first contact materials are relevant to the second thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.One or more the second contact materials are relevant to the 3rd thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.In another example, the process that is used to form contact layer also comprises utilizes one or more link materials to link one or more the first contact materials to one or more the second contact materials.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises the formation nano wire, forms the first electrode structure, and forms the second electrode structure.Each nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects nano wire via at least the second end of each nano wire, and the second shunt is electrically coupled to the second contact layer.All nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the second end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, method is according at least Figure 10 execution.
In yet another embodiment, a kind of method for the manufacture of thermoelectric device comprises formation the first nano wire, forms the first electrode structure, forms second nano wire different from the first nano wire, forms the second electrode structure, and electrically connects the second end to the four ends.Each first nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, method is according at least Figure 18 execution.
In another example, for the process that electrically connects the second end and the 4th end, comprise and utilize one or more link materials to link the second end to the four ends.One or more link materials comprise the first side and second side relative with the first side.The first side is electrically coupled to the second end.The second side is electrically coupled to the 4th end.One or more link materials and scope are from 10 -10every square of sheet resistance to every square of 10 Ω of Ω and scope are from 10 -2k/W to 10 10the 3rd thermal resistance of K/W is relevant.In another example, method also comprises formation the 3rd nano wire, and each the 3rd nano wire comprises five terminal and six end relative with five terminal.Comprise and utilize one or more the first link materials link the second end to five terminal and utilize one or more second to link materials link the 4th end to the six ends for the process that electrically connects the second end and the 4th end.All the 3rd nano wires are arranged essentially parallel to each other.
According to another embodiment, a kind of method for the manufacture of thermoelectric device comprises the first nano wire that formation is relevant to the first side of substrate, forms the first electrode structure, forms second metal wire relevant to the second side of substrate, and forms the second electrode structure.Each first nano wire comprises first end and second end relative with first end.Form the first electrode structure and comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer.The second nano wire is different from the first nano wire.The second side is relative with the first side.Each second nano wire comprises the 3rd end and four end relative with the 3rd end.Form the second electrode structure and comprise deposition the second contact layer and form the second shunt, the second contact layer electrically connects the second nano wire via at least the three end of each the second nano wire, and the second shunt is electrically coupled to the second contact layer.All the first nano wires are arranged essentially parallel to each other.All the second nano wires are arranged essentially parallel to each other.The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The first work function between first end and the first contact layer is less than 0.8 electron-volt.The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2.The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt.The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.For example, this method is according at least Figure 19 realization.
Although described specific embodiments of the invention, one skilled in the art will appreciate that other embodiment existed with described embodiment equivalence.For example, each embodiment of the present invention and/or example can combine.Correspondingly, be appreciated that the present invention is not limited by concrete illustrated embodiment, but only be subject to the scope restriction of appended claims.

Claims (51)

1. a thermoelectric device, described device comprises:
Nano wire, each nano wire comprises first end and the second end;
Contact layer, its at least first end via each nano wire electrically connects nano wire; With
Shunt, it is electrically coupled to contact layer;
Wherein:
All nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and contact layer is less than 0.8 electron-volt; And
Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.
2. device according to claim 1 also comprises:
One or more packing materials, it is between nano wire;
Wherein nano wire passes through one or more packing materials fixed position relative to each other.
3. device according to claim 2, wherein:
Each described nano wire also comprises the first paragraph relevant with first end and the second segment relevant with the second end;
Second segment is surrounded by one or more packing materials basically;
First paragraph is outstanding from one or more packing materials; And
Contact layer electrically connects nano wire via at least first paragraph of each nano wire.
4. device according to claim 2, wherein, described one or more packing materials comprise at least one material that is selected from the group that comprises photoresist, spin-coating glass, spin coating dopant, aeroge, xerogel, nitride and oxide separately.
5. device according to claim 2, wherein, each of described one or more packing materials is relevant with the thermal conductivity that is less than 50 watts of every meter every degree Kelvins.
6. device according to claim 1, wherein, the distance between described first end and described the second end is at least 300 μ m.
7. device according to claim 6, wherein, described distance is at least 525 μ m.
8. device according to claim 1, wherein, the corresponding zone of described nano wire, this zone is less than 0.01mm dimensionally 2.
9. device according to claim 1, wherein, the corresponding zone of described nano wire, this zone is 100mm at least dimensionally 2.
10. device according to claim 1, wherein, described device is with at least sublimation temperature and melt temperature are relevant, and described sublimation temperature and described melt temperature are higher than 350 ℃.
11. device according to claim 10, wherein, described melt temperature and described sublimation temperature are higher than 800 ℃.
12. device according to claim 1, wherein, described contact layer comprises being selected from and comprises semiconductor, at least one of the group of semimetal and metal or a plurality of material.
13. device according to claim 12, wherein, described semiconductor comprises at least one that is selected from the group that comprises Si, Ge, C, B, P, N, Ga, As and In.
14. device according to claim 12, wherein, described semimetal comprises at least one that is selected from the group that comprises B, Ge, Si and Sn.
15. device according to claim 12, wherein, described metal comprises at least one that is selected from the group that comprises Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi and WSi.
16. device according to claim 1, wherein, described contact layer and scope are from 1nm to 100, and the thickness of 000nm is relevant.
17. device according to claim 1, wherein, described shunt comprises at least one or a plurality of material of the group of the alloy that selects self-contained Ti, Al, Cu, Au, Ag, Pt, Ni, P, B, Cr, Li, W, Mg, TiW, TiNi, TiN, Mo, TiSi, MoSi, NiSi, WSi, graphite, steel, dilval and cobalt chromium ferronickel molybdenum manganese
18. device according to claim 1, wherein, described shunt and scope are from 1nm to 100, and the thickness of 000nm is relevant.
19. device according to claim 1 also comprises:
Binder couse, it connects contact layer and described shunt;
Wherein said binder couse is with following relevant:
Scope is from 10 -10the sheet resistance that every quadratic sum 10 Ω of Ω is every square; With
Scope is from 10 -2k/W to 10 10the thermal resistance of K/W.
20. device according to claim 19, wherein, described binder couse comprises being selected from and comprises soldering, brazing material, and one or more link materials of the group of silver-base metal adhesive.
21. device according to claim 1, also comprise the insulating barrier be formed on shunt.
22. device according to claim 21, wherein, described insulating barrier comprises being selected from and comprises SiO 2, Si 3n 4, SiN and Al 2o 3one or more materials of group.
23. device according to claim 1, wherein, described shunt is arranged to electrically connect nano wire to one or more described devices.
24. device according to claim 1, wherein said contact layer comprises:
One or more the first contact materials, it is connected at least first end of each nano wire; And
One or more the second contact materials, it electrically connects each nano wire via at least described one or more the first contact materials;
Wherein:
The second contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between first end and one or more the first contact material is less than 0.8 electron-volt;
Described one or more the first contact material is relevant to the second thermal resistance, and its scope is from 10 -2k/W to 10 10k/W; And
Described one or more the second contact material is relevant to the 3rd thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.
25. device according to claim 24 also comprises:
Binder couse, it connects described one or more the first contact materials to described one or more the second contact materials;
Wherein said binder couse is with following relevant:
Sheet resistance, its scope is from 10 -10every square of every quadratic sum 10 Ω of Ω; With
Thermal resistance, its scope is from 10- 2k/W to 10 10k/W.
26. device according to claim 25, wherein, described binder couse comprises the one or more link materials that are selected from the group that comprises soldering, brazing material and silver-base metal adhesive.
27. device according to claim 24, wherein, described the first contact resistivity and described the second contact resistivity are identical.
28. device according to claim 24, wherein, described the first work function and described the second work function are identical.
29. device according to claim 24, wherein, described one or more the first contact materials and described one or more the second contact material are identical.
30. device according to claim 24, wherein, described one or more the first contact materials and described one or more the second contact material are different.
31. a thermoelectric device, described device comprises:
Nano wire, each nano wire comprises first end and second end relative with first end;
The first electrode structure, it comprises the first contact layer and the first shunt, and the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer; And
The second electrode structure, it comprises the second contact layer and the second shunt, and described the second contact layer electrically connects nano wire via at least the second end of each nano wire, and described the second shunt is electrically coupled to described the second contact layer;
Wherein:
All nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the second end and the second contact layer is less than 0.8 electron-volt;
Described the second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
32. device according to claim 31 also comprises:
Connect described the first shunt and link material to one or more first of the first contact; And
Connect described the second shunt and link material to one or more second of the second contact;
Wherein said one or more first links material with following relevant:
The first sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 3rd thermal resistance, its scope is from 10- 2k/W to 10 10k/W;
Wherein said one or more second links material with following relevant:
The second sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 4th thermal resistance, its scope is from 10 -2k/W to 10 10k/W.
33. device according to claim 31, wherein, described the first contact layer comprises:
Described one or more the first contact material is electrically coupled at least first end of each nano wire; And
Described one or more the second contact material, electrically connect each nano wire via at least described one or more the first contact materials;
Wherein:
The 3rd contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The 3rd work function between first end and one or more the first contact material is less than 0.8 electron-volt;
Described one or more the first contact material is relevant to the 3rd thermal resistance, and its scope is from 10 -2k/W to 10 10k/W; And
Described one or more the second contact material is relevant to the 4th thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.
34. device according to claim 31, wherein, described the first shunt is arranged to electrically connect the first end of each nano wire to one or more devices.
35. device according to claim 31, wherein, described the second shunt is arranged to electrically connect the second end of described each nano wire to one or more devices.
36. a thermoelectric device, described device comprises:
The first nano wire, each first nano wire comprises first end and second end relative with first end;
The first electrode structure, it comprises the first contact layer and the first shunt, and the first contact layer electrically connects described the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer;
Second nano wire different from the first nano wire, each second nano wire comprises the 3rd end and four end relative with the 3rd end; And
The second electrode structure, it comprises the second contact layer and the second shunt, and described the second contact layer electrically connects described the second nano wire via at least the three end of each the second nano wire, and described the second shunt is electrically coupled to described the second contact layer;
Wherein:
All the first nano wires are arranged essentially parallel to each other;
All the second nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt;
The second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W; And
Described the second end is electrically coupled to described the 4th end.
37. device according to claim 36 also comprises:
One or more link materials, it comprises the first side and second side relative with the first side;
Wherein:
Described the first side is electrically coupled to described the second end; And
Described the second side is electrically coupled to described the 4th end;
Wherein said one or more link material is with following relevant:
Sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 3rd thermal resistance, its scope is from 10 -2k/W to 10 10k/W.
38., according to the described device of claim 37, wherein, described one or more link materials are selected from the group that comprises soldering, brazing material and silver-base metal adhesive.
39. device according to claim 36 also comprises:
Connect described the first shunt and link material to one or more first of the first contact; And
Connect described the second shunt and link material to one or more second of the second contact;
Wherein said one or more first links material with following relevant:
The first sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 3rd thermal resistance, its scope is from 10 -2k/W to 10 10k/W;
Wherein said one or more second links material with following relevant:
The second sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 4th thermal resistance, its scope is from 10 -2k/W to 10 10k/W.
40. a thermoelectric device, described device comprises:
First nano wire relevant to the first side of substrate, each first nano wire comprises first end and second end relative with first end;
The first electrode structure, it comprises the first contact layer and the first shunt, and the first contact layer electrically connects described the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer;
Second nano wire relevant to the second side of substrate, described the second nano wire is different from the first nano wire, and described the second side is relative with the first side, and each second nano wire comprises the 3rd end and the 4th end relative with the 3rd end; And
The second electrode structure, it comprises the second contact layer and the second shunt, and described the second contact layer electrically connects described the second nano wire via at least the three end of each the second nano wire, and described the second shunt is electrically coupled to described the second contact layer;
Wherein:
All the first nano wires are arranged essentially parallel to each other;
All the second nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt; And
Described the second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
41., according to the described device of claim 40, also comprise:
Connect described the first shunt and link material to one or more first of the first contact; And
Connect described the second shunt and link material to one or more second of the second contact;
Wherein said one or more first links material with following relevant:
The first sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 3rd thermal resistance, its scope is from 10 -2k/W to 10 10k/W;
Wherein said one or more second links material with following relevant:
The second sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 4th thermal resistance, its scope is from 10 -2k/W to 10 10k/W.
42. the method for the manufacture of thermoelectric device, described method comprises:
Form nano wire, each nano wire comprises first end and the second end;
The deposition contact layer, its at least first end via each nano wire electrically connects nano wire; And
Form shunt, it is electrically coupled to contact layer;
Wherein:
All nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and contact layer is less than 0.8 electron-volt; And
Contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W.
43., according to the described method of claim 42, also comprise and utilize one or more link materials to link contact layer to shunt.
44., according to the described method of claim 42, also be included on shunt and form insulating barrier.
45., according to the described method of claim 42, wherein, describedly comprise for the process that deposits contact layer:
Deposit one or more the first contact materials at least first end of each nano wire; And
Deposit one or more the second contact materials, it electrically connects each nano wire via at least described one or more the first contact materials;
Wherein:
The second contact resistivity scope between first end and one or more the first contact material is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between first end and one or more the first contact material is less than 0.8 electron-volt;
Described one or more the first contact material is relevant to the second thermal resistance, and its scope is from 10 -2k/W to 10 10k/W; And
Described one or more the second contact material is relevant to the 3rd thermal resistance, and its scope is from 10 -2k/W to 10 10k/W.
46., according to the described method of claim 45, wherein, the described process that is used to form contact layer also comprises utilizes one or more link materials to link described one or more the first contact materials to described one or more the second contact materials.
47. the method for the manufacture of thermoelectric device, described method comprises:
Form nano wire, each nano wire comprises first end and second end relative with first end;
Form the first electrode structure, it comprises deposition the first contact layer and form the first shunt, and the first contact layer electrically connects nano wire via at least first end of each nano wire, and the first shunt is electrically coupled to the first contact layer; And
Form the second electrode structure, it comprises deposition the second contact layer and form the second shunt, and described the second contact layer electrically connects nano wire via at least the second end of each nano wire, and described the second shunt is electrically coupled to described the second contact layer;
Wherein:
All nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the second end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the second end and the second contact layer is less than 0.8 electron-volt;
Described the second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
48. the method for the manufacture of thermoelectric device, described method comprises:
Form the first nano wire, each first nano wire comprises first end and second end relative with first end;
Form the first electrode structure, comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects described the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer;
Form second nano wire different from the first nano wire, each second nano wire comprises the 3rd end and four end relative with the 3rd end;
Form the second electrode structure, comprise deposition the second contact layer and form the second shunt, described the second contact layer electrically connects described the second nano wire via at least the three end of each the second nano wire, and described the second shunt is electrically coupled to described the second contact layer; And
Electrically connect the second end to the four ends;
Wherein:
All the first nano wires are arranged essentially parallel to each other;
All the second nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt; And
Described the second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
49., according to the described method of claim 48, wherein, describedly for the process that electrically connects the second end and the 4th end, comprise and utilize the one or more link materials comprise the first side and second side relative with the first side to link the second end to the four ends;
Wherein:
Described the first side is electrically coupled to described the second end; And
Described the second side is electrically coupled to described the 4th end;
Wherein said one or more link material is with following relevant:
Sheet resistance, its scope is from 10 -10every square of Ω is to every square of 10 Ω; With
The 3rd thermal resistance, its scope is from 10 -2k/W to 10 10k/W.
50., according to the described method of claim 48, also comprise:
Form the 3rd nano wire, each the 3rd nano wire comprises five terminal and six end relative with five terminal;
Wherein saidly for the process that electrically connects the second end and the 4th end, comprise:
Utilize one or more the first link materials to link described the second end to described five terminal; With
Utilize one or more the second link materials to link described the 4th end to described the 6th end; Wherein all the 3rd nano wires are arranged essentially parallel to each other.
51. the method for the manufacture of thermoelectric device, described method comprises:
Form first nano wire relevant to the first side of substrate, each first nano wire comprises first end and second end relative with first end;
Form the first electrode structure, comprise deposition the first contact layer and form the first shunt, the first contact layer electrically connects described the first nano wire via at least first end of each the first nano wire, and the first shunt is electrically coupled to the first contact layer;
Form second nano wire relevant to the second side of substrate, described the second nano wire is different from the first nano wire, and described the second side is relative with the first side, and each second nano wire comprises the 3rd end and four end relative with the 3rd end; And
Form the second electrode structure, comprise deposition the second contact layer and form the second shunt, described the second contact layer electrically connects described the second nano wire via at least the three end of each the second nano wire, and described the second shunt is electrically coupled to described the second contact layer;
Wherein:
All the first nano wires are arranged essentially parallel to each other;
All the second nano wires are arranged essentially parallel to each other;
The first contact resistivity scope between first end and the first contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The first work function between first end and the first contact layer is less than 0.8 electron-volt;
The first contact layer is relevant to the first thermal resistance, and this first thermal resistance scope is from 10 -2k/W to 10 10k/W;
The second contact resistivity scope between the 3rd end and the second contact layer is from 10 -13Ω-m 2to 10 -7Ω-m 2;
The second work function between the 3rd end and the second contact layer is less than 0.8 electron-volt; And
Described the second contact layer is relevant with the second thermal resistance, and this second thermal resistance scope is from 10 -2k/W to 10 10k/W.
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