CN103455654B - 基于机器学习的数据路径提取 - Google Patents
基于机器学习的数据路径提取 Download PDFInfo
- Publication number
- CN103455654B CN103455654B CN201310205844.5A CN201310205844A CN103455654B CN 103455654 B CN103455654 B CN 103455654B CN 201310205844 A CN201310205844 A CN 201310205844A CN 103455654 B CN103455654 B CN 103455654B
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- CN
- China
- Prior art keywords
- data path
- cluster
- machine learning
- unit
- logic
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3323—Design verification, e.g. functional simulation or model checking using formal methods, e.g. equivalence checking or property checking
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Architecture (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/484,111 | 2012-05-30 | ||
US13/484,111 US8589855B1 (en) | 2012-05-30 | 2012-05-30 | Machine-learning based datapath extraction |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103455654A CN103455654A (zh) | 2013-12-18 |
CN103455654B true CN103455654B (zh) | 2018-02-02 |
Family
ID=49555918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310205844.5A Expired - Fee Related CN103455654B (zh) | 2012-05-30 | 2013-05-29 | 基于机器学习的数据路径提取 |
Country Status (2)
Country | Link |
---|---|
US (3) | US8589855B1 (zh) |
CN (1) | CN103455654B (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9208432B2 (en) * | 2012-06-01 | 2015-12-08 | Brain Corporation | Neural network learning and collaboration apparatus and methods |
US9569582B2 (en) * | 2014-01-03 | 2017-02-14 | International Business Machines Corporation | Template matching for resilience and security characteristics of sub-component chip designs |
US10089428B2 (en) * | 2015-05-04 | 2018-10-02 | Samsung Electronics Co., Ltd. | Intelligent cell swapping based on ceiling determination, floor determination, and cell attribute weighting criteria |
US10303811B2 (en) | 2015-07-31 | 2019-05-28 | Autodesk, Inc. | Deep-learning based functional correlation of volumetric designs |
CN105389448B (zh) * | 2015-12-22 | 2019-07-23 | 华侨大学 | 一种用于计算机集群保能度评估的图模型构造方法 |
CN107220643A (zh) * | 2017-04-12 | 2017-09-29 | 广东工业大学 | 基于紧凑型神经网络的深度学习模型的交通标志识别系统 |
EP3392712A1 (en) * | 2017-04-21 | 2018-10-24 | IMEC vzw | A method for analyzing design of an integrated circuit |
WO2018211143A1 (en) * | 2017-05-19 | 2018-11-22 | Deepmind Technologies Limited | Neural network system |
US10386726B2 (en) | 2017-09-29 | 2019-08-20 | Globalfoundries Inc. | Geometry vectorization for mask process correction |
US10817634B2 (en) * | 2018-01-19 | 2020-10-27 | Synopsys, Inc. | Machine-learning circuit optimization using quantized prediction functions |
DE102019106996A1 (de) | 2018-03-26 | 2019-09-26 | Nvidia Corporation | Darstellen eines neuronalen netzwerks unter verwendung von pfaden innerhalb des netzwerks zum verbessern der leistung des neuronalen netzwerks |
US11507846B2 (en) * | 2018-03-26 | 2022-11-22 | Nvidia Corporation | Representing a neural network utilizing paths within the network to improve a performance of the neural network |
CN108921092B (zh) * | 2018-07-02 | 2021-12-17 | 浙江工业大学 | 一种基于卷积神经网络模型二次集成的黑色素瘤分类方法 |
US10789296B2 (en) * | 2018-07-10 | 2020-09-29 | International Business Machines Corporation | Detection of missing entities in a graph schema |
US10796068B2 (en) * | 2018-09-11 | 2020-10-06 | Samsung Electronics Co., Ltd. | Standard cell design system, standard cell design optimization method thereof, and semiconductor design system |
KR20200054414A (ko) | 2018-11-09 | 2020-05-20 | 삼성전자주식회사 | 에이징 모델 생성 방법 및 이를 이용한 반도체 칩의 제조 방법 |
US11556728B2 (en) | 2018-12-11 | 2023-01-17 | Sap Se | Machine learning verification procedure |
CN109726466B (zh) * | 2018-12-26 | 2020-05-12 | 北京华大九天软件有限公司 | 一种基于机器学习训练模型的器件缓冲方法 |
JP7310171B2 (ja) * | 2019-02-28 | 2023-07-19 | 富士通株式会社 | 配分方法、抽出方法、配分プログラム、抽出プログラム、配分装置及び抽出装置 |
CN109740302B (zh) * | 2019-04-02 | 2020-01-10 | 深兰人工智能芯片研究院(江苏)有限公司 | 一种神经网络的仿真方法和装置 |
KR20220010768A (ko) * | 2019-05-20 | 2022-01-26 | 시놉시스, 인크. | 머신 러닝 기반 인코딩을 이용한 전자 회로 레이아웃에서의 패턴들의 분류 |
US11100270B1 (en) | 2019-06-21 | 2021-08-24 | Synopsys, Inc. | Pattern based die connector assignment using machine learning image recognition |
US11048852B1 (en) * | 2019-07-26 | 2021-06-29 | Cadence Design Systems, Inc. | System, method and computer program product for automatic generation of sizing constraints by reusing existing electronic designs |
EP4097624A1 (en) | 2020-04-22 | 2022-12-07 | Google LLC | Generating integrated circuit placements using neural networks |
US11355395B2 (en) * | 2020-05-22 | 2022-06-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit in hybrid row height structure |
CN113486611B (zh) * | 2021-06-30 | 2023-04-25 | 海光信息技术股份有限公司 | 芯片设计方法、芯片设计装置及非暂时性存储介质 |
WO2023284088A1 (zh) | 2021-07-12 | 2023-01-19 | 苏州贝克微电子股份有限公司 | 基于人工智能的电路设计方法与实现系统 |
CN113553794B (zh) * | 2021-07-12 | 2023-04-07 | 苏州贝克微电子股份有限公司 | 一种用于电路设计的人工智能实现系统及方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101308551A (zh) * | 2008-05-05 | 2008-11-19 | 西安理工大学 | Ls-svm分类与回归学习递归神经网络硬件电路及实现方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6145117A (en) * | 1998-01-30 | 2000-11-07 | Tera Systems Incorporated | Creating optimized physical implementations from high-level descriptions of electronic design using placement based information |
US6598215B2 (en) | 2001-03-30 | 2003-07-22 | Intel Corporation | Datapath design methodology and routing apparatus |
US7376922B2 (en) | 2003-09-30 | 2008-05-20 | Intel Corporation | Method and apparatus for integrated circuit datapath layout using a vector editor |
US8296247B2 (en) * | 2007-03-23 | 2012-10-23 | Three Palm Software | Combination machine learning algorithms for computer-aided detection, review and diagnosis |
JP5194302B2 (ja) * | 2008-02-20 | 2013-05-08 | ルネサスエレクトロニクス株式会社 | 半導体信号処理装置 |
US8271920B2 (en) | 2010-08-25 | 2012-09-18 | International Business Machines Corporation | Converged large block and structured synthesis for high performance microprocessor designs |
-
2012
- 2012-05-30 US US13/484,111 patent/US8589855B1/en not_active Expired - Fee Related
-
2013
- 2013-05-29 CN CN201310205844.5A patent/CN103455654B/zh not_active Expired - Fee Related
- 2013-09-03 US US14/017,263 patent/US9147032B2/en not_active Expired - Fee Related
- 2013-09-03 US US14/017,273 patent/US9043738B2/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101308551A (zh) * | 2008-05-05 | 2008-11-19 | 西安理工大学 | Ls-svm分类与回归学习递归神经网络硬件电路及实现方法 |
Also Published As
Publication number | Publication date |
---|---|
US8589855B1 (en) | 2013-11-19 |
US20150067625A1 (en) | 2015-03-05 |
CN103455654A (zh) | 2013-12-18 |
US20130326441A1 (en) | 2013-12-05 |
US9043738B2 (en) | 2015-05-26 |
US20140372960A1 (en) | 2014-12-18 |
US9147032B2 (en) | 2015-09-29 |
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Effective date of registration: 20171129 Address after: Grand Cayman, Cayman Islands Applicant after: GLOBALFOUNDRIES INC. Address before: American New York Applicant before: Core USA second LLC Effective date of registration: 20171129 Address after: American New York Applicant after: Core USA second LLC Address before: New York grams of Armand Applicant before: International Business Machines Corp. |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180202 Termination date: 20190529 |
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