CN103401680A - Matrix rotation displacement digital encryption method - Google Patents
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Abstract
The invention relates to an encryption method, in particular to a matrix rotation displacement digital encryption method, which is characterized by comprising the following steps of utilizing data inside a computer storage device to solve a data encryption key according to an integral computing formula, carrying out XOR operation on the key and the original data to obtain the transform data, forming a new matrix through the obtained transform data and the key, calculating the variation times of each layer of the matrix data by utilizing each layer element computing formula of the matrix, carrying out the rotation displacement on the matrix elements, establishing a matrix rotation sequence relation, realizing the data encryption, then carrying out the communication through a network, and realizing the data exchange purpose. The method is based on the matrix which has no rotation displacement formula, the computer programming characteristic is utilized to realize the matrix element rotation displacement, the defect that difference exists between the symmetric encryption and asymmetric encryption can be overcome, the analysis and summary are carried out, and the weakness that the information (data) encryption is limited by the word length of the computer can be overcome.
Description
Technical field
The present invention relates to a kind of matrix rotation carry digit encryption method, belong to computer information security coding theory and the communications field.
Background technology
Encryption and decryption technique is processed information, obtains an information that is difficult for being broken (or data).In order to prevent that information from being destroyed or attacking, a lot of people study encryption technology.As far back as the sixties in last century, work out rsa encryption method (RSA is the prefix letter of three people's names) by the American, in the nineties, the elliptic curve cryptography method appears, at the beginning of 21 reality, HILL encryption method and EAS encryption method appear.At present, world's encryption technology development rapidly, adopt the matrix encryption technology to become main flow, in different encryption methods, all mention spin matrix and encrypt, in fact only have two kinds of rotation encryption methods, a kind of is that (row becomes row to matrix inversion operation, row become row), this method adopts the matrix inversion operation formula, and data are changed; Another kind is U.S. EAS encryption method, adopts the row displacement method to be encrypted.We adopt row matrix, column element to rotate simultaneously now, do not need Matrix Computation Formulas, and this computing formula method that do not need not yet occurs.And matrix rotation displacement encryption method allows in matrix exactly, and all data rotate, and form new data, reach the purpose of encryption.
Several encryption methods in the above world, represented different encryptions year generation technique and characteristics.They are respectively non-linear (or asymmetric) encryption method or symmetric encryption method, and asymmetric characteristics are, public keys and private key are arranged, and are all two keys; In addition, also have a kind of symmetric encryption method, this encryption does not have public keys, only has private key, and ciphering process is exactly encryption key.And RSA is the prime number that utilizes in number theory, solves key; Elliptic curve is to utilize elliptic equation, solves key; It is to utilize matrix inversion transformation technique (row in matrix becomes row, and row become capable conversion) that HILL encrypts, and is encrypted, obtain encryption key, EAS encrypts, and adopts low 4 invariant positions of numeral, high 4 for mending " 0 ", obtains a factor that solves key, utilize this factor and former several phases " with ", obtain key, calculate x, the y coordinate, add former number to x, in coordinate points corresponding to y, realize encrypting.
These encryption technologies all exist different defects and deficiency, and EAS encrypts, and adopt two-way array, and the row displacement method is encrypted, and does not have now good method to crack, in case data destroyed after, can't know the true and false of data.So this method is easy to be attacked.RSA and elliptic curve and HILL cryptographic algorithm,, to the long computer of word, calculate very complicatedly, and the speed of service is slow.
Summary of the invention
The deficiency that exists in order to overcome prior art, the object of the invention is to provide a kind of matrix rotation carry digit encryption method, it is a kind of matrix element arrangement position that utilizes, carry out the matrix element displacement, realize the encryption method of data (information), different from other encryption method, it is based on matrix does not have the rotation displacement formula, utilize the computer programming characteristics, realization matrix element rotation displacement algorithm, overcome symmetric cryptography and have different shortcomings from asymmetric encryption, analyze summary, make up information (data) and encrypt the deficiency that is subject to word length and algorithm limits.
In order to realize the foregoing invention purpose, solve the problem that exists in prior art, the technical scheme that the present invention takes is that a kind of matrix rotation carry digit encryption method comprises the following steps:
(A) utilize the interior data of computer storage, according to the integer calculations formula, obtain data encryption key, key and former data are carried out xor operation, obtain transform data and form new matrix together with key, utilize every layer of element computing formula of matrix, every layer of change frequency of compute matrix data, carry out the matrix element rotation displacement, set up the matrix rotation ordinal relation, realize data encryption, then by network, communicate, reach the purpose of exchanges data;
(B) to mentioning and obtain data encryption key in step (A), the matrix element rotation displacement, set up the matrix rotation ordinal relation, realizes data encryption, and concrete steps are as follows:
The first step, obtain data encryption key
Computer in internal memory, carries out ordered arrangement to the deposit data of required encryption,, as encrypting initial data and, by computer serial interface, being sent in 51 single-chip microcomputers, utilizes formula (1) N=2
k(2m-1) by 51 single-chip microcomputers, carry out cipher key calculation, obtain key k and m value, in formula (1): N encrypts initial data, and m is the calculated value of N while being odd number, the functional relation between expression m and encryption initial data N, m=1,2,3 K is the calculated value of N while being even number, k=0,1,2,3 Again key k or m and encryption initial data N are carried out xor operation, obtain new enciphered data N* value; Again N*, k and m value are rearranged together, form the matrix of a new needs rotation;
Second step, matrix element rotation displacement
51 single-chip microcomputers, with the new matrix data of having changed,, by parallel interface, are sent in FPGA, and the matrix data that FPGA changes according to 51 single-chip microcomputers, carry out the matrix element rotation displacement, and the matrix rotation shift count is by square formation element computing formula (2) S=2
2* (N-(2i-1)) or according to rectangular matrix formula (3) S=2 * (N+M-2 (2j+1)), decide, in formula (2): i is number of plies changing value, i=1,2,3, S is the every one deck element number of matrix, and N is square formation row, column number and to matrix size, is directly proportional; In formula (3): S is the every one deck element number of matrix, and N is that matrix line number, M are that the matrix columns all is directly proportional to matrix size, and j is number of plies changing value, j=0, and 1,2,3, If the S evaluation is less than the fixing non-rotary combination of numbers value of matrix, illustrate that the matrix rotation number of times satisfies condition, can rotate, otherwise recalculate number of revolutions, until the S value is less than the fixing non-rotary combination of numbers value of matrix, finally can select a matrix rotation number of times, according to the number of revolutions of calculating, start to carry out the matrix rotation displacement, at first the outermost layer data are rotated, then, to inferior outer rotation, until matrix is fixed non-rotary numeral, thereby realize the rotation encryption of data in matrix; Data after encryption, be sent in another computer by serial line interface; When solving matrix element rotation displacement, the mobile element number of times, can not surpass the S value in formula (2), (3), prevents the repetition rotation phenomenon.
Beneficial effect of the present invention is: a kind of matrix rotation carry digit encryption method, it is the data of utilizing in computer storage, according to the integer calculations formula, obtain data encryption key, key and former data are carried out xor operation, obtain transform data and form new matrix together with key, utilize every layer of element computing formula of matrix, every layer of change frequency of compute matrix data, carry out the matrix element rotation displacement, set up the matrix rotation ordinal relation, realize data encryption, communicate by network again, reach the purpose of exchanges data; Compared with the prior art, it is based on matrix does not have the rotation displacement formula, utilize the computer programming characteristics, realization matrix element rotation displacement method, overcome symmetric cryptography and have different shortcomings from asymmetric encryption, analyze summary, make up information (data) and encrypt the deficiency that is subject to the word length restriction.
Description of drawings
Fig. 1 is the general frame of the present invention.
Embodiment
The invention will be further described below in conjunction with accompanying drawing.
as shown in Figure 1, the general frame of the present invention comprises computer, 51 single-chip microcomputers, program storage and FPGA, described computer is connected with 51 single-chip microcomputers by serial port, described 51 single-chip microcomputers are connected with FPGA by parallel port, P1.0-P1.7 data wire mouth in described 51 single-chip microcomputers respectively with FPGA in pd0-pd7 data wire mouth connect one to one, Ncs in described FPGA, data, asdi and dclk signal port respectively with program storage in Ncs, data, asdi and dclk signal port connect one to one, 3.3V, the 5V power supply respectively with FPGA, 51 single-chip microcomputer power pin connect.
The specific works process is as follows: computer in internal memory, carries out ordered arrangement to the deposit data of required encryption,, as encrypting initial data and, by computer serial interface, being sent in 51 single-chip microcomputers, utilizes formula (1) N=2
k(2m-1) by 51 single-chip microcomputers, carry out cipher key calculation, obtain key k and m value, in formula (1): N encrypts initial data, and m is the calculated value of N while being odd number, the functional relation between expression m and encryption initial data N, m=1,2,3 K is the calculated value of N while being even number, k=0,1,2,3 Again key k or m and encryption initial data N are carried out xor operation, obtain new enciphered data N* value; Again N*, k and m value are rearranged together, form the matrix of a new needs rotation.
51 single-chip microcomputers, with the new matrix data of having changed,, by parallel interface, are sent in FPGA, and the matrix data that FPGA changes according to 51 single-chip microcomputers, carry out the matrix element rotation displacement, and the matrix rotation shift count is by square formation element computing formula (2) S=2
2* (N-(2i-1)) or according to rectangular matrix formula (3) S=2 * (N+M-2 (2j+1)), decide, in formula (2): i is number of plies changing value, i=1,2,3, S is the every one deck element number of matrix, and N is square formation row, column number and to matrix size, is directly proportional; In formula (3): S is the every one deck element number of matrix, and N is that matrix line number, M are that the matrix columns all is directly proportional to matrix size, and j is number of plies changing value, j=0, and 1,2,3, If the S evaluation is less than the fixing non-rotary combination of numbers value of matrix, illustrate that the matrix rotation number of times satisfies condition, can rotate, otherwise recalculate number of revolutions, until the S value is less than the fixing non-rotary combination of numbers value of matrix, finally can select a matrix rotation number of times, according to the number of revolutions of calculating, start to carry out the matrix rotation displacement, at first the outermost layer data are rotated, then, to inferior outer rotation, until matrix is fixed non-rotary numeral, thereby realize the rotation encryption of data in matrix; Data after encryption, be sent in another computer by serial line interface; When solving matrix element rotation displacement, the mobile element number of times, can not surpass the S value in formula (2), (3), prevents the repetition rotation phenomenon.
Below describe the present invention:
Fig. 1 is the general frame of the present invention, and as can be seen from Figure 1, matrix rotation displacement encryption method altogether in three steps.
(a), complete data and store in internal memory, and matrix data is delivered in 51 single-chip microcomputers by serial ports, provide simultaneously the row and column value in matrix.According to the computer module in Fig. 1, this module has memory RAM, serial ports, computer is stored in numeral in calculator memory RAM, and, with the data ordered arrangement, in this process, need to determine following parameter, be how many machine word lengths is? what does enciphered data have? after these two parameters are determined, just as can be known, these two parameters, as row matrix, train value, are stored in calculator memory RAM matrix representation forms together with numeral.According to the row, column parameter, computer carries out RS-232 with 51 single-chip microcomputers and communicates by letter.
(b), 51 single-chip microcomputers are finished the work is that k, m are calculated, and set up new matrix, the matrix data with new, be sent in FPGA by parallel port.According to 51 one-chip computer modules in Fig. 1,51 single-chip microcomputers are connected with FPGA, and this module can realize the data download, and k, m value are calculated, k or m value and former data are carried out xor operation, obtain new data, and the data that this is new form new matrix together with k, m value.Specific practice is as follows: computer carries out RS-232 with 51 single-chip microcomputers communicates by letter, and 51 single-chip microcomputers obtain data and deposit in the Single Chip Microcomputer (SCM) program memory, utilize formula: N=2
k(2m-1) calculate k and m value, circular is as follows: formula N=2
k(2m-1) by two parts, formed 2
kCalculate even number value, 2m-1 calculates odd number value, to formula N=2
k(2m-1) get take 2 ， of the logarithm the end of as Ze ㏒
2N=㏒
22
k+ ㏒
2(2m-1), when N is even number, require m=1 ， ㏒
22
k=k ， ㏒
2(2m-1)=0 computer program realizes that this algorithm detailed process is, even number N is moved to right, and mobile number of times is the k value, and mobile digital N position is 1 o'clock, illustrates in digital N odd number is arranged, and needs to use formula N=2
k(2m-1) (2m-1) calculates the m value, this moment 2
k=1, k=0 is described, N '=2m-1, m=(N '+1)/2, draw the m value, namely obtain k, the m value of Integer N; When N is odd number, require k=0, m=(N+1)/2, directly obtain the m value and get final product.Carry out xor operation with k, m value and Integer N, obtain N
*Value, utilize N
*Value and k and m value are carried out matrix and are reconfigured, and obtaining needs to encrypt new matrix, and in Fig. 1,51 single-chip microcomputers transmit to be connected with the FPGA data and are: p1.0---p1.7 is 51 single-chip microcomputer parallel data lines, and p1.0 is low level, and p1.7 is high-order.And pd0----pd7 is the FPGA parallel data line, and pd0 is low level, and pd7 is high-order.These two chip data lines directly are connected.51 single-chip microcomputers and FPGA control signal explanation in Fig. 1: the p2.0:51 single-chip microcomputer output signal of hurrying, the p2.1:51 single-chip microcomputer is write output signal (output signal), and the p2.2:51 single-chip microcomputer input signal that hurries, from FPGA(IO
2) obtain, p2.3:51 single-chip microcomputer read signal, from FPGA(IO
3) obtain IO
0: the FPGA input signal that hurries, IO
1: FPGA reads input signal, IO
2: the FPGA output signal of hurrying, IO
3: FPGA writes output signal, and: p2.0---IO
0Correspondence, link together, p2.1---IO
1Correspondence, link together, p2.2---IO
2Correspondence, link together, p2.3---IO
3Correspondence, link together, the p2.0 Low level effective, and expression 51 single-chip microcomputers are busy, IO in FPGA
051 single-chip microcomputer p2.0 low levels detected, explanation can receive the data that 51 single-chip microcomputers send, and p2.0 is high level, FPGA stops communicating with 51 single-chip microcomputers, the p2.1 Low level effective, and expression 51 single-chip microcomputers provide write signal, after DSR on data wire, after this signal is effective, IO in FPGA
1The low level signal that 51 single-chip microcomputers send detected, start read data, IO
2Low level effective, expression FPGA is busy, if it is low level that 51 single-chip microcomputer p2.2 detect this signal, illustrate that FPGA is busy, single-chip microcomputer p2.2 detects low level, and the monolithic function receives the data that FPGA sends, and only has single-chip microcomputer p2.2 high level to be detected, stop data between FPGA and 51 single-chip microcomputers and transmit, IO
3Low level, expression FPGA provides write signal (51 single-chip microcomputer read signal), 51 single-chip microcomputers start read data, signal in Fig. 1 in the epcs4 memory chip has: ncs, data, asdi, dclk, ncs, data, asdi, dclk signal are connected with FPGA respectively, after the FPGA debugging finishes, program is deposited in the epcs4 memory, after the FPGA outage, while re-powering, program in the epcs4 memory is encased in FPGA automatically, Asdi: be from sheet configuration read signal, data are in initiatively serial of as() be special-purpose output under pattern.from sheet configuration reading out data, use as I/O under ps and jtag pattern, mainly completing the epcs4 chip program is encased in FPGA, nCS: be enable signal, under the as pattern, be used for sending Enable Pin to outside series arrangement chip, program is encased in enable signal in epcs4, Data: be data-signal, coordinate with dclk, when being low level, the nCS signal (is chip selection signal this moment), can transmit and receive data, Dclk: be clock signal, direct and FPGA joins, obtain the FPGA clock frequency signal, these four signals form the usb serial communication interface of standard.Here epcs4 is the standard using method, does not need too much to understand its operation principle and using method.51 single-chip microcomputers and FPGA data transfer procedure are as follows: at first with low level of p2.0 output, IO in FPGA
0Low level detected, prepare to receive data, then 51 single-chip microcomputer p1(p1.0---p1.7) mouthful data are delivered on data wire p2.1 output low level (write signal) then, IO in FPGA
1After low level signal being detected, receive the data on data wire, and deposit data is arrived in the FPGA designated memory cell, the p2.1 output low level becomes high level, and 51 single-chip microcomputers can continue to send data to FPGA, repeats aforesaid operations, keeping simultaneously p2.0 is low level, until do not need to transmit data.51 single-chip microcomputers do not need to send data to FPGA, and p2.0 is exported high level, illustrate that data transmit end, if FPGA sends data to 51 single-chip microcomputers, IO
2Output low level, expression FPGA is busy, and data, by dp0-dp7 output, are sent to data on data wire IO
3Output low level, namely write letter, and sends data to 51 single-chip microcomputers, and 51 single-chip microcomputers are according to IO
3The state of signal (low level) reading out data, 51 single-chip microcomputers detect IO simultaneously
2State, if IO
2For low level, illustrate that data transmit end, need to continue to receive data, only have IO
2, for high level, illustrate that data transmit end.In Fig. 1, power module adopts the reference power supply module, and being mainly 51 single-chip microcomputers provides+5v power supply and providing+the 3.3v power supply for FPGA.
(c), FPGA receives 51 single-chip microcomputers and transmits new matrix datas, and new matrix is rotated displacement, obtains enciphered data, and enciphered data is sent on another equipment by network, completes whole ciphering process.
According to the FPGA module in Fig. 1, the displacement of realization matrix data rotation, the FPGA circuit in 51 single-chip microcomputers and FPGA connection layout, data are completed the matrix data rotation displacement in this module.
Take 8 * 8 matrixes as example: below be 8 * 8 matrix element spread patterns
a0.0a0.1…… a0.7
a1.0a1.1…… a1.7
. .
. .
. .
a6.0a6.1…… a6.7
a7.0a7.1…… a7.7
arrange according to 8 * 8 matrixes, can find out the matrix element aligning method, outer matrix element have the first row element, last column element, the left side one row, the right side one column element forms, the every movement one bit element of these elements, all outermost layer elements are all followed mobile one, if matrix neutral element a3.3, a3.4, a4.3, these four elements of a4.4 maintain static, this nibble element, form data, determine outer, this skin, the 3rd layer of mobile number of times, be a3.3, a3.4, a4.3, a4.4 forms outer mobile hexadecimal number, maximum is 0FH, minimum value is 00H, so outer mobile number of times is fixed, if: a3.3=0, a3.4=1, a4.3=1, a4.4=0, obtain 0110 binary number, hexadecimal number is 6H, therefore outermost layer need to move 6 times, as a same reason: the mobile number of times of inferior skin, it can be another spread pattern of neutral element, be a4.3, a4.4, a3.3, a3.4 combination, hexadecimal number is arranged: 9H, inferior outer mobile 9 times, the 3rd layer of mobile neutral element aligning method is that to obtain hexadecimal number be 6H for a3.3, a4.3, a3.4, a4.4, the 3rd layer of movement 6 times, whole like this matrix rotation end-of-shift, complete whole encryption, by the FPGA serial ports, data is sent in network finally.Whole encryption finishes.
Claims (1)
1. matrix rotation carry digit encryption method is characterized in that comprising the following steps:
(A) utilize the interior data of computer storage, according to the integer calculations formula, obtain data encryption key, key and former data are carried out xor operation, obtain transform data and form new matrix together with key, utilize every layer of element computing formula of matrix, every layer of change frequency of compute matrix data, carry out the matrix element rotation displacement, set up the matrix rotation ordinal relation, realize data encryption, then by network, communicate, reach the purpose of exchanges data;
(B) to mentioning and obtain data encryption key in step (A), the matrix element rotation displacement, set up the matrix rotation ordinal relation, realizes data encryption, and concrete steps are as follows:
The first step, obtain data encryption key
Computer in internal memory, carries out ordered arrangement to the deposit data of required encryption,, as encrypting initial data and, by computer serial interface, being sent in 51 single-chip microcomputers, utilizes formula (1) N=2
k(2m-1) by 51 single-chip microcomputers, carry out cipher key calculation, obtain key k and m value, in formula (1): N encrypts initial data, and m is the calculated value of N while being odd number, the functional relation between expression m and encryption initial data N, m=1,2,3 K is the calculated value of N while being even number, k=0,1,2,3 Again key k or m and encryption initial data N are carried out xor operation, obtain new enciphered data N* value; Again N*, k and m value are rearranged together, form the matrix of a new needs rotation;
Second step, matrix element rotation displacement
51 single-chip microcomputers, with the new matrix data of having changed,, by parallel interface, are sent in FPGA, and the matrix data that FPGA changes according to 51 single-chip microcomputers, carry out the matrix element rotation displacement, and the matrix rotation shift count is by square formation element computing formula (2) S=2
2* (N-(2i-1)) or according to rectangular matrix formula (3) S=2 * (N+M-2 (2j+1)), decide, in formula (2): i is number of plies changing value, i=1,2,3, S is the every one deck element number of matrix, and N is square formation row, column number and to matrix size, is directly proportional; In formula (3): S is the every one deck element number of matrix, and N is that matrix line number, M are that the matrix columns all is directly proportional to matrix size, and j is number of plies changing value, j=0, and 1,2,3, If the S evaluation is less than the fixing non-rotary combination of numbers value of matrix, illustrate that the matrix rotation number of times satisfies condition, can rotate, otherwise recalculate number of revolutions, until the S value is less than the fixing non-rotary combination of numbers value of matrix, finally can select a matrix rotation number of times, according to the number of revolutions of calculating, start to carry out the matrix rotation displacement, at first the outermost layer data are rotated, then, to inferior outer rotation, until matrix is fixed non-rotary numeral, thereby realize the rotation encryption of data in matrix; Data after encryption, be sent in another computer by serial line interface; When solving matrix element rotation displacement, the mobile element number of times, can not surpass the S value in formula (2), (3), prevents the repetition rotation phenomenon.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112491648A (en) * | 2020-11-17 | 2021-03-12 | 重庆美沣秦安汽车驱动系统有限公司 | Automobile communication data conversion method based on CAN communication matrix and storage medium |
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|---|---|---|---|---|
| US5799089A (en) * | 1993-10-14 | 1998-08-25 | Irdeto B.V. | System and apparatus for blockwise encryption/decryption of data |
| US20090220071A1 (en) * | 2008-02-29 | 2009-09-03 | Shay Gueron | Combining instructions including an instruction that performs a sequence of transformations to isolate one transformation |
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