CN103389953A - Image wave beam forming method and image wave beam forming device - Google Patents

Image wave beam forming method and image wave beam forming device Download PDF

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CN103389953A
CN103389953A CN2013103258627A CN201310325862A CN103389953A CN 103389953 A CN103389953 A CN 103389953A CN 2013103258627 A CN2013103258627 A CN 2013103258627A CN 201310325862 A CN201310325862 A CN 201310325862A CN 103389953 A CN103389953 A CN 103389953A
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memory
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CN103389953B (en
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朱洵
朱春鹏
李毅
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Beijing East Whale Image Technology Co Ltd
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Abstract

The invention discloses an image wave beam forming method and an image wave beam forming device. The image wave beam forming method comprises the following steps of utilizing a deserialize receiver to receive serial data and convert the serial data into parallel data; utilizing a FIFO (first-in first-out) memory to store the parallel data which is used as original data; utilizing an interpolation filter to carry out the up-sampling operation for the original data to obtain the up-sampling data; utilizing a random access memory to store the up-sampling data, and converting the up-sampling data to the vector data; utilizing a vector data memory to store the vector data, and utilizing a microcontroller unit to process the vector data outputted by the vector data memory and generate a vector address; utilizing a vector address memory to store the vector address, and feeding back the vector address to the random access memory. The microcontroller unit is provided with a microcontroller unit memory which is used as a memory for the operation of the microcontroller unit, so that the matching problem between the processor and the wave beam forming data stream can be solved.

Description

A kind of image Beamforming Method and device
Technical field
The present invention relates to the medical image technical field, in particular to a kind of image Beamforming Method and device.
Background technology
In recent years, the requirement that image system is processed operand to signal improves constantly, and for example in the ultrasonic image field: the front passage number rolls up, by 64 passages to 256 passages and even more hyperchannel transition; The high-resolution image quality, form as multi-beam, sequential focusing, colour, code excitation etc.; At a high speed real-time multiplanar image, as 3D image, 4D image, high frequency cardiac imaging etc., therefore, operand becomes hundred times of increases, the processor calculating ability has been proposed unprecedented requirement, but along with the universalness day by day of medical imaging equipment, the cost pressure of processor but goes up not down, and has seriously fettered development and the application of image system technology.the above-mentioned technological means of currently used solution has: (1) field programmable gate array (field programmable gate arrays, FPGA is programmable chip, the method for designing of FPGA comprises hardware design and Software for Design two parts, hardware comprises the fpga chip circuit, storer, input/output interface circuit and miscellaneous equipment, software is namely corresponding HDL program and embedded type C program, there is the problem of software translating duration in engineering practice, the functional module that comprises a plurality of complexity due to large-scale design, its timing closure and simulating, verifying complexity are very high, in order to meet the requirement of sequential index, often need repeatedly to revise source file, again the redaction of revising is recompilated, until meet the demands, cause thus easily producing two problems: at first, software translating once needs to reach a few hours time of a couple of days even, this is that exploitation institute is flagrant, secondly, after recompility and placement-and-routing, result difference is very large, can the circuit damage of sequential will be met, in addition, FPGA also has high power consumption and high price, therefore, FPGA also can't meet the demands, (2) polycaryon processor (Multi-core and Many-core CPU and DSP), although have cost advantage, but its general system framework can't meet the calculation requirement that wave beam forms, the polycaryon processor power consumption is large, and need the application software support additionally to support, general polycaryon processor can provide sizable data-handling capacity, but they all are based on reduced instruction set (RISC) architecture of superscale (superscalar) or vector (vector) processor, single instruction multiple data (SIMD) for example, very long instruction word (VLIW) (VLIW) and vector (VECTOR) data framework etc., they only have limited and simple addressing data mode, the image data of magnanimity can't mate above-mentioned data structure and multi-core system, operation efficiency is very low, moreover current novel imaging system adopts Multi-point focusing or pointwise sequential focusing mode to form wave beam more, this is a kind of non-linear addressing mode, the multinuclear risc processor can't be obtained required data effectively, therefore polycaryon processor also can't meet the demands, (3) graphic process unit (GPU), although its treatment capacity is larger, it also can't effectively deal with the boundling framework that dot matrix is treated to purpose the line disposal system that wave beam forms.
Therefore, present image system signal processing technology is further improved.
Summary of the invention
The purpose of this invention is to provide a kind of image Beamforming Method and device, be intended to solve the matching technique problem of processor and wave beam formation data stream.
In one aspect of the invention, the present invention proposes a kind of image Beamforming Method.According to embodiments of the invention, the method comprises: the reception of data and conversion, utilize string and conversion receiver receive serial data and are converted into parallel data; The storage of data, utilize the described parallel data of first in first out data buffer storage, as raw data; The liter sampling computing of data, utilize interpolation filter that described raw data is carried out a liter sampling computing, to obtain rising sampled data; The vector quantization of data, utilize the described sampled data that rises of random access memory storage, and make the described sampled data that rises be converted to vector data; The processing of data, utilize the described vector data of vector data memory storage, and then utilize micro-control unit to process the described vector data of described vector data memory output, and produce vector address; And the feedback of vector address, utilize the described vector address of vector address memory stores, and described vector address is fed back to described random access memory, wherein, described micro-control unit is provided with the micro-control unit storer, as the required storer of the computing of described micro-control unit.
Preferably, described rise sampled data be raw data K doubly, K is not less than 16 integer.
Preferably, the process of the vector quantization of described data is as shown in following formula: vRAM(n)=sRAMn(*iRAM(n)), wherein, n is not less than 1 integer, vRAM is the vector data in vector data memory, sRAMn is the vector data in random access memory, and iRAM is the vector address in the storer of vector address.
Preferably, n vector address is corresponding one by one with n vector data, and n is not less than 1 integer.
Preferably, the magnitude setting of described string and conversion receiver, described first in first out data buffer, described interpolation filter and described random access memory is N, and wherein, N is not less than 32 integer.
Preferably, the size of described first in first out data buffer is 32B; And/or described interpolation filter is the leggy interpolation filter; And/or the size of described random access memory is 256B; And/or the size of described vector data memory is 128B; And/or the size of described vector data memory is 128B.
Preferably, the quantity of described vector data memory, described vector address storer, described micro-control unit and described micro-control unit is 1.
Preferably, described micro-control unit comprises at least one polycaryon processor.
Preferably, described polycaryon processor is four core Cortex A15 processors.
, in another aspect of the present invention, the present invention proposes a kind of image beam-forming device of image Beamforming Method.According to embodiments of the invention, this device comprises: string and conversion receiver are used for receiving the external series data and being converted to parallel data, to obtain parallel data; The first in first out data buffer, be connected with described string and conversion receiver, is used for storing the described parallel data of described string and conversion receiver output, to obtain raw data; Interpolation filter, be connected with described first in first out data buffer, is used for the described raw data of described first in first out data buffer output is carried out a liter sampling computing, to obtain rising sampled data; Random access memory, be connected with described interpolation filter, is used for storing the described sampled data that rises of described interpolation filter output, and makes the described sampled data that rises be converted to vector data; Vector data memory, be connected with described random access memory, is used for storing the described vector data of described random access memory output; Micro-control unit, be connected with described vector data memory, for the treatment of the described vector data of described vector data memory output, and produces vector address; And vector address storer, with described micro-control unit be connected random access memory and be connected, be used for storing the described vector address of described micro-control unit output, and described vector address is fed back to described random access memory, wherein, described micro-control unit comprises the micro-control unit storer, as the required storer of the computing of described micro-control unit.
The good effect of image Beamforming Method of the present invention and device is: solved general processor and wave beam and formed the matching problem of data stream, the memory architecture of very easily realizing allows data to process high-speed cruising, can use to greatest extent local reservoir to reduce the movement of data, therefore reduced power consumption, and then reached efficient and purpose that low-power consumption is processed, and solved the synthetic framework of image wave beam in the prior art and be difficult for the problem of expansion and data and process not in time problem; Image Beamforming Method of the present invention and device focus on addressing to complicated Nonlinear Dynamic and become vector data structure, unique beam vector converting unit becomes the vector data structure that processor is wished to the linear scan data, and then has greatly improved data throughput; Adopt the large scale integrated circuit of multinuclear superscalar processor can form efficiently the multi-beam image.In addition, can also select according to actual needs different numbers of channels,, by structural adjustment, for example increase processor, realize multi-channel signal processing, thereby make the scope of application of image Beamforming Method of the present invention and device more extensive.
Description of drawings
Accompanying drawing described herein is used to provide a further understanding of the present invention, forms the application's a part, and illustrative examples of the present invention and explanation thereof are used for explaining the present invention, do not form improper restriction of the present invention.In the accompanying drawings:
Fig. 1 is the method flow schematic diagram of image Beamforming Method according to an embodiment of the invention;
Fig. 2 is the structured flowchart of image beam-forming device according to a different embodiment;
Fig. 3 is the schematic diagram of the enforcement the preferred embodiment of the present invention of another embodiment according to the present invention.
Embodiment
Hereinafter with reference to accompanying drawing, also describe in conjunction with the embodiments the present invention in detail.Need to prove, in the situation that do not conflict, embodiment and the feature in embodiment in the application can make up mutually, and in addition, embodiment is exemplary, only are used for explaining the present invention, and can not be interpreted as limitation of the present invention.
In one aspect of the invention, the invention provides a kind of image Beamforming Method.As shown in Figure 1, according to embodiments of the invention, the method comprises: the storage of the reception of S100 data and conversion, S200 data, the liter of S300 data sampling computing, the vector quantization of S400 data, the processing of S500 data and the feedback step of S600 vector address.In the S100 step, utilize string and conversion receiver to receive serial data, and converting high-speed serial is changed to parallel data; In the S200 step,
Utilize first in first out data buffer memory parallel data, obtain raw data; In the S300 step, utilize interpolation filter that raw data is carried out a liter sampling computing, to obtain rising sampled data; In the S400 step, utilize random access memory storage to rise sampled data, and make and rise sampled data and be converted to vector data; In the S500 step, utilize the vector data memory store vector data, and then utilize the vector data of micro-control unit processing vector data-carrier store output, and produce vector address; In the S600 step, utilize memory stores vector address, vector address, and vector address is fed back to random access memory, wherein, the micro-control unit storer that micro-control unit arranges is as the required storer of the computing of micro-control unit.
In the present invention,, by serial data is converted to parallel data, make deal with data speed faster, the deal with data amount is larger; By a liter sampling computing, can gather view data more, and the view data of sampling is more, the image information of obtaining is accurate, can improve display precision and the resolution of later image; By storing vector data, not only be fit to the data of storage magnanimity, and be more suitable for micro-control unit and process, improve treatment effeciency; , by the feedback of vector address, can effectively control the input data according to the picture quality in later stage.
As shown in Figure 1, according to the embodiment of the present invention, in the liter sampling calculation step of S300 data, the liter sampled data is K times of raw data, K is not less than 16 integer, thereby by a liter sampling computing, can gather view data more, improves display precision and the resolution of image.
As shown in Figure 1, according to the embodiment of the present invention, the process of the vector quantization of S400 data is as shown in following formula:
vRAM(n)=sRAMn(*iRAM(n)),
Wherein, n is not less than 1 integer, and vRAM is the vector data in vector data memory, and sRAMn is the vector data in random access memory, and iRAM is the vector address in the storer of vector address; According to a particular embodiment of the invention, preferably, a vector data is pointed in a vector address, n vector data pointed in n vector address, and n vector data pointed in n vector address, wherein, n is not less than 1 integer, and vector address and vector data are corresponding one by one.
In of the present invention, above-described string and conversion receiver, first in first out data buffer, interpolation filter, random access memory, quantity and the model size of vector data memory, vector address storer, micro-control unit and micro-control unit reservoir are not particularly limited, for example, the magnitude setting of string and conversion receiver, first in first out data buffer, interpolation filter, random access memory is N, wherein, N is not less than 32 integer; The size of first in first out data buffer is that 32B, interpolation filter are the leggy interpolation filter, and the size of random access memory is 256B, and the size of vector data memory is 128B, and the size of vector address storer is 128B; The quantity of vector data memory, vector address storer, micro-control unit and micro-control unit is 1.
According to embodiments of the invention, above-described micro-control unit comprises at least one polycaryon processor, preferred four core Cortex A15 processors.
Of particular note, the present invention is an extendible or technical scheme of dwindling flexibly, can be according to concrete number of channels, by the Solving Multichannel signal processing problems very easily of the mode such as increasing or reduce the component parts quantity such as above-mentioned processor.For example, use the processor of 1 can realize N passage image system, 2 processors can be realized 2N passage image system so, 3 processors can be realized 3N passage image system, by that analogy, make the practicality of image Beamforming Method of the present invention stronger, the scope of application is more extensive.
, in another aspect of the present invention, the invention provides a kind of image beam-forming device.as shown in Figure 2, according to embodiments of the invention, this device comprises: string and conversion receiver 100, first in first out data buffer 200, interpolation filter 300, random access memory 400, vector data memory 500, vector address storer 600 and micro-control unit 700, it is (not shown that micro-control unit 700 comprises the micro-control unit storer, lower same), wherein, first in first out data buffer 200 is connected with string and conversion receiver 100, interpolation filter 300 is connected with first in first out data buffer 200, random access memory 400 is connected with interpolation filter 300, vector data memory 500 is connected with random access memory 400 is connected connection with micro-control unit, vector address storer 700 is connected and is connected with random access memory with micro-control unit 600.In addition, front, for the described feature and advantage of image Beamforming Method, also is suitable for this device natch, repeats no more.
, for further illustrating,, in conjunction with Fig. 1~3, below provide one to implement preferred implementation of the present invention:
S100: the reception of data and conversion
Utilize the image data of 64 strings and 64 passages of conversion receiver (Deserializer) reception, the serial data of 600Mbps is converted to the parallel data of per second 50M sampling point 12bit.
S200: the storage of data
64 first in first out data buffer (First in first out buffers that size is 32B, FIFO) be connected with 64 strings and conversion receiver (Deserializer) respectively, be used for the parallel data of storage string and conversion receiver (Deserializer) output.
S300: the liter sampling computing of data
64 leggy interpolation filters (Multiphase Interpolation Filter) are connected with 64 first in first out data buffers (FIFO) respectively, be used for the raw data of first in first out data buffer (FIFO) output is risen 16 times of samplings, the 50MSPS signal becomes 800MSPS.
S400: the vector quantization of data
64 random access memory (Static random access memory that size is 256kB, sRAM) be connected with 64 leggy interpolation filters (Multiphase Interpolation Filter) respectively, be used for storing rising sampled data and producing vector data of leggy interpolation filter (Multiphase Interpolation Filter) output; The vector address storer that 2 sizes are 128B (Delay Indexing RAM is set, iRAM) be connected with random access memory (sRAM), be used for the vector address that storage generates vector data, certain vector data of a scan channel is pointed in each vector address, and 64 vector datas of 64 scan channels can be pointed in 64 vector addresses; The vector data memory that 2 sizes are 128B (Beam Vector Data RAM, vRAM) is set with random access memory (sRAM), is connected, for the vector data after the storage vector quantization.
S500: the processing of data:
2 four core Cortex A15 processors are set, and the computing required storer of 2 micro-control unit storeies (MCU Memory mRAM) as four core Cortex A15 be set, Cortex A15 processor and vector address storer (DelayIndexing RAM, iRAM) and vector data memory (Beam Vector Data RAM, vRAM) connect, for the treatment of vector data and produce vector address, vector address is stored in vector address storer (Delay Indexing RAM, iRAM).
S600: the feedback of vector address:
Vector address storer (Delay Indexing RAM, iRAM) be connected sRAM with random access memory with four core Cortex A15 processors) be connected, the index of the vector address conduct of output, with the data reading in random access memory (sRAM), deposit vector data memory (Beam Vector Data RAM in, vRAM), realize data vector, the vector quantization process can represent with following formula:
vRAM(n)=sRAMn(*iRAM(n)),
Wherein, 1≤n≤64, and n is integer, and vRAM is the data in vector data memory, and sRAMn is the data in random access memory, and iRAM is the data in the storer of vector address.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (10)

1. an image Beamforming Method, is characterized in that, comprising:
The reception of data and conversion, utilize string and conversion receiver receive serial data and are converted into parallel data;
The storage of data, utilize the described parallel data of first in first out data buffer storage, uses as raw data;
The liter sampling computing of data, utilize interpolation filter that described raw data is carried out a liter sampling computing, to obtain rising sampled data;
The vector quantization of data, utilize the described sampled data that rises of random access memory storage, and the described sampled data that rises be converted to vector data;
The processing of data, utilize the described vector data of vector data memory storage, and then utilize micro-control unit to process the described vector data of described vector data memory output, and produce vector address; And
The feedback of vector address, utilize the described vector address of vector address memory stores, and described vector address is fed back to described random access memory,
Wherein,
Described micro-control unit is provided with the micro-control unit storer, as the required storer of the computing of described micro-control unit.
2. image Beamforming Method according to claim 1, is characterized in that, described rise sampled data be raw data K doubly, K is not less than 16 integer.
3. image Beamforming Method according to claim 1, is characterized in that, adopts following formula that described data are converted to vector data
vRAM(n)=sRAMn(*iRAM(n)),
Wherein,
N is not less than 1 integer, and vRAM is the vector data in vector data memory, and sRAMn is the vector data in random access memory, and iRAM is the vector address in the storer of vector address.
4. image Beamforming Method according to claim 3, is characterized in that, n vector address is corresponding one by one with n vector data,
And,
N is not less than 1 integer.
5. according to claim 1~4 described image Beamforming Methods of any one, it is characterized in that, the magnitude setting of described string and conversion receiver, described first in first out data buffer, described interpolation filter and described random access memory is N, and wherein, N is not less than 32 integer.
6. image Beamforming Method according to claim 5, is characterized in that, the size of described first in first out data buffer is 32B;
And/or described interpolation filter is the leggy interpolation filter;
And/or the size of described random access memory is 256B;
And/or the size of described vector data memory is 128B;
And/or the size of described vector data memory is 128B.
7. image Beamforming Method according to claim 5, is characterized in that, the magnitude setting of described vector data memory, described vector address storer, described micro-control unit and described micro-control unit storer is 1.
8. image Beamforming Method according to claim 7, is characterized in that, described micro-control unit comprises at least 1 polycaryon processor.
9. image Beamforming Method according to claim 8, is characterized in that, described polycaryon processor is four core CortexA15 processors.
10. an image beam-forming device, is characterized in that, comprising:
String and conversion receiver, be used for receiving the external series data and being converted to parallel data, to obtain parallel data;
The first in first out data buffer, be connected with described string and conversion receiver, is used for storing the described parallel data of described string and conversion receiver output, to obtain raw data;
Interpolation filter, be connected with described first in first out data buffer, is used for the described raw data of described first in first out data buffer output is carried out a liter sampling computing, to obtain rising sampled data;
Random access memory, be connected with described interpolation filter, is used for storing the described sampled data that rises of described interpolation filter output, and makes the described sampled data that rises be converted to vector data;
Vector data memory, be connected with described random access memory, is used for storing the described vector data of described random access memory output;
Micro-control unit, be connected with described vector data memory, for the treatment of the described vector data of described vector data memory output, and produces vector address; And
The vector address storer, with described micro-control unit be connected random access memory and be connected, be used for storing the described vector address of described micro-control unit output, and described vector address fed back to described random access memory,
Wherein,
Described micro-control unit comprises the micro-control unit storer, as the required storer of the computing of described micro-control unit.
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