CN103366058B - FPGA-based high-dimensional Kalman filter and implementation method thereof - Google Patents
FPGA-based high-dimensional Kalman filter and implementation method thereof Download PDFInfo
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Abstract
The invention relates to an FPGA (Field Programmable Gate Array)-based high-dimensional Kalman filter and an implementation method thereof and belongs to the technical field of aerospace navigation. The FPGA-based high-dimensional Kalman filter comprises a filtering logic controller, a double-precision arithmetic unit and a data storage unit; the filtering logic controller comprises a state prediction controller, a covariance prediction controller, a state update controller, a Kalman gain update controller and a covariance update controller; the arithmetic unit mainly comprises a double-precision multiplier, a double-precision divider, a double-precision adder and a double-precision subtracter. The addressing range of the data storage unit can be adjusted, and the data stored in each address are 64-bit double-precision floating point data. The four sub arithmetic units can independently and concurrently fulfill a double-precision filtering calculation under single clock so as to greatly improve the execution speed and calculation precision of the high-dimensional Kalman filtering algorithm.
Description
Technical field
The present invention relates to the higher-dimension Kalman filter based on FPGA and its implementation, belong to the navigation in Aero-Space
Technical field.
Background technology
Kalman filtering designs wave filter using state space method in time domain, is a kind of solution discrete system linear filtering
The recursion optimal estimation algorithm of problem.Since 1960's, Kalman filtering algorithm has obtained in-depth study and extensively
Engineer applied, many outstanding technological contributions all can be partly due to Kalman filter, and it has many military affairs, industry
And the application of science.Wherein main application includes:The navigation of spaceship, the guidance of guided missile and control, satellite navigation with fixed
Position, radar and aircraft autopilot etc..
In actual applications, Kalman filter to be realized frequently with general processor, such as single-chip microcomputer, DSP Processor
And arm processor.Kalman filter on general processor typically passes through C language programming realization, thus it has design
Simple feature.But because Kalman filter has substantial amounts of higher dimensional matrix addition subtraction multiplication and division computing during computing, with
The processor of Shi Tongyong employs the hardware structure of program order execution, thus in the occasion higher to requirement of real-time, leads to
Tend not to enough meet the requirement to the speed of service for the system with the Kalman filter on processor.Hold for general purpose microprocessor
The scanning frequency degree defect low compared with slow, efficiency, (Field Programmable Gate Array, scene can be compiled to make full use of FPGA
Journey gate array) oneself height concurrency, execute fireballing feature, in the last few years people in FPGA customize Kalman filtering
The hardware circuit of algorithm expands preliminary research.And the Kalman filter being currently based on FPGA is limited to patrol inside fpga chip
Collect resource-constrained, thus the matrix dimension of designed wave filter is relatively low, row operation is entered using fractional fixed point simultaneously and save computing
Resource, this greatly reduces the filtering performance of Kalman filter.
Content of the invention
The technology of the present invention solve problem：Overcome the deficiencies in the prior art, a kind of filter of the higher-dimension Kalman based on FPGA is provided
Ripple device and its implementation, with solve conventional processors execute higher-dimension Kalman filtering algorithm speed is slow, precision is low, thus meeting
The problem of impact navigation performance, substantially increases execution speed and the computational accuracy of higher-dimension Kalman filtering algorithm.
The technology of the present invention solution：Based on the higher-dimension Kalman filter of FPGA, as shown in figure 1, including：Filtering logic
Controller, arithmetic unit and memory；Described filtering logic controller is by status predication controller (2a), covariance predictive controller
(2b), kalman gain updates controller (2d), and state updates controller (2c) and covariance updates controller (2e) five and patrols
Collect sub-controller composition；Described arithmetic unit is by double-precision multiplication device (3a), double precision divider (3b), double adder (3c)
And the sub- arithmetic unit of double precision subtracter (3d) four is constituted, every sub- arithmetic unit has two data-in ports and a data
Output port；
Logic controller gives filtering sequential, under the constraint of filtering sequential, the data reading from data storage is assigned
It is worth to the input port of arithmetic unit, and the output data of arithmetic unit is written in data storage；
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter
(3d) inputoutput data of four sub- arithmetic units is all connected with memory by data/address bus；When status predication controller
(2a), covariance predictive controller (2b), kalman gain updates controller (2d), and state updates controller (2c) and covariance
After the given sequential of five logic sub-controllers institutes of renewal controller (2e) execute successively, then complete once to filter, now recycle
Execution, realizes Real-Time Filtering.
Described memory to be realized using RAM, and the address-bus width of RAM is 12, addressing range 0-4095, each
The data width of addressed memory storage is 64, illustrates a double-precision floating point type data, the data sectional composition of storage in RAM
The parameter matrix of filtering algorithm and intermediate variable matrix.The Kalman filter of 15 dimensions can be realized under this design structure, so
Passing through again afterwards to increase the width of address bus, expanding the addressing range of memory further, thus completing the karr of higher dimension
Graceful wave filter.
Based on the higher-dimension Kalman filter implementation method of FPGA, first the filtering algorithm correlation matrix in memory is entered
Go and initialize, then five steps below repetition under conditions of constantly from outside reading observed quantity, thus complete Kalman filtering
Wave process, is implemented as：
(1) status predication controller completion status prediction
Status predication controller (2a) needs to control and reads relevant with status predication data in memory, required for delivering to
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter (3d) four
Sub- arithmetic unit is calculated, and result of calculation is written to the status predication result storage region in memory, complete in this process
Become 1 " square formation × column vector " computing；
(2) covariance predictive controller completes covariance prediction
Covariance predictive controller needs to control successively and reads relevant with covariance prediction data in memory, delivers to institute
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and the double precision subtracter (3d) needing
Four sub- arithmetic units are calculated, and covariance result of calculation being written in memory predicts the outcome storage region, here
Process completes 1 " square formation × square formation " computing, 1 " square formation × square formation " computing and 1 " square formation+square formation " computing；
(3) kalman gain renewal controller completes kalman gain renewal
Kalman gain updates controller and needs to control relevant with kalman gain renewal number in reading memory successively
According to, the double-precision multiplication device (3a) required for delivering to, double precision divider (3b), double adder (3c) and double precision subtract
Four sub- arithmetic units of musical instruments used in a Buddhist or Taoist mass (3d) are calculated, and the kalman gain that result of calculation is written in memory updates result and deposits
Storage area domain, completes 1 " square formation × square formation " computing, 1 " square formation × square formation " computing in this process, 1 time " square formation+square formation " transports
Calculation, 1 submatrix inversion operation and 1 " square formation × square formation " computing；
(4) state updates controller completion status and updates
State updates controller and needs to control relevant with state renewal data in reading memory successively, required for delivering to
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter (3d) four
Sub- arithmetic unit is calculated, and state result of calculation being written in memory updates result storage region, complete in this process
Become 1 " square formation × column vector " computing, 1 " column vector-column vector " computing, 1 " square formation × column vector " computing and 1 " row
Vector+column vector " computing；
(5) covariance renewal controller completes covariance renewal
Covariance updates controller and needs to control relevant with covariance renewal data in reading memory successively, delivers to institute
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and the double precision subtracter (3d) needing
Four sub- arithmetic units are calculated, and covariance result of calculation being written in memory updates result storage region, here
Process completes 1 " square formation × square formation " computing, 1 " square formation-square formation " computing and 1 " square formation × square formation " computing.
Present invention advantage compared with prior art is：
(1) instant invention overcomes executing the low deficiency of speed, four son fortune in Kalman filtering algorithm in general processor
Calculate the filtering calculating that device can complete a double precision under single clock independent parallel, substantially increase higher-dimension Kalman filter
The execution speed of ripple algorithm and computational accuracy.
(2) present invention can be by changing the width of memory address bus come to filter on the basis of existing hardware configuration
Ripple dimension is adjusted, the Design on Kalman Filter of compatible low-dimensional, has preferable autgmentability.
Above-described " column vector+column vector " and " square formation+square formation " computing are added by FPGA design higher dimensional matrix
Logic control state machine realizing, FPGA design higher dimensional matrix is passed through in " column vector-column vector " and " square formation-square formation " computing
Realizing, FPGA design higher-dimension is passed through in " square formation × column vector " and " square formation × square formation " computing to the logic control state machine subtracting each other
The logic control state machine of matrix multiple is realizing, and the logic control that matrix inversion operation is inverted by FPGA design higher dimensional matrix
State machine processed is realizing.
Brief description
Fig. 1 is the higher-dimension Kalman filter Design of Hardware Architecture schematic diagram based on FPGA for the present invention；
Fig. 2 executes, for wave filter of the present invention, the logic control state machine diagram that higher dimensional matrix is added；
Fig. 3 executes, for wave filter of the present invention, the logic control state machine diagram that higher dimensional matrix subtracts each other；
Fig. 4 executes, for wave filter of the present invention, the logic control state machine diagram that higher dimensional matrix is inverted；
Fig. 5 executes, for wave filter of the present invention, the logic control state machine diagram that higher dimensional matrix is multiplied；
Fig. 6 reads and writes the SECO schematic diagram of RAM memory for hardware configuration of the present invention.
Specific embodiment
The essence of Kalman filtering is by the state vector of measured value reconfiguration system, and it is with " prediction actual measurement is revised "
Order recursion, the measured value according to system, to eliminate random disturbances, obtains optimal estimation value.
Come below specifically to introduce the algorithm of Kalman filter.
First, introduce the system of a discrete control process.This system can be described with a linear random differential equation：
X (k)=F*X (k-1)+B*U (k)+W (k) (1)
Measured value along with system：
Z (k)=H*X (k)+V (k) (2)
In upper two formulas, X (k) is the system mode in k moment, and U (k) is the controlled quentity controlled variable to system for the k moment.F and B is system
Parameter, for Multi-model System, they are matrix.Z (k) is the measured value in k moment, and H is the parameter of measuring system, surveys for more
Amount system, H is matrix.W (k) and V (k) represents process and the noise of measurement respectively, and they are assumed to white Gaussian noise, they
Covariance be Q, R respectively.To be exported come the optimization of estimating system with reference to their covariance with above variable below.
First have to the process model using system, to predict the system of NextState.Assume that present system mode is k,
According to the model of system, present status can be predicted based on the laststate of system：
X (k | k-1)=F*X (k-1 | k-1)+B*U (k) (3)
In formula (3), and X (k | k-1) it is the result predicted using laststate, X (k-1 | k-1) it is the optimum knot of laststate
Really, U (k) is the controlled quentity controlled variable of present status, and without controlled quentity controlled variable, it can be 0.
Represent covariance with P：
P (k | k-1)=F*P (k-1 | k-1) * F'+Q (4)
In formula (4), P (k | k-1) is X (k | k-1) corresponding covariance, and P (k-1 | k-1) is X (k-1 | k-1) corresponding association
Variance, F ' represents the transposed matrix of F, and Q is the covariance of systematic procedure.Formula (3), (4) are exactly that 5 formula of Kalman filter are worked as
In the first two, that is, the prediction to system.
Now with predicting the outcome of present status, then regather the measured value of present status.In conjunction with predicted value and survey
Value, can obtain the optimization estimated value X (k | k) of present status k：
X (k | k)=X (k | k-1)+Kg (k) * (Z (k)-H*X (k | k-1)) (5)
Wherein Kg is kalman gain：
Kg (k)=P (k | k-1) * H'/(H*P (k | k-1) * H'+R) (6)
Optimum estimated value X (k | k) has been obtained under k-state by above formula.But in order to allow Kalman filter constantly to transport
Row goes down and terminates until systematic procedure, the covariance of X under k-state also to be updated (k | k)：
P (k | k)=(I-Kg (k) * H) * P (k | k-1) (7)
Wherein I is unit battle array, for the measurement of single model list, I=1.When system enters k+1 state, and P (k | k) it is exactly formula
P (4) (k-1 | k-1).So, algorithm just can be gone down with autoregressive computing.
Therefore, the algorithm of Kalman filtering can be summarized as following 5 formula：
Separately design five sub-controllers in Kalman filtering controller according to five formula shown in formula (8), it
Be followed successively by status predication controller, covariance predictive controller, state updates controller, and Kalman filtering gain updates and controls
Device and covariance update controller.And each sub-controller major control completes " square formation × square formation " computing, " square formation+side
Battle array " computing, " square formation-square formation " computing, matrix inversion operation, " square formation × column vector " computing, " column vector+column vector " computing and
" column vector-column vector " computing.
Above-described seven kinds of computings can be attributed to four matroid computings, and that is, the plus-minus of matrix is taken advantage of and inversion operation, under
Face combines explanation accompanying drawing, and the present invention is described in further detail.
The logic control state machine that matrix is added is as illustrated in fig. 2, it is assumed that need complete to be calculated as Matrix C=matrix A+square
Battle array B, then obtain matrix A, the offset address of B and C first, be then successively read matrix A, the data in the current address of B, and
It is assigned to two input ports of adder, subsequently matrix A, the current address of B is incremented by one, finally ties calculating addition
Fruit stores in the current address of C matrix, and the current address of Matrix C is incremented by one.So circulate, when C matrix current address
Cross the border thus when not in C matrix address scope, completing matrix sum operation.
The logic control state machine that matrix subtracts each other is as shown in Figure 3 it is assumed that need complete to be calculated as Matrix C=matrix A-square
Battle array B, then obtain matrix A, the offset address of B and C first, be then successively read matrix A, the data in the current address of B, and
It is assigned to two input ports of subtracter, subsequently matrix A, the current address of B is incremented by one, finally ties calculating subtraction
Fruit stores in the current address of C matrix, and the current address of Matrix C is incremented by one.So circulate, when C matrix current address
Cross the border thus when not in C matrix address scope, that is, completing matrix sum operation.
The logic control state machine of matrix inversion it is assumed that needing complete to be calculated as matrix B=matrix A,
In design, for convenience of calculation, matrix B is stored in the neighbouring address space after matrix A, so only passes through A matrix
The dimension of address and matrix just can calculate the address of B matrix.Matrix inversion employs extended matrix method, obtains square first
The offset address of battle array A, and B matrix is carried out with unit array process；Then it is successively read the diagonal of the first trip of A matrix to footline
Element, and simultaneously A, the corresponding row all elements of B matrix are divided by this diagonal (assuming it is not zero) element, so that A matrix
This row diagonal entry normalization；Afterwards to A, B matrix by same line translation, this row diagonal entry of A matrix
Other all elements zeroizations of column；So circulate, when all row of A matrix are disposed, that is, complete matrix and be added
Computing.
The logic control state machine of matrix multiple is as shown in fig. 5, it is assumed that need complete to be calculated as Matrix C=matrix A * square
Battle array B, then obtain matrix A, the offset address of B and C first, and accumulator does not complete to reset after a C matrix element calculates；Then
It is successively read each of a line of matrix A element, is assigned to an input port of multiplier, read matrix B simultaneously
Each of one row element, is assigned to another input port of multiplier；Afterwards, multiplication result is assigned to one to add up
The input port of device, when a line (or row for matrix B) of matrix A all runs through, accumulator completes one in Matrix C
The calculating of element.So circulate, when all column processing of all row and matrix B of matrix A combine calculating and finish, that is, complete matrix
Multiplication operation.
Involved all matrixes in Kalman filtering algorithm, update matrix including the state in system model, see
Survey matrix, the covariance matrix of the noise of process and measurement, state variable, status predication variable, covariance matrix, covariance is pre-
Survey matrix, all intermediate result matrixes in Kalman filtering gain matrix and filtering algorithm calculating process, be required for presence
In RAM memory, so that the suitable memory space to these matrix allocation.
The dimension of hypothesis Kalman filter is D, then the space size needed for a column vector is D, and a side
Space size required for battle array is D*D.If each matrix is sequentially stored in RAM, then according to above space of matrices
Distribution principle, the Kalman filter different to dimension can calculate the offset address of corresponding matrix.Table 1 show and is based on
The dimension of the higher-dimension Kalman filter of FPGA is respectively matrix offset allocation tables when 9,13,15 and 20.Work as dimension
When changing, can separately calculate again, so be easy to the dimension of Kalman filter is extended.
The higher-dimension Kalman filter correlation matrix offset address allocation table based on FPGA for the table 1
As shown in Table 1, matrix variables 1-8 are the original variable in formula (8), and matrix 9-20 is all intermediate variable,
Its naming method rule is as described below：Each letter is split as the original matrix variable name in formula (8), then according to former formula
Represent its addition subtraction multiplication and division result.Such as FP represents the F*P in (8) second formula of formula, other the like.And X_
Except Predict, S and S_inv, X_Predict represents the status predication result of (8) first formula of formula, and S represents formula
H*P*H'+R part in (8) the 4th formula, S_inv is the inverse matrix of S.It is pointed out that controlling in any one son
The process that device completes to calculate will be written and read to RAM operating, and needs to carry out input value amplitude and output valve to arithmetic unit
Read operation, and these processes need strict SECO.It is illustrated in figure 6 row in solution matrix inverse operation to process
Journey it is necessary first to three work clocks are reading the data in RAM, first clock to the address wire signal port assignment of RAM,
Signal function on second clock address line could use data in the RAM reading out in RAM, the 3rd clock.And holding
During row data division operation, the next clock after input port of divisor and dividend assignment to divider can be using meter
The result of division calculating.
During application is based on the higher-dimension Kalman filtering algorithm of FPGA, first the filtering in RAM memory is calculated
Method correlation matrix is initialized, and repeats following five and walk under conditions of then reading in observed quantity outside constantly from fpga chip
Suddenly：
(1) status predication controller completion status prediction
Status predication controller 2a needs to control and reads relevant with status predication data in memory, required for delivering to
Sub- arithmetic unit 3a, 3b, 3c, 3d are calculated, and result of calculation are written to the status predication result memory block in memory 4
Domain, completes 1 " square formation × column vector " computing in this process；
(2) covariance predictive controller completes covariance prediction
Covariance predictive controller 2b needs to control successively and reads relevant with covariance prediction data in memory, delivers to
Required sub- arithmetic unit 3a, 3b, 3c, 3d are calculated, and result of calculation are written to the covariance prediction knot in memory
Fruit storage region, completes 1 " square formation × square formation " computing, 1 " square formation × square formation " computing and 1 " square formation+side in this process
Battle array " computing；
(3) kalman gain renewal controller completes kalman gain renewal
Kalman gain update controller 2d need to control successively relevant with kalman gain renewal in reading memory
Data, the sub- arithmetic unit 3a required for delivering to, 3b, 3c, 3d are calculated, and result of calculation are written to the karr in memory
Graceful gain updates result storage region, completes 1 " square formation × square formation " computing in this process, 1 " square formation × square formation " computing, and 1
Secondary " square formation+square formation " computing, 1 submatrix inversion operation and 1 " square formation × square formation " computing；
(4) state updates controller completion status and updates
State updates controller 2c and needs to control relevant with state renewal data in reading memory successively, delivers to required
The sub- arithmetic unit 3a wanting, 3b, 3c, 3d are calculated, and state result of calculation being written in memory updates result storage
Region, completes 1 " square formation × column vector " computing in this process, 1 " column vector-column vector " computing, 1 time " square formation × arrange to
Amount " computing and 1 " column vector+column vector " computing；
(5) covariance renewal controller completes covariance renewal
Covariance updates controller 2e and needs to control relevant with covariance renewal data in reading memory successively, delivers to
Required sub- arithmetic unit 3a, 3b, 3c, 3d are calculated, and covariance result of calculation being written in memory updates knot
Fruit storage region, completes 1 " square formation × square formation " computing, 1 " square formation-square formation " computing and 1 " square formation × side in this process
Battle array " computing.
The content not being described in detail in description of the invention belongs to prior art known to professional and technical personnel in the field.
The above is only the preferred embodiment of the present invention it is noted that ordinary skill people for the art
For member, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications also should
It is considered as protection scope of the present invention.
Claims (3)
1. the higher-dimension Kalman filter based on FPGA is it is characterised in that include：Filtering logic controller, arithmetic unit and data are deposited
Reservoir；, by status predication controller (2a), covariance predictive controller (2b), kalman gain is more for described filtering logic controller
New controller (2d), state updates controller (2c) and covariance updates five logic sub-controller compositions of controller (2e)；Institute
State arithmetic unit by double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter
(3d) four sub- arithmetic units are constituted, and every sub- arithmetic unit has two data-in ports and a data-out port；
Logic controller gives filtering sequential, under the constraint of filtering sequential, the data reading from data storage is assigned to
The input port of arithmetic unit, and the output data of arithmetic unit is written in data storage；
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter (3d) four
Independently of one another, their inputoutput data is all connected with data storage individual sub- arithmetic unit by data/address bus；Work as state
Predictive controller (2a), covariance predictive controller (2b), kalman gain updates controller (2d), and state updates controller
(2c) and covariance updates after the given sequential of controller (2e) five logic sub-controllers institute execute successively, then complete once to filter
Ripple, now recycles execution, realizes Real-Time Filtering；
Status predication controller (2a) controls relevant with status predication data in reading memory, the double precision required for delivering to
Multiplier (3a), double precision divider (3b), double adder (3c) and four sub- arithmetic units of double precision subtracter (3d)
Calculated, and result of calculation is written to the status predication result storage region in data storage, completed 1 time in this process
" square formation × column vector " computing；
Covariance predictive controller (2b) controls relevant with covariance prediction data in reading data storage successively, delivers to institute
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and the double precision subtracter (3d) needing
Four sub- arithmetic units are calculated, and covariance result of calculation being written in data storage predicts the outcome storage region,
Complete 1 " square formation × square formation " computing, 1 " square formation × square formation " computing and 1 " square formation+square formation " computing in this process；
Kalman gain updates controller (2d) and controls relevant with kalman gain renewal number in reading data storage successively
According to, the double-precision multiplication device (3a) required for delivering to, double precision divider (3b), double adder (3c) and double precision subtract
Four sub- arithmetic units of musical instruments used in a Buddhist or Taoist mass (3d) are calculated, and kalman gain result of calculation being written in data storage updates knot
Fruit storage region, completes 1 " square formation × square formation " computing, 1 " square formation × square formation " computing, 1 time " square formation+square formation " in this process
Computing, 1 submatrix inversion operation and 1 " square formation × square formation " computing；
State updates controller (2c) and controls relevant with state renewal data in reading data storage successively, required for delivering to
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter (3d) four
Sub- arithmetic unit is calculated, and state result of calculation being written in data storage updates result storage region, here mistake
Journey completes 1 " square formation × column vector " computing, 1 " column vector-column vector " computing, 1 " square formation × column vector " computing and 1 time
" column vector+column vector " computing；
Covariance updates controller (2e) and controls relevant with covariance renewal data in reading data storage successively, delivers to institute
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and the double precision subtracter (3d) needing
Four sub- arithmetic units are calculated, and covariance result of calculation being written in data storage updates result storage region,
Complete 1 " square formation × square formation " computing, 1 " square formation-square formation " computing and 1 " square formation × square formation " computing in this process；
Data storage is embodied as, and the dimension of Kalman filter is D, and the space size needed for a column vector is D, one
Space size required for square formation is D*D, and each matrix is sequentially stored in RAM, is distributed former according to above space of matrices
Then, the Kalman filter different to dimension calculates the offset address of corresponding matrix, when dimension changes, more separately counts
Calculate, so the dimension of Kalman filter is extended.
2. the higher-dimension Kalman filter based on FPGA according to claim 1, is characterized in that：Described data storage
To be realized using RAM, the address-bus width of RAM is 12, addressing range 0-4095, the data width of each addressed memory storage
For 64, illustrate a double-precision floating point type data, in RAM storage data sectional form filtering algorithm parameter matrix and
Intermediate variable matrix；The Kalman filter of 15 dimensions can be realized under this design structure, then pass through again to increase address bus
Width, further expand memory addressing range, thus completing the Kalman filter of higher dimension.
3. the higher-dimension Kalman filter implementation method based on FPGA is it is characterised in that to realize step as follows：First data is deposited
Filtering algorithm correlation matrix in reservoir is initialized, then below repetition under conditions of constantly from outside reading observed quantity
Five steps, thus completing Kalman filtering process, are implemented as：
(1) status predication controller completion status prediction
Status predication controller (2a) needs to control and reads relevant with status predication data in data storage, required for delivering to
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter (3d) four
Sub- arithmetic unit is calculated, and result of calculation is written to the status predication result storage region in data storage, here mistake
Journey completes 1 " square formation × column vector " computing；
(2) covariance predictive controller completes covariance prediction
Covariance predictive controller (2b) needs to control successively and reads relevant with covariance prediction data in data storage, send
To required double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter
(3d) four sub- arithmetic units are calculated, and covariance result of calculation being written in data storage predicts the outcome memory block
Domain, completes 1 " square formation × square formation " computing, 1 " square formation × square formation " computing and 1 " square formation+square formation " computing in this process；
(3) kalman gain renewal controller completes kalman gain renewal
Kalman gain update controller (2d) need to control successively relevant with kalman gain renewal in reading data storage
Data, deliver to required for double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double essence
Degree subtracter (3d) four sub- arithmetic units are calculated, and result of calculation is written to kalman gain in data storage more
New result storage region, completes 1 " square formation × square formation " computing in this process, 1 " square formation × square formation " computing, 1 time " square formation+
Square formation " computing, 1 submatrix inversion operation and 1 " square formation × square formation " computing；
(4) state updates controller completion status and updates
State updates controller (2c) and needs to control relevant with state renewal data in reading data storage successively, delivers to institute
Double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and the double precision subtracter (3d) needing
Four sub- arithmetic units are calculated, and state result of calculation being written in data storage updates result storage region,
This process completes 1 " square formation × column vector " computing, 1 " column vector-column vector " computing, 1 " square formation × column vector " computing
With 1 " column vector+column vector " computing；
(5) covariance renewal controller completes covariance renewal
Covariance updates controller (2e) and needs to control relevant with covariance renewal data in reading data storage successively, send
To required double-precision multiplication device (3a), double precision divider (3b), double adder (3c) and double precision subtracter
(3d) four sub- arithmetic units are calculated, and covariance result of calculation being written in data storage updates result memory block
Domain, completes 1 " square formation × square formation " computing, 1 " square formation-square formation " computing and 1 " square formation × square formation " computing in this process；
(6) data storage procedure is：The dimension of Kalman filter is D, and the space size needed for a column vector is D, one
Space size required for individual square formation is D*D, and each matrix is sequentially stored in RAM, according to above space of matrices distribution
Principle, the Kalman filter different to dimension calculates the offset address of corresponding matrix, when dimension changes, more separately
Calculate, so the dimension of Kalman filter is extended.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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