CN103342337B - Metal nanoparticle auxiliary etch legal system is for the method for nanometer line - Google Patents

Metal nanoparticle auxiliary etch legal system is for the method for nanometer line Download PDF

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CN103342337B
CN103342337B CN201310289616.0A CN201310289616A CN103342337B CN 103342337 B CN103342337 B CN 103342337B CN 201310289616 A CN201310289616 A CN 201310289616A CN 103342337 B CN103342337 B CN 103342337B
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silicon chip
nanometer line
oxidation
corrosive liquid
metal nanoparticle
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CN103342337A (en
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马文会
李绍元
周阳
魏奎先
谢克强
伍继君
秦博
刘大春
杨斌
戴永年
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Kunming University of Science and Technology
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Abstract

The invention provides a kind of metal nanoparticle auxiliary etch legal system for the method for nanometer line, belong to technical field of semiconductor.By silicon chip pretreatment, then carry out surface oxidation treatment, be then placed in corrosive liquid and leave standstill, be placed in salpeter solution subsequently and soak, then dry up with nitrogen with after a large amount of deionized water rinsing, namely obtain nanometer line.Compared with general dense silicon, be distributed in the aperture of 2 ~ 50nm in the nanometer line that the present invention prepares containing a large amount of diameter, and nanometer line keeps certain single crystal characteristics; This makes it have huger specific area and shows the optics of some uniquenesses, electrology characteristic, and this makes nanometer line show huge utilization prospect in the fields such as nano-sensor, optics, nano-catalytic.

Description

Metal nanoparticle auxiliary etch legal system is for the method for nanometer line
Technical field
The invention belongs to technical field of semiconductor, be specifically related to a kind of preparation method of nanometer line.
Background technology
In recent years, nano material is with the physicochemical properties of its uniqueness with there is potential utilization prospect at numerous areas and cause people and study interest widely.Wherein silicon nanowires is as a kind of novel semi-conducting material, the physical characteristic that the quantum limitation effect presented along with the continuous reduction of diameter dimension, skin effect, quantum limitation effect etc. are novel, make them in optical, electrical, thermal and magnetic and catalytic reaction etc., show the physical property being significantly different from other materials thus, thus show very important utilization potentiality in fields such as luminescence generated by light, large scale integrated circuit, single-electron device, nano-sensors.
Prepare diameter length controlled, the homogeneous silicon nanowires of structure is the target that people pursue always, if want to realize its extensive utilization in making devices, a kind of simple and reliable process, with low cost and the technology can preparing silicon nanowires on a large scale just shows special significance.
The direction of growth according to silicon nanowires is divided, and usual its preparation method mainly divides " from bottom to top " and " from top to bottom " two kinds." from bottom to top " refer to from atom and molecule level, in Material growth process, its structure, component and size etc. are controlled, thus grow required nano structural material.Silicon nanowires that this method obtains normally random distribution, this brings difficulty to large-scale integrated." from top to bottom " refer to from body material, utilize film growth or nanoimprinting technology to prepare nano-material, the silicon nanowires precision that this method obtains is higher, but also has the shortcomings such as high to equipment requirement, cost is high, efficiency is low.
Summary of the invention
The object of the present invention is to provide a kind of simple silicon nanowires preparation technology, adopt the method can prepare nanometer line on a large scale, at low cost.
The present invention is realized by following technical proposal: a kind of metal nanoparticle auxiliary etch legal system for the method for nanometer line, through following each step:
(1) silicon chip pretreatment: silicon chip is used successively acetone, toluene, ethanol, deionized water ultrasonic cleaning 1 ~ 30 minute;
(2) oxidation processes of silicon chip surface: step (1) pretreated silicon chip is carried out surface oxidation treatment formed oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the hydrofluoric acid of 1% ~ 50%, oxidising agent by metal ion catalyst, mass concentration be (0.01 ~ 5) by volume: (0.01 ~ 10): (0 ~ 10) is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment, silicon chip is taken out leave standstill 1 ~ 600min at 15 ~ 90 DEG C after, being placed on mass concentration is subsequently take out after soaking 1 ~ 60min in the salpeter solution of 25 ~ 98%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtain nanometer line.
The silicon chip of described step (1) is single-chip.
The acetone of described step (1), toluene, ethanol are that commercial analysis is pure.
The oxidation processes of described step (2) adopts conventional thermal oxidation, chemical oxidation, electrochemical oxidation or photochemical catalytic oxidation to carry out oxidation processes to silicon chip surface.
The AgNO of the metal ion catalyst of described step (3) to be concentration be 1mol/L 3, KAuCl 4, HAuCl 4, K 2ptCl 6or H 2ptCl 6solution.
The H of the oxidising agent of described step (3) to be concentration be 0.1 ~ 10mol/L 2o 2, HNO 3, Fe (NO 3) 3, KMnO 4, KBrO 3, K 2cr 2o 7or Na 2s 2o 8.
In described step (4), silicon chip is placed in corrosive liquid standing is carry out in lucifuge darkroom, is oxidized to prevent metal ion.
Described monocrystalline silicon piece comprises n-type silicon chip or p-type silicon chip, and resistivity is 0.001 ~ 1000 Ω cm, and orientation can be (100), (111), (110) etc.
The present invention utilizes some metal ion (Ag, Pd, Au, Pt) can form nano particle at silicon substrate surface autodeposition and makes catalyst oxidation silicon base, in the system of hydrofluoric acid containing, when metal nanoparticle serves as catalyst, utilize hydrofluoric acid solution to come selective dissolution oxidation position, silicon base is formed nanometer line by from top to down corrosion.Utilize the method by parameters such as design metal nanoparticle size, silicon base degree of oxidation, hydrofluoric acid concentration and etching times to realize the controlled synthesis of nanometer line.The nanometer line that orientation is different can be prepared as required, comprise the orientation such as (111), (100), (110).Compared with the traditional handicraft prepared with silicon nanowires, the present invention has that technique is simple, cost is low, can prepare the advantages such as nanometer linear array on a large scale, compared with general dense silicon, be distributed in the aperture of 2 ~ 50nm in the nanometer line that the present invention prepares containing a large amount of diameter, and nanometer line keeps certain single crystal characteristics; This makes it have huger specific area and shows the optics of some uniquenesses, electrology characteristic, and this makes nanometer line show huge utilization prospect in the fields such as nano-sensor, optics, nano-catalytic.
Accompanying drawing explanation
Fig. 1 is preparation technology's schematic diagram of the present invention;
Fig. 2 is that the SEM surface topography of gained nanometer linear array characterizes;
Fig. 3 is that the TEM of single nanometer line characterizes.
Detailed description of the invention
Below in conjunction with embodiment, the present invention will be further described.
Embodiment 1
(1) silicon chip pretreatment: be that 0.01 ~ 0.09 Ω cmp type monocrystalline silicon piece (100) is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 10 minutes by resistivity;
(2) oxidation processes of silicon chip surface: pretreated for step (1) silicon chip adopted conventional thermal oxidation to carry out surface oxidation treatment and form oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the AgNO of 1mol/L by concentration 3solution, mass concentration be 10% hydrofluoric acid, concentration be the H of 3mol/L 2o 2by volume for 1:8:1 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 50min at 20 DEG C after, being placed on mass concentration is subsequently take out after soaking 20min in the salpeter solution of 50%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 2
(1) silicon chip pretreatment: be that the p-type monocrystalline silicon piece (111) of 10 ~ 100 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 10 minutes by resistivity;
(2) oxidation processes of silicon chip surface: pretreated for step (1) silicon chip adopted conventional chemical oxidation to carry out surface oxidation treatment and form oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the KAuCl of 1mol/L by concentration 4solution), mass concentration be 10% hydrofluoric acid, concentration be the HNO of 5mol/L 3by volume for 5:10:10 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 60min at 15 DEG C after, being placed on mass concentration is subsequently take out after soaking 20min in the salpeter solution of 50%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 3
(1) silicon chip pretreatment: be that the N-shaped monocrystalline silicon piece (111) of 0.01 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 30 minutes by resistivity;
(2) oxidation processes of silicon chip surface: pretreated for step (1) silicon chip adopted Conventional electrochemical oxidation to carry out surface oxidation treatment and form oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the HAuCl of 1mol/L by concentration 4fe (the NO that the hydrofluoric acid that solution, mass concentration are 30%, concentration are 10mol/L 3) 3by volume for 0.01:0.01:0.2 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 100min at 40 DEG C after, being placed on mass concentration is subsequently take out after soaking 60min in the salpeter solution of 25%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 4
(1) silicon chip pretreatment: be that the N-shaped monocrystalline silicon piece (111) of 10 ~ 100 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 1 minute by resistivity;
(2) oxidation processes of silicon chip surface: step (1) pretreated silicon chip is adopted conventional photochemical catalytic oxidation carry out surface oxidation treatment formed oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the K of 1mol/L by concentration 2ptCl 6solution, mass concentration be 1% hydrofluoric acid, concentration be the KMnO of 0.1mol/L 4by volume for 2:8:1 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 1min at 90 DEG C after, being placed on mass concentration is subsequently take out after soaking 1min in the salpeter solution of 98%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 5
(1) silicon chip pretreatment: be that the N-shaped monocrystalline silicon piece (111) of 0.01 ~ 0.09 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 15 minutes by resistivity;
(2) oxidation processes of silicon chip surface: pretreated for step (1) silicon chip adopted conventional thermal oxidation to carry out surface oxidation treatment and form oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the H of 1mol/L by concentration 2ptCl 6solution, mass concentration be 50% hydrofluoric acid, concentration be the KBrO of 8mol/L 3by volume for 4:7:2 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 600min at 15 DEG C after, being placed on mass concentration is subsequently take out after soaking 10min in the salpeter solution of 80%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 6
(1) silicon chip pretreatment: be that the p-type monocrystalline silicon piece (110) of 0.001 ~ 0.01 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 25 minutes by resistivity;
(2) oxidation processes of silicon chip surface: step (1) pretreated silicon chip is adopted conventional photochemical catalytic oxidation carry out surface oxidation treatment formed oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the AgNO of 1mol/L by concentration 3solution), mass concentration be 40% hydrofluoric acid, concentration be the K of 5mol/L 2cr 2o 7by volume for 1:2:1 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 300min at 60 DEG C after, being placed on mass concentration is subsequently take out after soaking 3min in the salpeter solution of 98%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 7
(1) silicon chip pretreatment: be that the N-shaped monocrystalline silicon piece (111) of 1000 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 15 minutes by resistivity;
(2) oxidation processes of silicon chip surface: pretreated for step (1) silicon chip adopted Conventional electrochemical oxidation to carry out surface oxidation treatment and form oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the HAuCl of 1mol/L by concentration 4solution, mass concentration be 20% hydrofluoric acid, concentration be the Na of 10mol/L 2s 2o 8by volume for 5:1:1 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 100min at 70 DEG C after, being placed on mass concentration is subsequently take out after soaking 30min in the salpeter solution of 30%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.
Embodiment 8
(1) silicon chip pretreatment: be that the p-type monocrystalline silicon piece (110) of 0.001 ~ 0.01 Ω cm is successively with commercial analytically pure acetone, toluene, ethanol, deionized water ultrasonic cleaning 25 minutes by resistivity;
(2) oxidation processes of silicon chip surface: step (1) pretreated silicon chip is adopted conventional photochemical catalytic oxidation carry out surface oxidation treatment formed oxide layer, oxide layer have the formation utilizing meso-hole structure;
(3) preparation of corrosive liquid: be the AgNO of 1mol/L by concentration 3solution), mass concentration is that the hydrofluoric acid of 40% is by volume for 1:2 is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment in lucifuge darkroom, be oxidized to prevent metal ion, silicon chip is taken out leave standstill 300min at 60 DEG C after, being placed on mass concentration is subsequently take out after soaking 3min in the salpeter solution of 98%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtaining nanometer line, is large area nanometer linear array.

Claims (5)

1. metal nanoparticle auxiliary etch legal system is for a method for nanometer line, it is characterized in that through following each step:
(1) silicon chip pretreatment: silicon chip is used successively acetone, toluene, ethanol, deionized water ultrasonic cleaning 1 ~ 30 minute; Described silicon chip is single-chip, and monocrystalline silicon piece comprises n-type silicon chip or p-type silicon chip, and resistivity is 0.001 ~ 1000 Ω cm;
(2) oxidation processes of silicon chip surface: step (1) pretreated silicon chip is carried out surface oxidation treatment and form oxide layer; Described oxidation processes adopts conventional thermal oxidation, chemical oxidation, electrochemical oxidation or photochemical catalytic oxidation to carry out oxidation processes to silicon chip surface
(3) preparation of corrosive liquid: be the hydrofluoric acid of 1% ~ 50%, oxidising agent by metal ion catalyst, mass concentration be (0.01 ~ 5) by volume: (0.01 ~ 10): (0 ~ 10) is mixed to get corrosive liquid;
(4) preparation of nanometer: step (2) is placed in step (3) gained corrosive liquid through the silicon chip of surface oxidation treatment, silicon chip is taken out leave standstill 1 ~ 600min at 15 ~ 90 DEG C after, being placed on mass concentration is subsequently take out after soaking 1 ~ 60min in the salpeter solution of 25 ~ 98%, dry up with nitrogen with after a large amount of deionized water rinsing again, namely obtain nanometer line.
2. metal nanoparticle auxiliary etch legal system according to claim 1 is for the method for nanometer line, it is characterized in that: the acetone of described step (1), toluene, ethanol are that commercial analysis is pure.
3. metal nanoparticle auxiliary etch legal system according to claim 1 is for the method for nanometer line, it is characterized in that: the AgNO of the metal ion catalyst of described step (3) to be concentration be 1mol/L 3, KAuCl 4, HAuCl 4, K 2ptCl 6or H 2ptCl 6solution.
4. metal nanoparticle auxiliary etch legal system according to claim 1 is for the method for nanometer line, it is characterized in that: the H of the oxidising agent of described step (3) to be concentration be 0.1 ~ 10mol/L 2o 2, HNO 3, Fe (NO 3) 3, KMnO 4, KBrO 3, K 2cr 2o 7or Na 2s 2o 8.
5. metal nanoparticle auxiliary etch legal system according to claim 1 is for the method for nanometer line, it is characterized in that: in described step (4), silicon chip is placed in corrosive liquid standing is carry out in lucifuge darkroom.
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