CN103326609A - Controlling method for three-phase voltage type grid inverter - Google Patents

Abstract

The invention discloses a digital controlling method of a three-phase voltage type grid inverter. The controlling method for the three-phase voltage grid inverter is based on the thought of a traditional dead beat technology, and comprises the steps of voltage predication, current predication, dead-time compensation and zero-sequence current injection improvement. The controlling method for the three-phase voltage grid inverter solves the problem that digital achievement of traditional dead-time controlling is poor in stability and tracing accuracy, wherein the problem is caused by the sampling channel and the delay of the calculation process and 'one-step-delay' control.

Description

A kind of three-phase voltage type synchronization converter control method

Technical field

The present invention relates to the electronic power convertor technical field, be specifically related to the control technology of three-phase voltage type synchronization current transformer.

Background technology

Along with the development of power electronic technology and distributed energy application technology, grid-connected converter has a extensive future as the basic interface unit that distributed energy is incorporated into the power networks.Grid-connected converter and control method thereof have multiple, and in order to satisfy the requirement of the quality of power supply, the voltage-type current transformer becomes main flow, and in the middle of the control method of voltage-type grid-connected converter, majority all adopts double-close-loop direct to connect Current Control Technology, has a tracking effect good, the advantages such as floating.

The dead beat Current Control Technology is a kind of in numerous Current Control Technology, and it has the Digital Implementation of convenience, switching frequency is fixed, and corresponding outstanding advantages of monocycle is widely used at present.But traditional dead beat control model also has problems in actual use: because the time-delay of sampling channel and computational process, and the problem of " bat lags behind " that exist in the Digital Implementation process, the tracking effect of dead beat control and the stability of control are greatly affected: the time-delay of voltage sample causes that there is deviation in idle component in the output current, and current sample time-delay and " lag behind one clap " control cause the low-frequency oscillation that contains about 1/6 switching frequency in the output current; Simultaneously, what traditional dead beat control was adopted is the SPWM modulation, and voltage utilization is on the low side.

Summary of the invention

The present invention is take the digital control technology of current transformer as the basis, be controlled in the specific implementation process for traditional dead beat, because the time-delay of sampling channel and control procedure, cause the low-frequency oscillation of 1/6 switching frequency and the problem that tracking accuracy descends, a kind of improvement algorithm that improves stability and control precision is proposed, and in conjunction with a kind of pulse modulation method and dead-time Compensation Technology that is applicable to dead beat control, be applied to three-phase voltage type synchronization current transformer (comprising PWM rectifier and PWM inverter), overcome traditional dead beat and be controlled at the stability that exists in the Digital Implementation and the problem of control precision, and improved the DC bus-bar voltage utilance, improve the grid-connected current waveform, improved the quality of power supply.

Technical scheme of the present invention comprises: (1) adopts sinusoidal method of approaching, and system voltage is predicted, solves the problem of voltage sample time-delay, has eliminated the deviation of output reactive current.(2) for the time-delay of current sample passage, and the problem of control " bat lags behind ", increment according to the last cycle is given, output current is predicted, introduce simultaneously proportionality coefficient k, current increment is revised, is guaranteed that system's limit is positioned at unit circle inside, establishment the low-frequency oscillation of output current.(3) based on the predicted current direction determination process, the dead band is compensated, to obtain better current waveform, improve and network electric energy quality.(4) for the problem of SPWM modulation DC bus-bar voltage utilance, adopt a kind of zero-sequence component method for implanting that is suitable for Digital Implementation, the busbar voltage utilance is brought up to the same with SVPWM.

For the three-phase voltage type synchronization current transformer shown in the accompanying drawing 1, the control strategy of traditional dead beat method is as follows:

$d_{U(k+1)}=0.5+\frac{u_{\mathrm{AN}\left(k\right)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\Δi}}_{a\left(k\right)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{V(k+1)}=0.5+\frac{u_{\mathrm{BN}\left(k\right)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\Δi}}_{b\left(k\right)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{W(k+1)}=0.5+\frac{u_{\mathrm{CN}\left(k\right)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\Δi}}_{c\left(k\right)}/T}{U_{\mathrm{DC}\left(k\right)}}$

D wherein _{U (k+1)}, d _{V (k+1)}, d _{W (k+1)}Represent respectively the duty ratio of next control cycle (in from (k+1) T to (k+2) T time) U, V, three brachium pontis control signals of W, T is the time of a control cycle, and L is for connecting the inductance value of reactance, Δ i _{A (k)}, Δ i _{B (k)}, Δ i _{C (k)}Being respectively the deviation of current control cycle (in from kT to (k+1) T time) three-phase output current command value and actual value, also is the desired value of output current increment in a control cycle, and its expression formula is:

Δi _a(k)＝i _a ^* _(k)-i _a(k)

Δi _b(k)＝i _b ^* _(k)-i _b(k)

Δi _c(k)＝i _c ^* _(k)-i _c(k)

In the formula, i _a ^* _(k), i _b ^* _(k), i _c ^* _(k)Be the command value of current control cycle A, B, C three-phase current, Δ i _{A (k)}, Δ i _{B (k)}, Δ i _{C (k)}, be the actual measured value of current control cycle A, B, C three-phase current.

In the actual numerical control system, having 2 factors (as shown in Figure 2) to produce the effect of dead beat control has a strong impact on: (1) is the interference of filtering high-frequency switching signal, the sampled signal time-delay of using low pass filter to cause in the sampling channel; (2) digital system AD conversion and control are calculated and are inevitably wanted holding time, make mistakes for preventing the register access write timing, digital signal processor generally adopts shadow register, current result writes first shadow register, by the time unified loading of the initial time of next control cycle come into force, the result of calculation that is current period (in from kT to (k+1) T time) is for next control cycle (in from (k+1) T to (k+2) T time) control that Here it is so-called " bat lags behind ".To system voltage u _AN, u _BN, u _CNSampling delay cause in the output current deviation that a fixing idle component occurs, when namely given reactive current was zero, the power factor of output current was not 1, as shown in Figure 3 (the output current instruction is zero, and actual current contains idle component); To the sampling delay of output current and postpone one and clap control and cause and contain the low-frequency oscillation that is about switching frequency 1/6 frequency in the output current, as shown in Figure 4.

Voltage-prediction method of the present invention is referring to shown in the accompanying drawing 5, and solid line represents the virtual voltage waveform among the figure, and dotted line represents that through the voltage waveform behind the low pass filter of sampling channel, the time-delay that the sampling channel filter circuit causes is designated as t ₂, interior from kT to (k+1) T time is current control cycle, current control cycle is at kT+t ₁Constantly sample, what namely adopt is the magnitude of voltage that A is ordered, the magnitude of voltage that B is ordered on its corresponding virtual voltage waveform.Because the result of calculation of current control cycle is used for next control cycle (in from (k+1) T to (k+2) T time), what therefore actual needs was measured is the average voltage of next control cycle, and the C point voltage during with middle constantly (k+1.5) T of next control cycle substitutes.Then time of differing of required C point voltage and B point voltage is:

Δt＝1.5T-t ₁+t ₂

System voltage is approximate to be thought sinusoidally, by the method for actual measurement voltage prediction control required voltage is:

$u_{\left((k+1.5)T\right)}=u_{(\mathrm{kT}+t1)}+\frac{\mathrm{du}}{\mathrm{dt}}\mathrm{\&Delta;t}=u_{(\mathrm{kT}+t1)}+\sqrt{{u^2}_m-{u^2}_{(\mathrm{kT}+t1)}}\&times;(1.5T-{\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="HSA00000688031300031.png,HSA00000688031300032.png"\; state="\{\{state\}\}">t</figure-callout>}}_1+t_2)$

U in the formula _mAmplitude for system voltage u.

Current forecasting method of the present invention is referring to shown in the accompanying drawing 6, solid line represents actual current waveform among the figure, dotted line represents through the current waveform behind the low pass filter of sampling channel, is current control cycle in from kT to (k+1) T time, and current control cycle is at kT+t ₁Constantly sample, sampling obtains the current value that A is ordered, the current value that B is ordered on the corresponding actual current waveform; C, 2 of D are respectively kT and (k+1) T actual current value constantly; The E point is (k+2) T current instruction value constantly.Dead beat control namely requires the finish time ((k+2) T constantly) at next control cycle, and actual current traces into the current instruction value that E is ordered.The current sampling data that A order in tradition dead beat control is as D point electric current, so that the limit of control system exceeds beyond the unit circle, causes and controls unstablely, and low-frequency oscillation appears in output current.

According to the thought of dead beat control, that participate in the current control cycle calculating should be the expectation Δ i of output current increment in the next control cycle _{A (k+1)}It is the difference between currents between E point and the D point, but in fact the D electric current of ordering can't record at current control cycle, therefore need to predict, design various current observers in many documents and observed the actual increment of current control cycle electric current (difference between current among the figure between D point and the C point), thereby the sampled value (A/B point current value) by electric current is predicted the electric current that D is ordered, but because the electric current between C point and the B point can't accurately be observed, current observer can not estimate the actual current that D is ordered fully.The present invention adopts a kind of simple Forecasting Methodology, with the expectation Δ i of output current increment in the current control cycle _{A (k)}(desired value that is used for the current increment of calculating in the previous control cycle) comes the increment (difference between current between figure D point and the C point) of approximate evaluation actual current, and the expectation of output current increment be multiply by one less than 1 proportionality coefficient k, the limit of assurance system is positioned at unit circle inside, and expression is as follows:

Δi _(k+1)＝k(i _(k+2) ^*-i _(k)-Δi _(k))

In the formula, i _(k+2) ^*Be constantly current instruction value of (k+2) T (among the figure shown in the E point), i _(k)Be the current sampling data of current control cycle (among the figure shown in the A point), Δ i _(k)For being used for the desired value (difference between current between figure D point and the C point) of the output current increment of calculating, Δ i in the previous control cycle _(k+1)The desired value (difference between current between the point of E shown in the figure and the D point) of output current increment in the next control cycle that is used for calculating for current control cycle, k is the proportionality coefficient less than 1, its value depends on (t ₂-t ₁The size of)/T is generally got 0.5＜k＜1.

Dead-zone compensation method based on the predicted current direction of the present invention according to aforementioned prediction thought, utilizes the expectation Δ i of output current increment in the current sampling data of current control cycle and the current control cycle as shown in Figure 7 _{A (k)}Come the mean value of output current in the next control cycle of approximate evaluation, thereby judge the output current direction, for dead area compensation provides foundation.Expression is:

i _(k+1.5)＝i _(k)+1.5Δi _(k)

d _X＝d _X+sign(i _(k+1.?5))·Δt _d/T，X＝U，V，W

Δ t in the formula _dBe Dead Time, T is control cycle, sign (i _(k+1.5)) be the sign function of next control cycle (in from (k+1) T to (k+2) T time) output current mean value.

The method of injection zero-sequence component of the present invention as shown in Figure 8, its basic thought is: the three-phase duty ratio d that calculates for dead beat _U, d _V, d _W, by introducing zero-sequence component d ₀, so that the duty ratio of three-phase control signal is as far as possible symmetrical about in the of 0.5 in the axis, prevent that the numeral expression formula of this zero-sequence component is owing to the excessive or too small not enough situation of DC bus-bar voltage that causes of a certain phase duty ratio:

${\mathrm{<figure-callout\; id="0"\; label="d"\; filenames="HSA00000688031300042.png"\; state="\{\{state\}\}">d</figure-callout>}}_0=-\frac{\max (d_{U\_\mathrm{AC}},d_{V\_\mathrm{AC}},d_{W\_\mathrm{AC}})+\min (d_{U\_\mathrm{AC}},d_{V\_\mathrm{AC}},d_{W\_\mathrm{AC}})}{2}$

D in the formula _{U_AC}, d _{V_AC}, d _{W_AC}Be respectively d _U, d _V, d _WAlternating current component.

To sum up, the complete implementation procedure of control method of the present invention is:

(1) according to the sampled value u of system voltage _{AN (k)}, u _{BN (k)}, u _{CN (k)}T start-up time with sampling ₁And the time-delay t of sampling channel ₂System voltage is predicted:

$u_{\mathrm{AN}(k+1.5)}=u_{\mathrm{AN}\left(k\right)}+\sqrt{{u^2}_m-{u^2}_{\mathrm{AN}\left(k\right)}}\&times;(1.5T-{\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="HSA00000688031300031.png,HSA00000688031300032.png"\; state="\{\{state\}\}">t</figure-callout>}}_1+t_2)$

$u_{\mathrm{BN}(k+1.5)}=u_{\mathrm{BN}\left(k\right)}+\sqrt{{u^2}_m-{u^2}_{\mathrm{BN}\left(k\right)}}\&times;(1.5T-{\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="HSA00000688031300031.png,HSA00000688031300032.png"\; state="\{\{state\}\}">t</figure-callout>}}_1+t_2)$

$u_{\mathrm{CN}(k+1.5)}=u_{\mathrm{CN}\left(k\right)}+\sqrt{{u^2}_m-{{\mathrm{<figure-callout\; id="2"\; label="u"\; filenames="HSA00000688031300031.png,HSA00000688031300032.png"\; state="\{\{state\}\}">u</figure-callout>}}^2}_{\mathrm{CN}\left(k\right)}}\&times;(1.5T-{\mathrm{<figure-callout\; id="1"\; label="t"\; filenames="HSA00000688031300031.png,HSA00000688031300032.png"\; state="\{\{state\}\}">t</figure-callout>}}_1+t_2)$

(2) according to the sampled value i of system power _{A (k)}, i _{B (k)}, i _{C (k)}, the command value i of target current _{A (k+2)} ^*, i _{B (k+2)} ^*, i _{C (k+2)} ^*And the expectation Δ i of current period output current increment _{A (k)}, Δ i _{B (k)}, Δ i _{C (k)}Current increment to next control cycle is predicted:

Δi _a(k+1)＝k(i _a(k+2) ^*-i _a(k)-Δi _a(k))

Δi _b(k+1)＝k(i _b(k+2) ^*-i _b(k)-Δi _b(k))

Δi _c(k+1)＝k(i _c(k+2) ^*-i _c(k)-Δi _c(k))

(3) thought of controlling according to dead beat is calculated the alternating current component of three-phase bridge control signal duty ratio:

$d_{U(k+1)}=\frac{u_{\mathrm{AN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{a(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{V(k+1)}=\frac{u_{\mathrm{BN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{b(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{W(k+1)}=\frac{u_{\mathrm{CN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{c(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

(4) carry out dead area compensation according to the predicted current direction:

d _U＝d _U(k+1)+sign(i _c(k)+1.5Δi _a(k))·Δt _d/T

d _V＝d _V(k+1)+sign(i _b(k)+1.5Δi _b(k))·Δt _d/T

d _W＝d _W(k+1)+sign(i _c(k)+1.5Δi _c(k))·Δt _d/T

(5) inject zero-sequence component, obtain final control signal duty ratio:

$d_0=-\frac{\max (d_U,d_V,d_W)+\min (d_U,d_V,d_W)}{2}$

d _U＝d _U+d ₀+0.5

d _V＝d _V+d ₀+0.5

d _W＝d _W+d ₀+0.5

Good effect of the present invention is: by improved control method, and the problem that output reactive current deviation, output current oscillations and the current tracking ability that a bat causes because the time-delay of measuring circuit and control procedure lag behind when having solved traditional dead beat and being controlled at Digital Implementation descends; The method of using simultaneously a kind of dead-zone compensation method based on the predicted current direction and a kind of zero-sequence current that simply is easy to Digital Implementation to inject has improved and network electric energy quality and DC bus-bar voltage utilance.

Description of drawings

Fig. 1 three-phase voltage type synchronization converter structure schematic diagram

The sampling path time-delay that exists in the digital control implementation procedure of Fig. 2 and " bat lags behind " phenomenon schematic diagram

The output reactive current deviation that the time-delay of Fig. 3 voltage sample path causes (current-order is zero, and output contains idle component)

The time-delay of Fig. 4 current sample path and " bat lags behind " control cause the output current low-frequency oscillation

Fig. 5 overcomes the Forecasting Methodology schematic diagram that voltage sample postpones

Fig. 6 overcomes the Forecasting Methodology schematic diagram that current sample postpones to cause with " bat lags behind " system's instability problem

Fig. 7 is based on the dead area compensation principle schematic of predicted current direction

Fig. 8 injects the principle schematic that zero-sequence component improves voltage utilization

Fig. 9 two-stage type battery energy storage converter structure schematic diagram

Embodiment

Be described in detail below in conjunction with the implementation of a battery energy storage system to the control method of the present invention's design.Two-stage type battery energy storage current transformer as shown in Figure 9, prime Boost circuit is finished and is boosted and power control, rear class three-phase voltage type PWM inverter carries out two closed-loop controls to output current, keeps DC bus-bar voltage stable, controls simultaneously grid-connected current waveform and power factor.

Need the electric parameters of Real-time Collection to comprise in the inverter course of work: DC bus-bar voltage U _DC, line voltage u _Ab, u _Bc, u _Ca, output current i _a, i _b, i _c, in the zero hour of each control cycle, control system triggers AD and finishes sampling, sampling t start-up time ₁Time-delay t with passage ₂Obtain according to the setting of software and the parameter calculated in advance of hardware filtering electric current.In each control cycle, use control method of the present invention, process according to following steps:

(1) outer voltage detects DC bus-bar voltage U _DC, comparing with the command value of DC bus-bar voltage, difference obtains the command value i of current inner loop output current amplitude through the PID adjuster _m ^*

(2) according to the sampled value u of system voltage _{AN (k)}, u _{BN (k)}, u _{CN (k)}T start-up time with sampling ₁And the time-delay t of sampling channel ₂System voltage is predicted, obtained u _{AN (k+1.5)}, u _{BN (k+1.5)}, u _{CN (K+1.5)}

(3) according to the predicted value u of system voltage _{AN (k+1. 5)}, u _{BN (k+1.5)}, u _{CN (k+1.5)}Calculate the phase theta of A phase voltage _a

(4) the command value i of output current amplitude _m ^*Phase theta with the A phase voltage _aCalculate the command value i of A, B, C phase current instantaneous value _{A (k+2)} ^*, i _{B (k+2)} ^*, i _{C (k+2)} ^*

(5) according to the sampled value i of system power _{A (k)}, i _{B (k)}, i _{C (k)}, the command value i of target current _{A (k+2)} ^*, i _{B (k+2)} ^*, i _{C (k+2)} ^*And the expectation Δ i of current period output current increment _{A (k)}, Δ i _{B (k)}, Δ i _{C (k)}Current increment to next control cycle is predicted, obtains Δ i _{A (k+1)}, Δ i _{B (k+1)}, Δ i _{C (k+1)}

(6) by Δ i _{A (k+1)}, Δ i _{B (k+1)}, i _{C (k+1)}And u _{AN (k+1.5)}, u _{BN (k+1.5)}, u _{CN (k+1.5)}Result of calculation, calculate the alternating current component d of three-phase bridge control signal duty ratio according to the thought of dead beat control _{U (k+1)}, d _{V (k+1)}, d _{W (k+1)}

(7) carry out dead area compensation according to the predicted current direction, obtain d _U, d _V, d _W

(8) inject zero-sequence component, obtain finally being used for the control signal duty ratio d in next cycle _U, d _V, d _W

(9) duty ratio with control signal writes shadow register, and in the zero hour of next control cycle, processor is according to the content automatic loading comparand register of shadow register, and result of calculation comes into force, and current control cycle is finished, and enters next control cycle.

Control method of the present invention describes by the case study on implementation of battery energy storage system, but is not limited to the application in the battery energy storage system.

Claims (3)

1. the digital control method of a three-phase voltage type synchronization current transformer, it is characterized in that: the problem that in the Digital Implementation process, exists for traditional dead beat technology, propose a kind of improvement control method that voltage prediction, current forecasting, dead area compensation and residual voltage inject that comprises, having solved traditional dead beat, to be controlled at Digital Implementation be because stability and the poor problem of tracking accuracy that sampling channel and computational process time-delay and " lag behind one clap " control cause.

2. the digital control method of three-phase voltage type synchronization current transformer according to claim 1 is characterized in that the implementation process of control method comprises:

(1) according to the sampled value u of system voltage _{AN (k)}, u _{BN (k)}, u _{CN (k)}T start-up time with sampling ₁And the time-delay t of sampling channel ₂System voltage is predicted:

$u_{\mathrm{AN}(k+1.5)}=u_{\mathrm{AN}\left(k\right)}+\sqrt{{u^2}_m-{u^2}_{\mathrm{AN}\left(k\right)}}\&times;(1.5T-t_1+t_2)$

$u_{\mathrm{BN}(k+1.5)}=u_{\mathrm{BN}\left(k\right)}+\sqrt{{u^2}_m-{u^2}_{\mathrm{BN}\left(k\right)}}\&times;(1.5T-t_1+t_2)$

$u_{\mathrm{CN}(k+1.5)}=u_{\mathrm{CN}\left(k\right)}+\sqrt{{u^2}_m-{u^2}_{\mathrm{CN}\left(k\right)}}\&times;(1.5T-t_1+t_2)$

(2) according to the sampled value i of system power _{A (k)}, i _{B (k)}, i _{C (k)}, the command value i of target current _{A (k+2)} ^*, i _{B (k+2)} ^*, i _{C (k+2)} ^*And the expectation Δ i of current period output current increment _{A (k)}, Δ i _{B (k)}, Δ i _{C (k)}Current increment to next control cycle is predicted:

Δi _a(k+1)＝k(i _a(k+2) ^*-i _a(k)-Δi _a(k))

Δi _b(k+1)＝k(i _b(k+2) ^*-i _b(k)-Δi _b(k))

Δi _c(k+1)＝k(i _c(k+2) ^*-i _c(k)-Δi _c(k))

(3) thought of controlling according to dead beat is calculated the alternating current component of three-phase bridge control signal duty ratio:

$d_{U(k+1)}=\frac{u_{\mathrm{AN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{a(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{V(k+1)}=\frac{u_{\mathrm{BN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{b(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

$d_{W(k+1)}=\frac{u_{\mathrm{CN}(k+1.5)}}{U_{\mathrm{DC}\left(k\right)}}+\frac{L{\mathrm{\&Delta;i}}_{c(k+1)}/T}{U_{\mathrm{DC}\left(k\right)}}$

(4) carry out dead area compensation according to the predicted current direction:

d _U＝d _U(k+1)+sign(i _a(k)+1.5Δi _a(k))·Δt _d/T

d _V＝d _V(k+1)+sign(i _b(k)+1.5Δi _b(k))·Δt _d/T

d _W＝d _W(k+1)+sign(i _c(k)+1.5Δi _c(k))·Δt _d/T

(5) inject zero-sequence component, obtain final control signal duty ratio:

$d_0=-\frac{\max (d_U,d_V,d_W)+\min (d_U,d_V,d_W)}{2}$

d _U＝d _U+d ₀+0.5

d _V＝d _V+d ₀+0.5

d _W＝d _W+d ₀+0.5

3. the digital control method of three-phase voltage type synchronization current transformer according to claim 1, it is characterized in that the control signal duty ratio that described control method obtains is directly used in the pulse generating circuit that digital signal processor is set, produce the control signal of three-phase voltage-type inverter.

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