CN103326603A - Switching period optimizing space vector pulse width modulation method and modulator - Google Patents
Switching period optimizing space vector pulse width modulation method and modulator Download PDFInfo
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Abstract
The present invention discloses a kind of switch periods Optimal Space Vector PWM method and modulator, average frequency of switching is controlled by the time window of a width automatic adjusument, the switch periods in different time window are mutually indepedent; Switch periods at the same time in window are interrelated, and switch periods are by time window, switch periods coefficient
With modulation ratio
And phase angle
Between favorable combination control,The peak value that cluster harmonic wave is big in SVPWM can be significantly reduced,Total harmonic distortion is greatly reduced,Improve the quality of output voltage; Average frequency of switching is controlled by the time window of width automatic adjusument,The frequency range of power switch tube is made full use of,Improve the cost performance of frequency conversion system; Modulator of the invention can make full use of the flexible circuit customization feature of FPGA,By other circuits of speed-regulating system and algorithm integration in one piece of FPGA; The speed that control software executes is improved,The application for being it in frequency conversion speed-adjusting system provides guarantee.
Description
Technical field
The invention belongs to the alternating frequency conversion technique field, be specifically related to a kind of switch periods Optimal Space Vector PWM method and modulator that can reduce harmonic distortion and collection bunch harmonic wave peak value.
Background technology
Two level three-phase inverters as shown in Figure 1 and space vector PWM (SVPWM) are widely used in the various aspects of industrial and agricultural production.SVPWM is based on the basic principle of " volt-second balance ", comes the command voltage of equivalent needs with the continuous potential pulse that changes of width, and therefore, harmonic wave is inevitable.Harmonic wave brings energy loss, causes that the motor feels hot; Low-frequency harmonics can also cause torque pulsation, and then causes mechanical oscillation; Precipitous pulse also causes serious electromagnetic interference, affects the normal operation of other electronic equipments.
For above these problems, researcher and engineers and technicians have proposed randomized method and have suppressed electromagnetic interference, adopt optimization method to eliminate specific subharmonic, harmonic reduction distortion.Switch periods (frequency) is one of major parameter of SVPWM, also is one of main object of optimization and randomization.Randomization switch periods (frequency) can greatly weaken the peak value of collection bunch harmonic wave, and then reduces to collect the ill effect that bunch harmonic wave brings; Optimize the peak value that switch periods not only can greatly weaken collection bunch harmonic wave, and can also greatly reduce total harmonic distortion, improve the quality of output voltage, have great practical value and application prospect.
Prior art pulse duration modulation method commonly used is:
Every phase up and down two switching tubes becomes complementary conducting.Different on off states can form 8 basic voltage vectors, comprise 6 non-zero basic voltage vectors (
) and 2 Zero voltage vectors (
), as shown in Figure 2.Among Fig. 2: 1 expression upper arm conducting, 0 expression underarm conducting.Regular hexagon take the end points of 6 non-zero basic voltage vectors as the summit can be divided into 6 districts as shown in Figure 2.
Paper " the optimization pulse modulation technology in AC servo and the low-loss industrial drives (Optimal Pulsewidth Modulation for AC Servos and Low-cost Industrial Drives) " (IEEE Transactions on Industrial Electronics, Vol.40, No.4, pp. 1039 ~ 1047,1994) provided certainty SVPWM at the different command voltage magnitude, the optimized switching cycle take the harmonic distortion minimum as target discrete do not determine that method, the method can guarantee when motor stable state (invariablenes turning speed) is moved that in a primitive period or sector on-off times total in the cycle is invariable under the inphase angle.Paper " the switch periods optimization method (Switching period optimization method to random space vector PWM) of random SVPWM " (International Journal of Advancements in Computing Technology, Vol.5, No.4, pp. 181 ~ 189,2013) provided definite method in the optimized switching cycle take the harmonic distortion minimum as target under the random SVPWM, the method can guarantee when motor stable state (invariablenes turning speed) is moved that in a primitive period or sector average on-off times total in the cycle is invariable.The optimized switching cycle (switch periods coefficient) that provides in above-mentioned two pieces of papers with modulate when that the function of phase angle has definite rule, namely (switch periods coefficient) all is the function of modulation ratio and phase angle the optimized switching cycle.
But in the motor closed-loop control system, in the electrically driven (operated) vector control system of electric automobile, because command torque along with throttle constantly changes, causes the command voltage vector of controller output constantly to change, the command voltage vector no longer waits amplitude at the uniform velocity to rotate.At this moment, the three-phase command voltage no longer has been sinusoidal wave, just causes the average frequency of switching of power tube (such as IGBT) uncontrollable.If switching frequency is too high, may burn out power tube; If switching frequency is too low, the switching frequency that then can be used for reducing harmonic wave can not be fully used.
Summary of the invention
Shortcoming for prior art, the object of the invention is to propose a kind of can reduce harmonic distortion with integrate a bunch harmonic wave peak value, can take full advantage of the power tube switching frequency again optimize the equipment of SVPWM method and employing the method as the switch periods of target with the harmonic distortion minimum, with the peak value, the total harmonic distortion of reduction that weaken collection bunch harmonic wave, the quality of raising output voltage, the sexual valence of power tube be the Electro Magnetic Compatibility of governing system when.
The present invention solves the problems of the technologies described above the technical scheme that adopts as described below:
A kind of switch periods Optimal Space Vector PWM method is controlled average frequency of switching by the time window that a width self adaptation is regulated, and the mode of control average frequency of switching is: the switch periods in the different time window is separate; Switch periods in the window is interrelated at the same time, and the time window that described width self adaptation is regulated is presented as the timing variable
Further, when being used for certainty or random space vector pulse duration modulation method, will with 6 non-zero basic voltage vectors of inverter (
) end points is that the hexagonal area on summit is divided into two large classes zones: Zone R territory and Q zone, comprise subregion R1 in the Zone R territory, R2, R3, R4, R5, R6 comprises subregion Q1 in the Q zone, Q2, Q3, Q4, Q5, Q6, switch periods coefficient in the Zone R territory
, in the Q zone
, the place, zone boundary
Further, when being used for certainty or random space vector pulse duration modulation method, switch periods is subject to time window, switch periods coefficient
With modulation ratio
And phase angle
Between optimization rule control, specifically comprise the steps:
S1: modulator is started working, according to the command voltage vector
Direction of rotation and currency detect
Whether make a leapleap forward Zone R territory: a. if the time window of then setting the adjusting of width self adaptation begins timing, counting variable by the Q zone
With the timing variable
Initialize 0, execution in step S2; B. if not, then with fixing switch periods
As modulation period, namely
, execution in step S7;
S2: detect and whether to satisfy the time window condition that makes zero: if a. satisfies, counting variable then
Initialize 0, the timing variable
Initialize 0, execution in step S3; If b. do not satisfy, direct execution in step S3;
S3:
, according to controller output command voltage vector
Amplitude and phase angle, table look-up and ask periodic coefficient
, again in conjunction with fixing switch periods
, try to achieve switch periods
, execution in step S4;
S4: according to the command voltage vector
Currency detects zone of living in: if a. is in Zone R territory or zone boundary, and execution in step S6 then; If b. be in the Q zone, execution in step S5 then;
S5: judge whether satisfy to adopt the optimal period condition of tabling look-up and trying to achieve: a. if, execution in step S6 then; B. if not, then
, execution in step S6;
S7: the action time of calculating basic voltage vectors, by impulse hits trailing edge constantly in advance or the method for rise edge delay set Dead Time, according to the Dead Time of setting, calculate impulse hits constantly, impulse hits time register, period register assignment generate 6 road pulse switch signals by modulator.
Further, described optimization rule refers to obtain take the harmonic distortion minimum as purpose.
Further, switch periods Optimal Space Vector PWM method, among the described step S2, the condition that time window makes zero is: a. is by make a leapleap forward Zone R territory or by a R subregion another R subregion of directly making a leapleap forward, Q zone; B.
More than or equal to set point
, namely
Further, among the described step S3, table look-up and try to achieve periodic coefficient
Method be: with periodic coefficient
With modulation ratio
And phase angle
Between concern discretization, described method of tabling look-up is: a. judges
With
Four periodic coefficients that the summit is corresponding of net region of living in are searched in residing rectangular mesh zone
Value, obtain the current command voltage vector with interpolation method corresponding
Value; Or the periodic coefficient of b. on the grid point that closes on most
Replace.
Further, the method for described discretization is:
With
Respectively with fixing step-length
With
Disperse, only with corresponding on the discretization grid
Value is stored in the memory, for tabling look-up.
Further again, among the described step S5, the command voltage vector judges whether to satisfy and adopts the optimal period condition of trying to achieve of tabling look-up to be when the Q zone:
A kind of switch periods Optimal Space Vector PWM device comprises two group pulse jumping moment registers, one-period register, counting and initial value heavy cartridges circuit, a commutation circuit and a pulse-generating circuit, wherein:
Described period register is used for depositing modulation period;
In the two group pulse jumping moment registers all be used to the moment of depositing every phase upper arm and underarm impulse hits;
The counter of described counting and initial value heavy cartridges circuit is used for accepting count pulse and subtracts 1 counting according to pulse, when counter reduces to 0, subtract again 1 when overflowing, the pulse of output spill over, control is from the period register counting initial value of reloading, begin the counting in next cycle, commutation circuit is sent into again in the spill over pulse, and the currency of counter send pulse-generating circuit;
Described pulse-generating circuit is used for the currency of counter is compared with impulse hits set point constantly, if identical, impulse hits then, 6 tunnel control signals that the saltus step of pulse finally is converted into inverter to be needed are exported.
Further, every group pulse jumping moment register comprises 12 registers, the moment of depositing every phase upper arm and underarm impulse hits in these 24 registers, 4 register control A phases are arranged: the forward position of control upper arm pulse in every group, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge; 4 register control B phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control C phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group.
Further again, described two group pulse jumping moment registers are used alternatingly, and the impulse hits of depositing in the impulse hits time register has constantly comprised Dead Time, is directly used in the generation control impuls.
Beneficial effect of the present invention is as follows:
(1) switch periods provided by the invention is optimized the SVPWM method, control average frequency of switching by the time window that the width self adaptation is regulated, when guaranteeing that average frequency of switching is no more than the frequency range of power switch pipe normal operation requirement, considered the situation of electric machine control system dynamic change, take full advantage of the frequency characteristic of power switch pipe, improved the cost performance of frequency conversion system;
(2) method of the present invention guarantee fundamental voltage, under average on-off times etc. is constant in each modulation period the prerequisite, can significantly reduce the large peak value of collection bunch harmonic wave among the SVPWM, and can greatly reduce total harmonic distortion, improve the quality of output voltage and the Electro Magnetic Compatibility of governing system;
(3) Dead Time of three-phase control impuls and producing method can independently arrange in the modulator of the present invention, have very large flexibility, have made things convenient for the combination of advanced dead area compensation algorithm to use;
(4) modulator of the present invention can take full advantage of flexibly circuit customization characteristics of FPGA, and other circuit and the algorithm of governing system is integrated among the FPGA; Utilize the executed in parallel characteristic of FPGA to improve the speed that control software is carried out, be the more mutual fusion of advanced control algorithm and modulation algorithm, with and application in frequency conversion speed-adjusting system guarantee is provided.
(5) switch periods among the present invention is along with rotary speed, amplitude and the phase angle of command voltage vector constantly change, and method of the present invention not only goes for certainty SVPWM, can also be applicable to random SVPWM.
Description of drawings
Fig. 1 is two level three-phase inverters and motor method of attachment schematic diagram;
Fig. 2 is basic voltage vectors and synthetic method schematic diagram;
Fig. 3 is Q, R subregion schematic diagram;
Fig. 4 be in Fig. 2
Graph of a relation in the district between optimal period coefficient and phase angle and modulation ratio;
Fig. 5 is the flow chart of pulse duration modulation method provided by the invention;
Fig. 6 is an application scheme schematic diagram of the present invention;
Fig. 7 is the logical circuitry of modulator of the present invention;
Fig. 8 samples within the primitive period for the A phase voltage pulse of inverter output under 7 sections type of action floatless switchs of the symmetrical expression cycle SVPWM method that adopts now, and carries out the amplitude spectrum that Fourier transform obtains;
Fig. 9 is that the A phase voltage pulse of inverter output under the inventive method and the equipment was sampled within the primitive period, carries out the amplitude spectrum that Fourier transform obtains;
Figure 10 is switch periods temporal evolution figure under 7 sections type of action floatless switchs of the symmetrical expression cycle SVPWM method that adopts now;
Figure 11 be under the inventive method and the equipment sometime window begin switch periods temporal evolution figure in a period of time.
?
Embodiment
The object of the invention is to propose a kind of can reduce harmonic distortion with integrate a bunch harmonic wave peak value, can take full advantage of the power tube switching frequency again optimize the equipment of SVPWM method and employing the method as the switch periods of target with the harmonic distortion minimum, with the peak value, the total harmonic distortion of reduction that weaken collection bunch harmonic wave, the quality of raising output voltage, the sexual valence of power tube be the Electro Magnetic Compatibility of governing system when.
In order to achieve the above object, the invention provides a kind of switch periods that can reduce harmonic wave and optimize the SVPWM method, control average frequency of switching by the time window that a width self adaptation is regulated.Concrete control mode is that the switch periods in the different time window is separate; Switch periods in the window is interrelated at the same time, and namely the switch periods of front affects the switch periods of back.The time window that described width self adaptation is regulated is presented as regularly
Described switch periods is optimized the SVPWM method, will with 6 non-zero basic voltage vectors of inverter (
) end points is that the hexagonal area on summit is divided into two large classes zones: Zone R territory and Q zone.Be subdivided into again 12 sub regions, comprise subregion R1 in the Zone R territory, R2, R3, R4, R5, R6; Comprise subregion Q1 in the Q zone, Q2, Q3, Q4, Q5, Q6, as shown in Figure 3.Subregion R1, R2, R3, R4, R5, switch periods coefficient among the R6
, subregion Q1, Q2, Q3, Q4, Q5 is among the Q6
, the place, zone boundary
It is in the sector
Middle switch periods coefficient
With modulation ratio
And phase angle
Relation as shown in Figure 4.
As shown in Figure 5, described switch periods is optimized the SVPWM method, and when being used for the vector control system of closed loop motor, average frequency of switching is subject to variable timing
Control, specifically comprise the steps:
S1: modulator is started working, according to the command voltage vector
Direction of rotation and currency detect
Whether make a leapleap forward Zone R territory: a. if the time window of then setting the adjusting of width self adaptation begins timing, counting variable by the Q zone
With the timing variable
Initialize 0, execution in step S2; B. if not, then with fixing switch periods
As modulation period, namely
, execution in step S7.
S2: detect and whether to satisfy time window (restarting) condition that makes zero, namely whether satisfy following two: a. is by make a leapleap forward Zone R or by a R subregion another R subregion of directly making a leapleap forward of Q zone; B.
More than or equal to set point
, namely
If satisfy, then counting variable
Initialize 0, the timing variable
Initialize 0, execution in step S3.If do not satisfy, direct execution in step S3.
S3:
, according to controller output command voltage vector
Amplitude and phase angle, table look-up and ask periodic coefficient
, again in conjunction with fixing switch periods
, try to achieve switch periods
Execution in step S4.
S4: according to the command voltage vector
Currency detects zone of living in: if a. is in Zone R territory or zone boundary, and execution in step S6 then; If b. be in the Q zone, execution in step S5 then.
S7: the action time of calculating basic voltage vectors, according to the Dead Time of setting (by impulse hits trailing edge constantly in advance or the method for rise edge delay set Dead Time, Dead Time depends on power tube, manufacture craft such as IGBT, the model of the IGBT that namely selects), calculate impulse hits constantly, impulse hits time register, period register assignment generate 6 road pulse switch signals by modulator.
Wherein, among the described step S3, table look-up and try to achieve periodic coefficient
Method be: with periodic coefficient
With modulation ratio
And phase angle
Between concern discretization, namely
With
Respectively with fixing step-length
With
Disperse, only with corresponding on the discretization grid
Value is stored in the memory, for tabling look-up.The method of tabling look-up is:
Judge
With
As shown in Figure 4 four periodic coefficients that the summit is corresponding of net region are searched in residing rectangular mesh zone
Value, obtain the current command voltage vector with interpolation method (such as, bilinear interpolation) corresponding
Value; Or with the periodic coefficient on the grid point that closes on most
Replace.
Switch periods provided by the invention is optimized the SVPWM method, when guaranteeing that average frequency of switching is no more than the frequency range of power switch pipe normal operation requirement, considered the situation of electric machine control system dynamic change, take full advantage of the frequency characteristic of power switch pipe, can in the reduced harmonic peak value, greatly reduce total harmonic distortion.
Switch periods among the present invention is along with rotary speed, amplitude and the phase angle of command voltage vector constantly change, and method of the present invention not only goes for certainty SVPWM, can also be applicable to random SVPWM.In random SVPWM, the symmetry of pulse has been broken in randomization, and the pulse that present generally popular digital control chip can't produce asymmetric waveform.Therefore, in order to make method of the present invention can also be applicable to random SVPWM and to make things convenient for dead band time setting and compensation, (shown in Fig. 6,7) the present invention also provide a kind of modulator based on FPGA, its switch periods adopts above-mentioned optimization method, it is installed in the circuit of frequency conversion speed-adjusting system, mainly comprises:
(1) register district, it comprises two impulse hits time register groups, one-period register.The one-period register is used for depositing modulation period.Two jumping moment register groups, every group has 12 registers, the moment of depositing every phase upper arm and underarm impulse hits in these 24 registers.4 register control A phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control B phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control C phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group.Two groups of registers are used alternatingly the generation control impuls, if use first group of register a upper modulation period, then this cycle is used second group, and the lower cycle will be used first group.
Count and initial value heavy cartridges circuit for (2) one, its Counter is accepted count pulse and is subtracted 1 counting according to pulse.When counter reduces to 0, subtract again 1 when overflowing, the pulse of output spill over, control begin the counting in next cycle from the period register counting initial value of reloading.Commutation circuit is sent into again in the spill over pulse.The currency of counter send pulse-generating circuit.
(3) commutation circuit.This circuit is accepted the spill over from counter, controls two groups of registers alternately by commutation circuit, and send pulse-generating circuit.
(4) pulse-generating circuit.Its effect is: the currency of counter and impulse hits set point constantly compared, if identical, impulse hits then.The saltus step of pulse finally is converted into 6 tunnel control signals output that inverter needs.
Aspect the hardware realization of FPGA, the present invention alternately participates in relatively realizing the generation of 6 tunnel pulses by two register groups that make the control impuls jumping moment.The function of at present popular control chip all is the modulator approach that is arranged symmetrically with for pulse, i.e. the same along participating in register assignment relatively before and after the pulse, can't realize the invention provides asymmetric space vector width pulse modulation method; And popular control chip Dead Time producing method is fixed at present.
Main thought of the present invention is: at current period the jumping moment register that does not participate in comparison is carried out assignment; Finish (the lower cycle begins) constantly at current period, two groups of buffer status switch, and compare in the jumping moment register participation of current period assignment, and current period participates in jumping moment register group relatively and becomes not relatively state, for assignment is prepared; And before and after pulse, comprised Dead Time along participating in register institute assignment relatively, dead band time setting and dead area compensation all be in essence by in advance or delay pulse jumping moment (trailing edge in advance or rise edge delay) realize, one have 12 impulse hits constantly mutually in each cycle 3, the present invention can combination in any these 12 impulse hits constantly in advance and the delayed action mode, the type of action of this Dead Time is very flexible, has made things convenient for the combination of the algorithm of dead band time setting and advanced dead area compensation to use.The method thinking is novel, and is simple in structure, applying flexible; And fully used the parallel characteristics of FPGA, the speed of service is fast.
Present invention is described below in conjunction with the drawings and specific embodiments:
The invention provides that a kind of switch periods is optimized the SVPWM method and based on the modulator of FPGA, the structure of its inverter as shown in Figure 1.Modulator provided by the invention can be installed between the controller and isolated drive circuit of frequency conversion speed-adjusting system, also itself and controller can be integrated among the FPGA, as shown in Figure 6.
The main element symbol description is as follows among each figure of the present invention: 1 is the register district; 2 are counting and initial value heavy cartridges circuit; 3 is commutation circuit; 4 is pulse-generating circuit; 11 is register group 1; 12 is register group 2; 13 is period register; 21 is counter; 22 loading circuits of attaching most importance to.
Enforcement of the present invention at first will be divided into 6 sectors among Fig. 2 two large class zones shown in Figure 3: Zone R territory and Q zone.Be subdivided into again 12 sub regions, comprise subregion R1 in the Zone R territory, R2, R3, R4, R5, R6; Comprise subregion Q1 in the Q zone, Q2, Q3, Q4, Q5, Q6.Subregion R1, R2, R3, R4, R5, switch periods coefficient among the R6
, subregion Q1, Q2, Q3, Q4, Q5 is among the Q6
, the place, zone boundary
For some pulse-width modulation strategies, switch periods coefficient
The expression formula of parsing find the solution difficulty, can adopt paper " the switch periods optimization method (Switching period optimization method to random space vector PWM) of random SVPWM " (International Journal of Advancements in Computing Technology, Vol.5, No.4, the method evaluation solution of the numerical analysis that provides pp. 181 ~ 189,2013).
Then need the command voltage vector according to controller output
Judge whether to satisfy the condition that switch periods is optimized the SVPWM operation, after satisfying condition, enter switch periods and optimize the SVPWM mode of operation.Calculate
Amplitude and phase angle, try to achieve periodic coefficient according to amplitude and phase angle
Value, and then moment of calculating impulse hits, implementation step is as shown in Figure 5, and is specific as follows:
S1: modulator is started working, according to the command voltage vector
Direction of rotation and currency detect
Whether make a leapleap forward Zone R territory: a. if the time window of then setting the adjusting of width self adaptation begins timing, counting variable by the Q zone
With the timing variable
Initialize 0, execution in step S2; B. if not, then do with fixing switch periods
Be modulation period, namely
, execution in step S7.
S2: detect and whether to satisfy time window (restarting) condition that makes zero, namely whether satisfy following two: a. is by make a leapleap forward Zone R or by a R subregion another R subregion of directly making a leapleap forward of Q zone; B.
More than or equal to set point
, namely
If satisfy, then counting variable
Initialize 0, the timing variable
Initialize 0, execution in step S3.If do not satisfy, direct execution in step S3.
S3:
, the calculation command voltage vector
Amplitude and phase angle, table look-up and ask periodic coefficient, try to achieve switch periods
, try to achieve switch periods
Execution in step S4.
S4: according to the command voltage vector
Currency detects zone of living in: if a. is in Zone R territory or zone boundary, and execution in step S6 then; If b. be in the Q zone, execution in step S5. then
S7: the action time of calculating basic voltage vectors, by impulse hits trailing edge constantly in advance or the method for rise edge delay set Dead Time, according to the Dead Time of setting, calculate impulse hits constantly, impulse hits time register, period register assignment generate 6 road pulse switch signals by modulator.
Among the described step S3, table look-up and try to achieve periodic coefficient
Method be: with periodic coefficient
With modulation ratio
And phase angle
Between concern discretization, namely
With
Respectively with fixing step-length
With
Disperse, only with corresponding on the discretization grid
Value is stored in the memory, for tabling look-up.The method of tabling look-up is:
Judge
With
As shown in Figure 4 four periodic coefficients that the summit is corresponding of net region are searched in residing rectangular mesh zone
Value, obtain the current command voltage vector with interpolation method corresponding
Value; Or with the periodic coefficient on the grid point that closes on most
Replace.
In the concrete implementation process, because in 6 districts shown in Figure 2, the optimal period coefficient
With
With
Between relation be identical; And, in same district, such as
In the district, its
Scope be
, namely
, also be about
Therefore symmetry only needs storage
Scope be
Part, as shown in Figure 4.
The switch periods coefficient
With modulation ratio
And phase angle
The analytical expression of Relations Among does not usually exist or is very complicated, so only need on the memory limited point
Get final product, judge
With
As shown in Figure 4 four periodic coefficients that the summit is corresponding of net region are searched in residing rectangular mesh zone
Value, obtain the current command voltage vector with bilinear interpolation corresponding
Value.If the storage resources of controller has in limited time, also can be with the switch periods coefficient
Carry out surface fitting, find the solution by the method in line computation.
In conjunction with Fig. 7, the modulator based on FPGA provided by the invention, it comprises:
A register district 1, it comprises two impulse hits time register groups: register group 1, register group 2, one-period register 13.Period register 13 is used for depositing modulation period.Every group of register group 1 and register group 2 has 12 registers, the moment of depositing every phase upper arm and underarm impulse hits in these 24 registers.4 register control A phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control B phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control C phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group.Two groups of registers are used alternatingly the generation control impuls, if use register group 1 a upper modulation period, then this cycle is used register group 2, and the lower cycle will be used register group 1.
In conjunction with Fig. 8, the forward position of the register 1 control A phase upper arm in the register group 1, the rear edge of register 2 control A phase upper arm, the forward position of register 3 control A phase underarms, the rear edge of register 4 control A phase underarms; The forward position of register 5 control B phase upper arm, the rear edge of register 6 control B phase upper arm, the forward position of register 7 control B phase underarms, the rear edge of register 8 control B phase underarms; The forward position of register 9 control C phase upper arm, the rear edge of register 10 control C phase upper arm, the forward position of register 11 control C phase underarms, the rear edge of register 12 control C phase underarms.
The forward position of the register 13 control A phase upper arm in the register group 2, the rear edge of register 14 control A phase upper arm, the forward position of register 15 control A phase underarms, the rear edge of register 16 control A phase underarms; The forward position of register 17 control B phase upper arm, the rear edge of register 18 control B phase upper arm, the forward position of register 19 control B phase underarms, the rear edge of register 20 control B phase underarms; The forward position of register 21 control C phase upper arm, the rear edge of register 22 control C phase upper arm, the forward position of register 23 control C phase underarms, the rear edge of register 24 control C phase underarms.
Count and initial value heavy cartridges circuit 2 for one, its Counter 21 has an input and two outputs, and input line connects count pulse and subtracts 1 counting according to pulse; An output line is exported current count value, connects an input line of pulse-generating circuit 4; Another output line output spill over when counter reduces to 0, subtracts 1 when overflowing again, the pulse of output spill over, and control heavy cartridges circuit 22 begins the counting in next cycle from the period register 13 counting initial value of reloading.The input pin CP of commutation circuit 3 is sent into again in the spill over pulse.The currency of counter 21 send pulse-generating circuit 4.Heavy cartridges circuit 22 has two inputs and an output, and an input line connects the spill over of counter 21, and another input connects period register 13, and output line connects counter 21.
The spill over that commutation circuit 3 is accepted from counter 21, control register group 1 and register group 2 alternately pass through commutation circuit 3, and send pulse-generating circuit 4.
Pulse-generating circuit 4 compares the currency of counter and impulse hits set point constantly, if identical, impulse hits then.The saltus step of pulse finally is converted into 6 tunnel control signals output that inverter needs.
The figure place of above-mentioned related register can be 16,32 or other, need to specifically select according to model of modulation period, FPGA etc.
Modulator approach provided by the invention and circuit can be realized at numerous on the market FPGA, such as the FPGA of the companies such as Altera, Xilinx, Lattice production.
Be that 30Hz(is that motor stator voltage angle frequency is 60 in the fundamental voltage frequency
Rad/s), the pwm switch frequency is 10000Hz, modulation ratio is to implement the present invention under 0.9 the condition.Fig. 8 be available technology adopting 7 sections type of action of symmetrical expression fixedly under the SVPWM method A phase voltage pulse of inverter output within the primitive period, sample, carry out the amplitude spectrum that Fourier transform obtains; Fig. 9 is that the A phase voltage pulse of inverter output under the inventive method and the equipment was sampled within the primitive period, carries out the amplitude spectrum that Fourier transform obtains; As shown in Figure 8, the peak value at switching frequency integral multiple place collection bunch harmonic wave is very large; As shown in Figure 9, switch periods is optimized the peak value that the SVPWM method can greatly reduce switching frequency integral multiple place collection bunch harmonic wave.
Figure 10 is the fixing switch periods temporal evolution figure under the SVPWM method of 7 sections type of action of symmetrical expression of available technology adopting; Figure 11 be under the inventive method and the equipment sometime window begin switch periods temporal evolution figure in a period of time.Dashed rectangle partly is the situation when Rule of judgment is no among Fig. 5 step S5 in Figure 11.As shown in Figure 10 and Figure 11, can obviously find out from dashed rectangle part difference between the present invention and the prior art to have presented one of innovative point of the present invention, the present invention can guarantee to take full advantage of the switching frequency of power switch pipe in the unstable state situation.Switch periods provided by the invention is optimized the SVPWM method and apparatus can reduce harmonic distortion and collection bunch harmonic wave peak value, and can take full advantage of the switching frequency of power switch pipe.
The characteristics of method of the present invention and modulator are:
(1) method of the present invention guarantee fundamental voltage, under average on-off times etc. is constant in each modulation period the prerequisite, can significantly reduce the large peak value of SVPWM method collection bunch harmonic wave that generally adopts, and can greatly reduce total harmonic distortion, improve the quality of output voltage and the Electro Magnetic Compatibility of governing system;
(2) method of the present invention is controlled average frequency of switching by the time window of width self adaptation adjusting, takes full advantage of the frequency range of power switch pipe, has improved the cost performance of frequency conversion system;
(3) Dead Time of three-phase control impuls and producing method can independently arrange in the modulator of the present invention, have very large flexibility, have made things convenient for the combination of dead band time setting and advanced dead area compensation algorithm to use.
(4) modulator of the present invention can take full advantage of flexibly circuit customization characteristics of FPGA, and other circuit and the algorithm of governing system is integrated among the FPGA; Utilize the executed in parallel characteristic of FPGA to improve the speed that control software is carried out, be the more mutual fusion of advanced control algorithm and modulation algorithm, with and application in frequency conversion speed-adjusting system guarantee is provided.
(5) switch periods among the present invention is along with rotary speed, amplitude and the phase angle of command voltage vector constantly change, and method of the present invention not only goes for certainty SVPWM, can also be applicable to random SVPWM.
Application of the present invention has solved the large spike problem of traditional SVPWM method collection bunch harmonic wave, and has greatly reduced total harmonic distortion, can improve Electro Magnetic Compatibility and the reliability of system, and improve the efficient of utilization of power.Help especially to solve the course continuation mileage problem that causes owing to the battery capacity restriction of electric automobile, and can be applicable to the industry such as wind power generation, have good society and economic benefit.
It should be noted that; above-mentioned specific embodiment only is exemplary; under above-mentioned instruction of the present invention; those skilled in the art can carry out on the basis of above-described embodiment various improvement and distortion (such as with 7 sections type of action fixedly the SVPWM method become 5 sections discontinuous certainty SVPWM methods of type of action etc.), and these improvement or the distortion all drop in protection scope of the present invention.It will be understood by those skilled in the art that top specific descriptions just in order to explain purpose of the present invention, is not for restriction the present invention.Protection scope of the present invention is limited by claim and equivalent thereof.
Claims (10)
1. switch periods Optimal Space Vector PWM method, it is characterized in that, control average frequency of switching by the time window that a width self adaptation is regulated, the mode of control average frequency of switching is: the switch periods in the different time window is separate; Switch periods in the window is interrelated at the same time, and the time window that described width self adaptation is regulated is presented as the timing variable
2. switch periods Optimal Space Vector PWM method according to claim 1 is characterized in that, when being used for certainty or random space vector pulse duration modulation method, will with 6 non-zero basic voltage vectors of inverter (
) end points is that the hexagonal area on summit is divided into two large classes zones: Zone R territory and Q zone, comprise subregion R1 in the Zone R territory, R2, R3, R4, R5, R6 comprises subregion Q1 in the Q zone, Q2, Q3, Q4, Q5, Q6, switch periods coefficient in the Zone R territory
, in the Q zone
, the place, zone boundary
3. switch periods Optimal Space Vector PWM method according to claim 2 is characterized in that, when being used for certainty or random space vector pulse duration modulation method, switch periods is subject to time window, switch periods coefficient
With modulation ratio
And phase angle
Between optimization rule control, specifically comprise the steps:
S1: modulator is started working, according to the command voltage vector
Direction of rotation and currency detect
Whether make a leapleap forward Zone R territory: a. if the time window of then setting the adjusting of width self adaptation begins timing, counting variable by the Q zone
With the timing variable
Initialize 0, execution in step S2; B. if not, then with fixing switch periods
As modulation period, namely
, execution in step S7;
S2: detect and whether to satisfy the time window condition that makes zero: if a. satisfies, counting variable then
Initialize 0, the timing variable
Initialize 0, execution in step S3; If b. do not satisfy, direct execution in step S3;
S3:
, according to controller output command voltage vector
Amplitude and phase angle, table look-up and ask periodic coefficient
, again in conjunction with fixing switch periods
, try to achieve switch periods
, execution in step S4;
S4: according to the command voltage vector
Currency detects zone of living in: if a. is in Zone R territory or zone boundary, and execution in step S6 then; If b. be in the Q zone, execution in step S5 then;
S5: judge whether satisfy to adopt the optimal period condition of tabling look-up and trying to achieve: a. if, execution in step S6 then; B. if not, then
, execution in step S6;
S7: the action time of calculating basic voltage vectors, by impulse hits trailing edge constantly in advance or the method for rise edge delay set Dead Time, according to the Dead Time of setting, calculate impulse hits constantly, impulse hits time register, period register assignment generate 6 road pulse switch signals by modulator.
4. switch periods Optimal Space Vector PWM method according to claim 3 is characterized in that, among the described step S2, the condition that time window makes zero is: a. is by make a leapleap forward Zone R territory or by a R subregion another R subregion of directly making a leapleap forward, Q zone; B.
More than or equal to set point
, namely
5. switch periods Optimal Space Vector PWM method according to claim 4 is characterized in that, among the described step S3, tables look-up and tries to achieve periodic coefficient
Method be: with periodic coefficient
With modulation ratio
And phase angle
Between concern discretization, described method of tabling look-up is: a. judges
With
Four periodic coefficients that the summit is corresponding of net region of living in are searched in residing rectangular mesh zone
Value, obtain the current command voltage vector with interpolation method corresponding
Value; Or the periodic coefficient of b. on the grid point that closes on most
Replace.
6. switch periods Optimal Space Vector PWM method according to claim 5 is characterized in that, the method for described discretization is:
With
Respectively with fixing step-length
With
Disperse, only with corresponding on the discretization grid
Value is stored in the memory, for tabling look-up.
8. one kind such as the described switch periods Optimal Space Vector PWM of one of claim 1-7 device, it is characterized in that, comprise two group pulse jumping moment registers, one-period register, counting and initial value heavy cartridges circuit, a commutation circuit and a pulse-generating circuit, wherein:
Described period register is used for depositing modulation period;
In the two group pulse jumping moment registers all be used to the moment of depositing every phase upper arm and underarm impulse hits;
The counter of described counting and initial value heavy cartridges circuit is used for accepting count pulse and subtracts 1 counting according to pulse, when counter reduces to 0, subtract again 1 when overflowing, the pulse of output spill over, control is from the period register counting initial value of reloading, begin the counting in next cycle, commutation circuit is sent into again in the spill over pulse, and the currency of counter send pulse-generating circuit;
Described pulse-generating circuit is used for the currency of counter is compared with impulse hits set point constantly, if identical, impulse hits then, 6 tunnel control signals that the saltus step of pulse finally is converted into inverter to be needed are exported.
9. switch periods Optimal Space Vector PWM device according to claim 8, it is characterized in that, every group pulse jumping moment register comprises 12 registers, the moment of depositing every phase upper arm and underarm impulse hits in these 24 registers, 4 register control A phases are arranged: the forward position of control upper arm pulse in every group, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge; 4 register control B phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group; 4 register control C phases are arranged, the forward position of control upper arm pulse, a control upper arm pulse back edge, the forward position of control underarm pulse, a control underarm pulse back edge in every group.
10. switch periods Optimal Space Vector PWM device according to claim 9, it is characterized in that, described two group pulse jumping moment registers are used alternatingly, and the impulse hits of depositing in the impulse hits time register has constantly comprised Dead Time, is directly used in the generation control impuls.
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CN104682827A (en) * | 2015-02-28 | 2015-06-03 | 广东美的制冷设备有限公司 | Motor control system and dead-zone insertion method of SVPWM (space vector pulse width modulation) |
CN105045988A (en) * | 2015-07-10 | 2015-11-11 | 河南理工大学 | Optimization method of random space vector PWM (Pulse-Width Modulation) customization parameter |
CN106160453A (en) * | 2016-08-05 | 2016-11-23 | 江苏大学 | A kind of NPC inverter based on Markov chain mixes random SVPWM control system and method |
CN108306532A (en) * | 2017-08-17 | 2018-07-20 | 安徽华腾电气有限公司 | The simplification division methods of three level SVPWM drive signals |
CN110365229A (en) * | 2019-07-12 | 2019-10-22 | 中国航空工业集团公司雷华电子技术研究所 | A kind of three-phase step-down type rectifier phase-separating section time-varying control method |
US10483893B2 (en) | 2016-08-31 | 2019-11-19 | Lg Electronics Inc. | Motor driving apparatus and home appliance including the same |
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104682827A (en) * | 2015-02-28 | 2015-06-03 | 广东美的制冷设备有限公司 | Motor control system and dead-zone insertion method of SVPWM (space vector pulse width modulation) |
CN105045988A (en) * | 2015-07-10 | 2015-11-11 | 河南理工大学 | Optimization method of random space vector PWM (Pulse-Width Modulation) customization parameter |
CN105045988B (en) * | 2015-07-10 | 2017-11-24 | 河南理工大学 | The optimization method of random space vector PWM customized parameters |
CN106160453A (en) * | 2016-08-05 | 2016-11-23 | 江苏大学 | A kind of NPC inverter based on Markov chain mixes random SVPWM control system and method |
US10483893B2 (en) | 2016-08-31 | 2019-11-19 | Lg Electronics Inc. | Motor driving apparatus and home appliance including the same |
CN108306532A (en) * | 2017-08-17 | 2018-07-20 | 安徽华腾电气有限公司 | The simplification division methods of three level SVPWM drive signals |
CN110365229A (en) * | 2019-07-12 | 2019-10-22 | 中国航空工业集团公司雷华电子技术研究所 | A kind of three-phase step-down type rectifier phase-separating section time-varying control method |
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