CN103297777A - Method and device for increasing video encoding speed - Google Patents

Method and device for increasing video encoding speed Download PDF

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CN103297777A
CN103297777A CN2013101963844A CN201310196384A CN103297777A CN 103297777 A CN103297777 A CN 103297777A CN 2013101963844 A CN2013101963844 A CN 2013101963844A CN 201310196384 A CN201310196384 A CN 201310196384A CN 103297777 A CN103297777 A CN 103297777A
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梁凡
邹彬彬
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NATIONAL ENGINEERING LABORATORY FOR VIDEO TECHNOLOGY GUANGZHOU RESEARCH AND INDUSTRIALIZATION CENTER
GUANGZHOU CHNAVS DIGITAL TECHNOLOGY Co Ltd
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NATIONAL ENGINEERING LABORATORY FOR VIDEO TECHNOLOGY GUANGZHOU RESEARCH AND INDUSTRIALIZATION CENTER
GUANGZHOU CHNAVS DIGITAL TECHNOLOGY Co Ltd
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Abstract

The invention relates to a method and a device for increasing a video encoding speed, and belongs to the field of image processing. The method and the device are characterized in that a CPU (central processing unit) of a video compression encoder performs logical operation for infra-frame prediction or inter-frame prediction mode selection, loop filter and entropy encoding, a GPU (graphics processing unit) of the video compression encoder performs numerical operation for movement estimation, movement compensation, transformation and quantization and inverse transformation and inverse quantization, and the device comprises a CPU framework flow line and a GPU framework flow line which are parallel to each other. The method and the device have the advantages that a heterogenous system with a combination of a CPU framework and a GPU framework is comprehensively utilized for increasing video compressing and encoding speeds, so that videos are effectively compressed on the premise that the quality is guaranteed, the encoding elapsed time is greatly shortened, the integral performance of the encoder is greatly improved, the integral complexity of the encoder is assuredly unchanged basically, the instantaneity of the video encoder is greatly improved, and the method and the device can be applied to real-time encoding and decoding places.

Description

A kind of method and device for accelerated video encoding speed
Technical field
The present invention relates to the substandard a kind of isomery device of accelerating the video coding rate of AVS of China's independent intellectual property right, also relate to a kind of method of the accelerated video encoding speed based on above-mentioned isomery device simultaneously.
Background technology
High-definition digital video has brought the explosive growth of data volume, and hardware condition development speeds such as Computer Processing speed, memory span, channel width are limited.Compression algorithm is to improve the unique selection of video processing speed under current hardware condition efficiently.Exist various redundant informations in the high-definition digital video, as visual redundancy, structural redundancy, spatial redundancy, time redundancy etc.In order to eliminate these redundancies, standardization bodies such as ISO/IEC, ITU-T have formulated video coding international standard.The AVS video encoding and decoding standard that the H.26X series that the MPEG-X series that the Motion Picture Experts Group that existing video coding international standard is respectively ISO/IEC formulates, the video coding expert group of ITU-T formulate and China propose.Though these compression standards have obtained good compression efficient, the improvement of compression performance all is to increase the cost of encoding and decoding complexity to obtain.When carrying out the operation of HD video encoding and decoding, speed still is slow.
For the accelerating video encoding and decoding, people have adopted methods such as CPU multimedia instruction collection, dsp chip, FPGA hardware circuit to carry out the acceleration of encoding and decoding.But the equal defectiveness of these methods, the cost of, dsp chip limited as the acceleration performance of CPU multimedia instruction collection and FPGA is higher and algorithm is portable relatively poor.GPU is the standard configuration of PC, and after GPU obtained programmatic and powerful Floating-point Computation ability and parallel characteristics, the potentiality aspect general-purpose computations were greatly improved.If in video encoding-decoding process, can utilize the advantage of GPU, can reach the concurrent working with CPU, then the efficient of coding and decoding video will be greatly improved.
Summary of the invention
The purpose of this invention is to provide a kind of method for accelerated video encoding speed, make CPU and the GPU of video compression encoder be in the concurrent working state, wherein, CPU carries out infra-frame prediction or inter-frame forecast mode selection, loop filtering, the computing of entropy codimg logic, and the GPU of video compression encoder carries out estimating motion, motion compensation, transform and quantization, inverse transformation and inverse quantization numerical operation.
The method of accelerated video encoding speed of the present invention, its concrete steps are as follows:
A) at first by CPU present frame and reconstruction frames are read in the host side internal memory, open up present frame and the reconstruction frames memory space in GPU, and present frame and reconstruction frames are copied to the equipment end internal memory from the host side internal memory;
B) input of CPU core function is set, calls the GPU kernel function and carry out the estimating motion computing, try to achieve optimum movement vector;
C) optimum movement vector is carried out the entropy coding, and
Thereby GPU carries out motion compensation according to the optimum movement vector of trying to achieve calculates residual values, residual values is carried out transform and quantization handle back acquisition residual block data;
D) the residual block data are carried out the entropy encoding operation in CPU, after simultaneously encoder adopts the residual block data of GPU to carry out inverse transformation and inverse quantization, enter CPU and carry out loop filtering, and its result stores as reconstruction frames, carry out data for inter prediction next time and prepare; And with the binary data stream output that obtains behind the entropy coding, finally obtain data flow behind the compressed encoding in conjunction with optimum movement vector simultaneously.
The described residual block data of steps d through inverse transformation and inverse quantization after, enter CPU and carry out loop filtering and eliminate that to put into buffer memory behind blocking effect and the false edge standby as reconstruction frames.
The described optimum movement vector of step b selects also to adopt following CPU and GPU parallel processing mode:
The present frame of CPU and reconstruction frames carry out preliminary treatment and the parameter that obtains are passed to GPU carrying out estimating motion; GPU then carries out the computing of optimal motion vector Rule of judgment, and search obtains the optimal motion vector.
The objective of the invention is to provide simultaneously a kind of device for accelerated video encoding speed, it is a kind of isomery device of the AVS of acceleration coding rate, it is the device that adopts the heterogeneous system speech coding speed of CPU+GPU, relating to the logical operation part realizes at CPU, relate to the numerical operation part and then realize at GPU, taken full advantage of the GPU powerful operation capacity.In contrast to the device that other adopt the isomorphism system, it can improve the overall performance of encoder greatly, does not increase the complexity of encoder simultaneously, can realize real-time application.
For achieving the above object, the device of accelerated video encoding speed of the present invention adopts following technical proposals:
Comprise CPU and GPU, CPU architecture flow waterline and GPU architecture flow waterline are two streamlines that walk abreast, and CPU architecture flow waterline comprises model selection, loop filtering, entropy coding module; GPU architecture flow waterline then comprises estimating motion, motion compensation, transform and quantization, inverse transformation and inverse quantization module.
In order to eliminate CPU architecture flow waterline to the wait of GPU architecture flow waterline, a data buffering area is set between CPU and GPU streamline, this buffering area is used for depositing the optimal motion vector that is calculated by GPU estimating motion module, thereby the data that can remove between these two streamlines are waited for relation.
Optimal motion vector of the present invention selects also to adopt the heterogeneous system of CPU+GPU, and the CPU framework is responsible for preliminary treatment and parameter transfer unit, and the GPU framework then comprises GPU motion search module and GPU shared drive.
The heterogeneous system that comprehensive utilization of C PU framework of the present invention and GPU framework combine carries out the acceleration of video compression coding, test result shows, the device of accelerated video encoding speed of the present invention can effectively compress video under the prerequisite of ensuring the quality of products, it is consuming time to have reduced coding significantly, improve the overall performance of encoder greatly, and the overall complexity that guarantees encoder is constant substantially, makes the real-time of video encoder obtain significantly improving, and can be applied to the real time codec occasion.
In order to verify the performance of CPU framework of the present invention and GPU framework, the present invention adopts the sequence of different resolution to do coding quality and velocity test respectively.Experiment is set to frame per second=30 frame/seconds.What herein, the conventional architectures test platform adopted is RM(AVS canonical reference software).
The coding quality experimental result is as shown in table 1:
Figure DEST_PATH_DEST_PATH_IMAGE001
In table 1, PSNR refers to Y-PSNR, and its unit is dB, and the unit of code check is Kbit/s.Can be drawn by table 1, the PSNR that uses forward direction second frame to obtain as the processing method of reconstruction frames to SD sequence Vidyo compares and uses the mean value of the PSNR drop-out value that two reconstruction frames obtain to be 0.0275dB, and the mean value that the PSNR that uses forward direction second frame to obtain as the processing method of reconstruction frames to high definition sequence B asketballDrive compares the PSNR drop-out value that two reconstruction frames of use obtain is for then being 0.0225 dB.
In order to carry out coding rate relatively, the present invention adopts the sequence of different resolution to test, test result be under the CPU environment with the environment that accelerates at GPU under the processing speed contrast, wherein, the arithmetic speed under the CPU environment refers at the velocity amplitude that has used after multithreadings such as SSE are optimized.
  
Comparison diagram (Figure of description 5) by coding quality and coding speed-up ratio can draw, the algorithm that the present invention proposes is under the prerequisite that guarantees coding quality, coding rate has had lifting comparatively significantly, and the video that pixel resolution is more high more can embody the method for the present invention's proposition for the lifting of coding rate.Because the present invention proposes encryption algorithm and obtained parallel processing in the CPU+GPU framework: adopt a plurality of threads, a plurality of thread block parallel processing, a plurality of other parallel processing of frame level, make the superior calculated performance of GPU obtain good embodiment.
Description of drawings
Fig. 1 is the video compression coding block diagram of one embodiment of the present of invention.
Fig. 2 is the apparatus structure schematic diagram of one embodiment of the present of invention.
Fig. 3 is the apparatus structure schematic diagram of an alternative embodiment of the invention.
Fig. 4 is that the optimal motion vector of the embodiment of the invention is selected schematic diagram.
Fig. 5 is the comparison diagram of coding speed-up ratio of the present invention.
Embodiment
Below in conjunction with accompanying drawing the present invention is further explained.
As Fig. 1, shown in Figure 2, the coding block diagram of the accelerated video encoding speed of present embodiment comprises infra-frame prediction 5, inter prediction (comprising estimating motion 1 and motion compensation 4), buffer memory 2, transform and quantization 6, entropy coding 8, inverse transformation and inverse quantization 9, frame buffer 7, loop filtering 3, at first, original video sequence is carried out inter prediction (estimating motion 1 and motion compensation 4) and infra-frame prediction 5, Sn is the change over switch of inter prediction and infra-frame prediction 5 among Fig. 1, inter prediction needs with reference to leaving a frame in the buffer memory 2 or the reconstruction frames of some frames in, carry out obtaining optimal motion vector MVs after estimating motion 1 is handled according to selecting optimization model, thereby carry out motion compensation 4 then and calculate residual values, residual values is carried out transform and quantization 6 obtain the residual block data, the residual block data are used for local decode through inverse transformation and inverse quantization 9 backs, adopt 3 pairs of inverse transformations of loop filtering of CPU framework processing and the reconstruction frames of inverse quantization 9 processing back acquisitions to carry out filtering, be used for eliminating residual block effect and false edge, reconstruction frames is stored in the buffer memory 2, and final residual block data and optimal motion vector MVs generate the bit stream of compression through entropy coding 8.
The detailed process of video coding is such, at first by CPU primitive frame and reconstruction frames is read in the host side internal memory, opens up primitive frame and the reconstruction frames memory space in GPU, and primitive frame and reconstruction frames are copied to the equipment end internal memory from the host side internal memory.The input of CPU core function is set, primitive frame N and primitive frame N+1 carry out preliminary treatment by the CPU framework, this two frame enters the GPU framework simultaneously and carries out estimating motion 1 operation then, because reconstruction frames N-2 and reconstruction frames N-1 are ready, therefore can be according to selecting optimization model to obtain the optimal motion vector of primitive frame N and primitive frame N+1 simultaneously, obtain reference macroblock by this vector, carry out obtaining residual values after the motion compensation 4, this residual values is handled in the enterprising line translation of GPU framework and quantification 6, obtain final residual block data, behind residual block data process inverse transformation and the inverse quantization 7, enter CPU and carry out loop filtering 3 and eliminate that to put into buffer memory 2 behind blocking effects and the false edge standby as reconstruction frames, CPU is ready with next coded frame desired data.Final residual block data and optimal motion vector MVs generate the bit stream of compression through entropy coding 8.Finish the processing of current encoded frame at GPU after, can carry out the calculating of optimal motion vector immediately to next coded frame, form a streamline that comprises CPU framework and GPU framework, finish the processing of video coding.
Fig. 2 shows CPU architecture flow waterline and the GPU architecture flow waterline of present embodiment.This framework has two parallel streamlines, and one is on the CPU, and other one then is on the GPU.Streamline on the CPU comprises modules such as infra-frame prediction 5 or inter-frame forecast mode selection, loop filtering 3, entropy coding 8, is subjected to the restriction of I/O and GPU streamline; Streamline on the GPU then comprises estimating motion 1, motion compensation 4, and transform and quantization 6, inverse transformation and inverse quantization 9 modules are influenced by I/O only, only show estimating motion module 1 among the figure, and other modules are omitted.
In order to eliminate streamline on the CPU to the wait of the streamline on the GPU, among another embodiment shown in Fig. 3, a data buffering area is set between CPU and GPU streamline, this buffering area is used for depositing the optimal motion vector that is calculated by GPU, and the data that can remove between these two streamlines are waited for relation.Infra-frame prediction is to finish at the CPU framework, does not omit in Fig. 2 and Fig. 3 and draws.The accelerated video encoding device of present embodiment and accelerated video encoding block diagram are corresponding one by one, do not draw so apparatus module figure omits.
The optimal motion vector is selected and can be gone to realize according to prior art (according to the framework of existing selection optimization model and isomorphism system), in the present invention, in order fully to implement thought of the present invention, the optimal motion vector of above embodiment is selected the existing selection optimization model that is still taked, but adopted the CPU+GPU heterogeneous system, corresponding, its processing mode also has difference, as shown in Figure 4, the optimal motion vector of above-mentioned two embodiment selects module can also adopt the heterogeneous system of CPU+GPU.Wherein, the CPU framework comprises preliminary treatment and parameter transfer unit 10, the data that CPU is transmitted pass to estimating motion module 1 and data reconstruction buffer memory 2, the GPU framework comprises GPU motion search module 11 and GPU shared drive 12, the GPU motion search module 11 parallel numerical operations that carry out optimal motion vector Rule of judgment, search obtains the optimal motion vector, and the parameter that the CPU framework transmits and Search Results are stored in GPU shared drive 12.
Foregoing only is that optimal way of the present invention is described, and is not that the spirit and scope of the present invention are limited.Under the prerequisite that does not break away from design concept of the present invention, any various modification and improvement that technical scheme of the present invention is made all belongs to protection scope of the present invention.

Claims (7)

1. method that is used for accelerated video encoding speed, it is characterized in that: the CPU of video compression encoder carries out infra-frame prediction or inter-frame forecast mode selection, loop filtering, the computing of entropy codimg logic, the GPU of video compression encoder carries out estimating motion, motion compensation, transform and quantization, inverse transformation and inverse quantization numerical operation, CPU and GPU parallel processing.
2. method according to claim 1, it is characterized in that: treatment step is as follows:
A) at first by CPU present frame and reconstruction frames are read in the host side internal memory, open up present frame and the reconstruction frames memory space in GPU, and present frame and reconstruction frames are copied to the equipment end internal memory from the host side internal memory;
B) input of CPU core function is set, calls the GPU kernel function and carry out the estimating motion computing, try to achieve optimum movement vector;
C) optimum movement vector is carried out the entropy coding, and
Thereby GPU carries out motion compensation according to the optimum movement vector of trying to achieve calculates residual values, residual values is carried out transform and quantization handle back acquisition residual block data;
D) the residual block data are carried out the entropy encoding operation in CPU, after simultaneously encoder adopts the residual block data of GPU to carry out inverse transformation and inverse quantization, enter CPU and carry out loop filtering, and its result stores as reconstruction frames, carry out data for inter prediction next time and prepare; And with the binary data stream output that obtains behind the entropy coding, finally obtain data flow behind the compressed encoding in conjunction with optimum movement vector simultaneously.
3. method according to claim 2 is characterized in that: the described residual block data of steps d through inverse transformation and inverse quantization after, enter CPU and carry out loop filtering and eliminate that to put into buffer memory behind blocking effect and the false edge standby as reconstruction frames.
4. method according to claim 2 is characterized in that: the described optimum movement vector of step b selects also to adopt CPU and GPU parallel processing mode:
The present frame of CPU and reconstruction frames carry out preliminary treatment and the parameter that obtains are passed to GPU carrying out estimating motion; GPU then carries out the computing of optimal motion vector Rule of judgment, and search obtains the optimal motion vector.
5. be used for realizing a kind of device for accelerated video encoding speed of the arbitrary described method of claim 1 to 4, comprise CPU and GPU, it is characterized in that: CPU architecture flow waterline and GPU architecture flow waterline are two streamlines that walk abreast, CPU architecture flow waterline comprises model selection, loop filtering, entropy coding module, and GPU architecture flow waterline comprises estimating motion, motion compensation, transform and quantization, inverse transformation and inverse quantization module.
6. device according to claim 5 is characterized in that: in order to eliminate CPU architecture flow waterline to the wait of GPU architecture flow waterline, be provided for depositing the data buffer zone of the optimal motion vector that GPU calculates between CPU and GPU architecture flow waterline.
7. device according to claim 5, it is characterized in that: the optimal motion vector of described estimating motion module selects module also to adopt the heterogeneous system of CPU+GPU, the CPU framework comprises preliminary treatment and parameter transfer unit, and the GPU framework comprises GPU motion search module and GPU shared drive.
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Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104125466A (en) * 2014-07-10 2014-10-29 中山大学 GPU (Graphics Processing Unit)-based HEVC (High Efficiency Video Coding) parallel decoding method
CN104853193A (en) * 2014-02-19 2015-08-19 腾讯科技(北京)有限公司 Video compression method, device and electronic equipment
CN105245896A (en) * 2015-10-09 2016-01-13 传线网络科技(上海)有限公司 HEVC (High Efficiency Video Coding) parallel motion compensation method and device
CN105516726A (en) * 2015-11-27 2016-04-20 传线网络科技(上海)有限公司 Motion compensation matching method and system of video coding
CN105700821A (en) * 2014-12-10 2016-06-22 三星电子株式会社 semiconductor device and compressing/decompressing method thereof
CN105872553A (en) * 2016-04-28 2016-08-17 中山大学 Method for adaptive loop filter based on parallel computing
CN106031177A (en) * 2014-02-18 2016-10-12 微软技术许可有限责任公司 Host encoder for hardware-accelerated video encoding
CN109391816A (en) * 2018-10-26 2019-02-26 大连理工大学 The method for parallel processing of HEVC medium entropy coding link is realized based on CPU+GPU heterogeneous platform
US10614541B2 (en) 2017-06-29 2020-04-07 Nvidia Corporation Hybrid, scalable CPU/GPU rigid body pipeline
CN111429332A (en) * 2020-03-23 2020-07-17 成都纵横融合科技有限公司 GPU-based rapid laser point cloud three-dimensional calculation method
CN112422876A (en) * 2020-10-14 2021-02-26 西安万像电子科技有限公司 Image processing method and server
CN113115050A (en) * 2021-04-08 2021-07-13 联捷计算科技(深圳)有限公司 Webp image compression system, compression method and readable storage medium
CN113747170A (en) * 2021-09-08 2021-12-03 深圳市算筹信息技术有限公司 Method for performing video coding and decoding operation by using AI chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110135002A1 (en) * 2008-08-11 2011-06-09 Sk Telecom Co., Ltd. Moving image coding device and method
CN102497550A (en) * 2011-12-05 2012-06-13 南京大学 Parallel acceleration method and device for motion compensation interpolation in H.264 encoding

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110135002A1 (en) * 2008-08-11 2011-06-09 Sk Telecom Co., Ltd. Moving image coding device and method
CN102497550A (en) * 2011-12-05 2012-06-13 南京大学 Parallel acceleration method and device for motion compensation interpolation in H.264 encoding

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
房波: "基于通用可编程GPU的视频编解码器--架构、算法与实现", 《中国优秀硕士学位论文电子期刊网》 *
江辉: "基于GPU的H.264视频并行编解码器", 《中国优秀硕士学位论文电子期刊网》 *

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106031177A (en) * 2014-02-18 2016-10-12 微软技术许可有限责任公司 Host encoder for hardware-accelerated video encoding
CN104853193A (en) * 2014-02-19 2015-08-19 腾讯科技(北京)有限公司 Video compression method, device and electronic equipment
CN104853193B (en) * 2014-02-19 2019-06-07 腾讯科技(北京)有限公司 Video-frequency compression method, device and electronic equipment
CN104125466B (en) * 2014-07-10 2017-10-10 中山大学 A kind of HEVC parallel decoding methods based on GPU
CN104125466A (en) * 2014-07-10 2014-10-29 中山大学 GPU (Graphics Processing Unit)-based HEVC (High Efficiency Video Coding) parallel decoding method
CN105700821A (en) * 2014-12-10 2016-06-22 三星电子株式会社 semiconductor device and compressing/decompressing method thereof
CN105700821B (en) * 2014-12-10 2021-07-06 三星电子株式会社 Semiconductor device and compression/decompression method thereof
CN105245896A (en) * 2015-10-09 2016-01-13 传线网络科技(上海)有限公司 HEVC (High Efficiency Video Coding) parallel motion compensation method and device
CN105516726B (en) * 2015-11-27 2019-04-09 传线网络科技(上海)有限公司 The motion compensation matching process and system of Video coding
CN105516726A (en) * 2015-11-27 2016-04-20 传线网络科技(上海)有限公司 Motion compensation matching method and system of video coding
CN105872553B (en) * 2016-04-28 2018-08-28 中山大学 A kind of adaptive loop filter method based on parallel computation
CN105872553A (en) * 2016-04-28 2016-08-17 中山大学 Method for adaptive loop filter based on parallel computing
US10614541B2 (en) 2017-06-29 2020-04-07 Nvidia Corporation Hybrid, scalable CPU/GPU rigid body pipeline
CN109391816A (en) * 2018-10-26 2019-02-26 大连理工大学 The method for parallel processing of HEVC medium entropy coding link is realized based on CPU+GPU heterogeneous platform
CN111429332A (en) * 2020-03-23 2020-07-17 成都纵横融合科技有限公司 GPU-based rapid laser point cloud three-dimensional calculation method
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CN113115050A (en) * 2021-04-08 2021-07-13 联捷计算科技(深圳)有限公司 Webp image compression system, compression method and readable storage medium
CN113115050B (en) * 2021-04-08 2023-02-17 联捷计算科技(深圳)有限公司 Webp image compression system, compression method and readable storage medium
CN113747170A (en) * 2021-09-08 2021-12-03 深圳市算筹信息技术有限公司 Method for performing video coding and decoding operation by using AI chip

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Application publication date: 20130911