CN103296885A - Pulse width modulation (PWM) power converter analog simulation circuit and simulation method - Google Patents

Abstract

The invention discloses a pulse width modulation (PWM) power converter analog simulation circuit and simulation method. A first electronic analog switch circuit and a second electronic analog switch circuit are adopted to simulate half-bridge type power switch circuits in a PWM power converter; a first-order flywheel circuit is adopted to simulate a reactor in the PWM power converter; a proportional integral circuit is adopted to simulate a capacitor in the PWM power converter; a proportional amplification circuit is adopted to simulate a resistor in the PWM power converter; and a direct/alternating current voltage signal generator is adopted to simulate a voltage source and a current source of the direct/alternating current voltage signal generator. The PWM power converter analog simulation circuit has the advantages that the PWM power converter analog simulation circuit is high in simulation precision, low in cost and easy to achieve, and the simulation step size is not limited, and the like.

Description

Pwm power converter analog simulation circuit and emulation mode

Technical field

The present invention relates to a kind of pwm power converter analog simulation circuit and emulation mode.

Background technology

(pulse width modulation, PWM) power inverter is widely used in AC/DC power supply, inverter, motor-driven, generation of electricity by new energy, AC/DC transmission of electricity constant power transformation system in pulse-width modulation.The pwm power converter is made of MOSFET, IGBT, IGCT or GTO constant power switching device and auxiliary circuit, if improper use, power switch very easily damages, and therefore in research and debug phase, people generally adopt emulation technology to verify and test the service behaviour of control strategy or system.

Emulation is divided into physics (material object) emulation and Computer Simulation, and wherein, physics (material object) emulation is physics (material object) the model research experiment according to the physical property tectonic system of real system, visual pattern, and fidelity height, but cost height, the cycle is long.Computer Simulation is divided into pure software emulation and real-time simulation again, and wherein software emulation does not use any parts of real system, and its simulation time is also irrelevant with the real time of system; Real-time simulation adopts multinuclear high-speed computer or FPGA to realize the parallel computation processing, and its simulation run time is consistent with the real time, can realize hardware (Hardware-in-Loop) real-time simulation and control in the loop.Computer Simulation is always as a kind of necessary tool, reduce the loss, the reduction of expenditure spending, shorten the construction cycle, aspect such as improve the quality of products plays an important role; Computer real-time emulation can be carried out hardware-in-the-loop simulation, and namely system's part adopts computer real-time emulation, and another part is introduced the emulation loop in mode in kind, can greatly improve the design efficiency of control system.At present, this system or method for designing abroad colleges and universities and laboratory are generally adopted.At present, popular digital real-time simulator has RT-lab, RTDS, dSPACE etc. in the world.

But, because existing digital real-time simulator need adopt multinuclear high-speed computer or FPGA to cooperate real time algorithm to realize, the system configuration complexity, price very expensive (generally arriving millions of yuans at hundreds of thousands), and its simulation step length is owing to be subjected to the restriction of computational speed and D-A converter switching rate can not accomplish very little, particularly when emulation pwm power converter, also there are certain gap in its simulation accuracy and real system.

Summary of the invention

Purpose of the present invention is exactly to provide a kind of pwm power converter analog simulation circuit and emulation mode in order to address the above problem, it have the simulation accuracy height, cheap, be easy to realize, and do not have advantages such as simulation step length is limited.

To achieve these goals, the present invention adopts following technical scheme:

A kind of pwm power converter analog simulation circuit, comprise first electronic analog switch circuit and second electronic analog switch circuit, the output of described first electronic analog switch circuit is connected with the input of first adder, the output of described first adder is connected with the input of one order inertia circuit, the output of described one order inertia circuit is connected with the input of second electronic analog switch circuit and the input of second adder respectively, the output of the described second electronic switch analog circuit is connected with second adder, the output of described second adder is connected with the proportional integral circuit, described proportional integral circuit is connected with the input of the 3rd adder, and the output passing ratio amplifying circuit of described the 3rd adder connects the input of second adder; The input of the 3rd adder also with directly/output of ac voltage signal generator is connected, described straight/output of ac voltage signal generator also is connected with second electronic analog switch circuit; The output of the 3rd adder also is connected with the input of first electronic analog switch circuit, and the input of described first electronic analog switch circuit and second electronic analog switch circuit all is connected with external control signal.

A kind of pwm power converter analog simulation method, concrete steps are:

Step 1: set up the terminal voltage of each device in the described pwm power converter, the electrical model of end current relationship, according to Kirchhoff's law, obtain each loop and the voltage of each node in the described pwm power converter, the electrical model of current relationship;

Step 2: according to the voltage transformation coefficient, the voltage transformation in the described electrical model is become corresponding low-voltage conditioned signal, according to current-ratio, the current transformation in the described electrical model is become corresponding low-voltage conditioned signal; Described low-voltage conditioned signal refers to the voltage signal in known electronic analog switch circuit and operation amplifier circuit normal working voltage scope;

Step 3: adopt first electronic analog switch circuit and second electronic analog switch circuit to realize that the switch function in the described electrical model concerns, namely adopt two semi-bridge type power switch circuits in the electronic analog swtichs simulation pwm power converter; The employing operation amplifier circuit is realized addition, proportionality coefficient, index, the integral relation in the described electrical model.

Electrical model in the described step 1 refers to the terminal voltage with device, the input-output characteristic that the end current relationship is described described device.

The scheme of described step 3 is:

Adopt operation amplifier circuit to realize the one order inertia circuit function, the reactor in the simulation pwm power converter;

Adopt operation amplifier circuit to realize the proportional integral circuit function, the capacitor in the simulation pwm power converter;

Adopt operation amplifier circuit to realize ratio amplifying circuit function, the resistor in the simulation pwm power converter;

Adopt voltage source and current source in straight/ac voltage signal generator simulation pwm power converter.

The concrete steps of described step 3 are:

(1) each the semi-bridge type power switch circuit in the pwm power converter is realized analog simulation by described first electronic analog switch circuit, second electronic analog switch circuit, wherein the voltage relationship in the semi-bridge type power switch circuit and current relationship carry out analog simulation by first electronic analog switch circuit, second electronic analog switch circuit respectively, and described first electronic analog switch circuit, second electronic analog switch circuit are controlled synchronously by outside pwm switching signal S; The signal input voltage of described first electronic analog switch circuit is pressed into direct proportion with the on high-tension side respective electrical ordinary telegram of described semi-bridge type power switch circuit respectively, and the signal output voltage of described first electronic analog switch circuit and described semi-bridge type power switch circuit low-pressure side output end voltage are in direct ratio; The low-pressure side output end current of the signal input voltage of described second electronic analog switch circuit and described semi-bridge type power switch circuit is in direct ratio, and the signal output voltage of described second electronic analog switch circuit is in direct ratio with the electric current that flows through the on high-tension side corresponding level node of described semi-bridge type power switch circuit respectively.

(2) voltage/current of each the described reactor in pwm power converter relation realizes analog simulation by a described one order inertia circuit, wherein the electric current of the signal output voltage of one order inertia circuit and described reactor is in direct ratio, the signal input voltage of described one order inertia circuit and the both end voltage of described reactor are in direct ratio, and are calculated according to Kirchhoff's second law by loop, the described reactor place corresponding low-voltage conditioned signal of each element voltage.

(3) voltage/current of each the described capacitor in pwm power converter relation realizes analog simulation by a described proportional integral circuit, its capacitor initial voltage is simulated by voltage source, wherein the both end voltage of the signal output voltage of proportional integral circuit and described capacitor is in direct ratio, the signal input voltage of described proportional integral circuit and the electric current of described capacitor are in direct ratio, and the corresponding low-voltage conditioned signal of each branch current that is connected on the same node by described capacitor calculates according to Kirchhoff's current law (KCL).

(4) voltage/current of each the described resistor in pwm power converter relation realizes analog simulation by a described ratio amplifying circuit, wherein the both end voltage of the signal input voltage of ratio amplifying circuit and described resistor is in direct ratio, and the signal output voltage of ratio amplifying circuit and the electric current of described resistor are in direct ratio.

(5) several voltage sources in the described pwm power converter and current source by described straight/the ac voltage signal generator circuit realizes analog simulation, wherein said straight/several signal output voltages of ac voltage signal generator circuit are in direct ratio with corresponding described several voltage source voltage and current source electric currents respectively.

Beneficial effect of the present invention:

(1) the present invention adopts electronic analog switch circuit and operation amplifier circuit analog simulation pwm power converter, can simulate and obtain the low voltage signal identical with the relevant analog simulation circuit signal of voltage and current signal in the actual pwm power converter, can realize the semi-physical real-time simulation of pwm power converter, the damage of pwm power switch in can effectively avoiding testing.Reducing the loss, reduction of expenditure spending, shortening aspects such as construction cycle and have great advantage.

(2) existing relatively expensive digital real-time simulator, the present invention does not need high speed calculation element and softwares such as computer, the real-time simulation that only adopt simply, electronic analog swtich and operational amplifier can be realized the pwm power converter cheaply.

(3) circuit of the present invention and method adopt analog circuit to realize the real-time simulation of pwm power converter, do not have simulation step length and the limited problem of D-A converter switching rate in the existing digital real-time simulator, so simulation result are more true to nature, and precision is higher.

Description of drawings

Fig. 1 is a kind of semi-bridge type power switch circuit;

Fig. 1 a is the equivalent electric circuit of half-bridge N level converter;

Fig. 1 b is a kind of actual reactor equivalent electric circuit;

Fig. 1 c is a kind of true capacitor equivalent electric circuit;

Fig. 1 d is a kind of resistor circuit;

Fig. 1 e is a kind of voltage source circuit;

Fig. 2 is the analog simulation circuit that the present invention is directed to Fig. 1;

Fig. 2 a is the analog simulation circuit that the present invention is directed to Fig. 1 a;

Fig. 2 b is a kind of reactor analog simulation circuit that the present invention is directed to Fig. 1 b;

Fig. 2 c is a kind of capacitor simulation artificial circuit that the present invention is directed to Fig. 1 c;

Fig. 2 d is a kind of resistor analog simulation circuit that the present invention is directed to Fig. 1 d;

Fig. 2 e is a kind of voltage source analog simulation circuit that the present invention is directed to Fig. 1 e;

Fig. 2 f is the enforcement circuit that the present invention is directed to a kind of one order inertia circuit of Fig. 2 b;

Fig. 2 g is the enforcement circuit that the present invention is directed to a kind of proportional integral circuit of Fig. 2 c;

Fig. 2 h is the enforcement circuit that the present invention is directed to a kind of ratio amplifying circuit of Fig. 2 d;

Fig. 3 is the basic analog simulation circuit of pwm power converter of the present invention;

Fig. 4 is a kind of half-bridge voltage-dropping type pwm converter topological structure;

Fig. 4 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 4;

Fig. 5 is a kind of half-bridge booster type pwm converter topological structure;

Fig. 5 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 5;

Fig. 6 is the two-way pwm converter topological structure of a kind of half-bridge;

Fig. 6 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 6;

Fig. 7 is a kind of single-phase H bridge voltage-dropping type pwm converter topological structure;

Fig. 7 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 7;

Fig. 7 b is the another kind of analog simulation circuit embodiments that the present invention is directed to Fig. 7;

Fig. 8 is a kind of single-phase H bridge booster type pwm converter topological structure;

Fig. 8 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 8;

Fig. 8 b is the another kind of analog simulation circuit embodiments that the present invention is directed to Fig. 8;

Fig. 9 is the two-way pwm converter topological structure of a kind of single-phase H bridge;

Fig. 9 a is a kind of analog simulation circuit embodiments that the present invention is directed to Fig. 9;

Fig. 9 b is the another kind of analog simulation circuit embodiments that the present invention is directed to Fig. 9;

Figure 10 is a kind of three-phase voltage increasing type pwm converter topological structure;

Figure 10 a is a kind of analog simulation circuit embodiments that the present invention is directed to Figure 10;

Figure 11 is an a kind of phase main circuit topological structure of modular multilevel converter;

Figure 11 a is the main circuit topological structure of submodule in a kind of modular multilevel converter;

Figure 11 b is a kind of analog simulation circuit embodiments that the present invention is directed to submodule among Figure 11;

Figure 11 c is a kind of analog simulation circuit embodiments that the present invention is directed to Figure 11;

Figure 12 is an a kind of phase main circuit topological structure of diode clamp formula three-level converter;

Figure 12 a is the equivalent circuit diagram of Figure 12;

Figure 12 b is a kind of analog simulation circuit embodiments that the present invention is directed to Figure 12;

Figure 13 is a kind of real application systems structure chart of pwm power converter;

The semi-physical real-time simulation system of Figure 13 a for adopting the inventive method to constitute.

Wherein, 1, the half-bridge power switching circuit, 1Tp, last power switch pipe, 1Tn, following power switch pipe, 2,2p, the on high-tension side first level terminal, 3,3n, the on high-tension side second level terminal, 4,4a, 4b, 4c and 4m, the low-pressure side terminal, 5,5a, 5b, 5c and 5S, power switch PWM control terminal, 6,6a, 6b, 6c, 6p, 6n, reactor, 7, capacitor, 8, resistor, 9,9a, 9b and 9c, voltage source, 10,10a, 10b and 10c, electronic analog switch circuit, 10-1, first electronic analog switch circuit and 10-2, second electronic analog switch circuit, 11, operational amplifier, 12,12a, 12b and 12c, the one order inertia circuit, 13, the proportional integral circuit, 14,14a, 14b and 14c, inverter, 15, the ratio amplifying circuit, 16, directly/the ac voltage signal generator circuit, 17,17a and 17b, the system simulation artificial circuit, 18,18L, 18C, 18La, 18Lb, 18a and 18b, adder circuit, 19, modular multilevel converter submodule, 20, modular multilevel converter positive direct-current bus terminal, 21, the modular multilevel converter is born the dc bus terminal, 22, modular multilevel converter intermediate terminal, 23, the analog simulation circuit of modular multilevel converter submodule, 24, diode clamp formula three-level converter intermediate dc level terminal, 25, the pwm power inverter main circuit, 26, pwm power converter voltage current detecting modulate circuit and drive circuit, 27, pwm power converter main system, 28, the pwm power converter control circuit.

Embodiment

The invention will be further described below in conjunction with accompanying drawing and embodiment.

Fig. 1 has provided the equivalent electric circuit of two level half-bridge pwm power inverter main circuit switches, be in series by last power switch pipe 1Tp and following power switch pipe 1Tn, the upper end 1c1 of last power switch pipe 1Tp meets the on high-tension side first level terminal 2p of described pwm power converter, the lower end 1e2 of following power switch pipe 1Tn meets the on high-tension side second level terminal 3n of described pwm power converter, the lower end 2e1 of last power switch pipe 1Tp links to each other with the upper end 1c2 of following power switch pipe 1Tn and draws described pwm power converter low-pressure side terminal 4m, pwm control signal is from power switch PWM control terminal 5S, when S is logical one, power switch pipe 1Tp conducting in the control and down power switch pipe 1Tn end, low-pressure side terminal 4m and the on high-tension side first level terminal 2p connect, otherwise, when S is logical zero, power switch pipe 1Tp ends and power switch pipe 1Tn conducting down in the control, and low-pressure side terminal 4m and the on high-tension side second level terminal 3n connect.

Fig. 1 a has provided the equivalent electric circuit of N level half-bridge pwm power inverter main circuit switch, wherein said N level power switching circuit equivalence is N channel switch circuit, on high-tension side the 1st level of described N level power switching circuit, the 2nd level ... with N passage input terminal of the corresponding described N channel switch of N level input terminal difference, the low-pressure side terminal 4m of the public output of the corresponding described N channel switch of described N level power switching circuit low-pressure side lead-out terminal.Pwm control signal is from power switch PWM control terminal 5S, by power switch PWM control terminal 5S control half-bridge power switching circuit 1, make low-pressure side terminal 4m and on high-tension side the 1st, 2 ..., the N level is connected.

Fig. 1 b～Fig. 1 e has provided device reactor 6 commonly used, capacitor 7, resistor 8 and the voltage source 9 of pwm power converter respectively.Among the figure, reactor 6 is by ideal inductance L series connection with it equivalent resistance r _LThe series connection equivalence, capacitor 7 is by ideal capacitance C series connection with it equivalent resistance r _CThe series connection equivalence.

Fig. 1 pwm power converter circuit is carried out modeling, set up the terminal voltage of its each device, the electrical model of end current relationship, specific as follows:

At Fig. 1, when the pwm control signal of power switch PWM control terminal 5S is logical one, last power switch pipe 1Tp conducting is connected the on high-tension side first level terminal 2p and low-pressure side terminal 4m, and this moment, circuit voltage, current relationship were

u _m＝u _p (1)

In the formula, u _mThe voltage to earth of expression low-pressure side terminal 4m, u _pThe voltage to earth of representing the on high-tension side first level terminal 2p.

$\left\{\begin{array}{c}{i}_{\mathrm{dp}}=i_m\\ i_{\mathrm{dn}}=0\end{array}\right.---\left(2\right)$

In the formula, i _mExpression flows into the electric current of low-pressure side terminal 4m, i _DpThe outflow electric current of representing the on high-tension side first level terminal 2p, i _DnThe outflow electric current of representing the on high-tension side second level terminal 3n.

When the pwm control signal of power switch PWM control terminal 5S is logical zero, following power switch pipe 1Tn conducting is connected the on high-tension side second level terminal 3n and low-pressure side terminal 4m, and this moment, circuit voltage, current relationship were:

u _m=u _n (3)

In the formula, u _nThe voltage to earth of representing the on high-tension side second level terminal 3n.

$\left\{\begin{array}{c}{i}_{\mathrm{dp}}=0\\ i_{\mathrm{dn}}=i_m\end{array}\right.---\left(4\right)$

At Fig. 1 b, reactor 6 voltages, electric current satisfy the equation that is listed in the s territory down

$i_L\left(s\right)=\frac{1}{\mathrm{Ls}+r_L}{u}_L\left(s\right)---\left(5\right)$

In the formula, u _LAnd i _LRepresent both end voltage and the electric current of reactor 6 respectively, L represents the inductance value of reactor 6, r _LThe equivalent series resistance of expression reactor 6.

For Fig. 1 c, capacitor 7 voltages, electric current satisfy the equation that is listed in the s territory down

$u_C\left(s\right)=(r_C+\frac{1}{\mathrm{Cs}})i_C\left(s\right)---\left(6\right)$

In the formula, u _CAnd i _CRepresent both end voltage and the electric current of capacitor 7 respectively, C represents the capacitance of capacitor 7, r _CThe equivalent series resistance of expression capacitor 7.The initial voltage U that does not comprise capacitor 7 in the formula (6) _C0

For Fig. 1 d, resistor 8 voltages, electric current establish an equation under satisfying

$i_R=\frac{1}{R}{u}_R---\left(7\right)$

In the formula, u _RAnd i _RRepresent both end voltage and the electric current of resistor 8 respectively, R represents the resistance value of resistor 8.

Voltage in the above-mentioned formula (1) to (7), electric current are transformed into corresponding low-voltage conditioned signal according to voltage transformation coefficient, current-ratio respectively, use

Expression, voltage, the magnitude of current in the subscript x expression (1) to (7) wherein, subscript c represents the low-voltage conditioned signal of electric weight x.Described low-voltage conditioned signal refers to the voltage signal in known electronic analog switch circuit 10 and operational amplifier 11 normal range of operation.

For simply, establishing the voltage transformation coefficient is K _u, establishing current-ratio is K _i, namely In the formula

The low-voltage conditioned signal of expression voltage u, The low-voltage conditioned signal of expression magnitude of current i.Substitution formula (1) to (7) can get:

Formula (a 1) conversion accepted way of doing sth (8)

$u_{u_m}^c=u_{u_p}^c---\left(8\right)$

Formula (a 2) conversion accepted way of doing sth (9)

$\left\{\begin{array}{c}{u}_{i_{\mathrm{dp}}}^c=u_{i_m}^c\\ u_{i_{\mathrm{dn}}}^c=0\end{array}\right.---\left(9\right)$

Formula (a 3) conversion accepted way of doing sth (10)

$u_{u_m}^c=u_{u_n}^c---\left(10\right)$

Formula (a 4) conversion accepted way of doing sth (11)

$\left\{\begin{array}{c}{u}_{i_{\mathrm{dp}}}^c=0\\ u_{i_{\mathrm{dn}}}^c=u_{i_m}^c\end{array}\right.---\left(11\right)$

Formula (a 5) conversion accepted way of doing sth (12)

$u_{i_L}^c\left(s\right)=\frac{K_{\mathrm{<figure-callout\; id="1"\; label="i\; K\; u"\; filenames="HDA00003371912300012.png,HDA00003371912300022.png"\; state="\{\{state\}\}">i</figure-callout>}}}{K_u}\frac{1}{\mathrm{Ls}+r_L}{u}_{u_L}^c\left(s\right)---\left(12\right)$

Formula (a 6) conversion accepted way of doing sth (13)

$u_{u_C}^c\left(s\right)=\frac{K_u}{K_i}(r_C+\frac{1}{\mathrm{Cs}})u_{i_C}^c\left(s\right)---\left(13\right)$

Do not comprise capacitor 7 initial voltages in the formula (13)

Formula (a 7) conversion accepted way of doing sth (14)

$u_{i_R}^c=\frac{K_i}{K_u}\frac{1}{R}{u}_{u_R}^c---\left(14\right)$

Realize the switch function relation of voltage, electric current in the above-mentioned formula (8) to (11) with the electronic analog switch circuit simulation, two electronic analog switch circuits 10 as shown in Figure 2, wherein, the first electronic analog switch circuit 10-1 and the second electronic analog switch circuit 10-2 are controlled synchronously by outside pwm switching signal S.First input voltage signal of the first electronic analog switch circuit 10-1

With the described on high-tension side first level voltage u _pIn direct ratio, have

Second input voltage signal of the first electronic analog switch circuit 10-1

With the described on high-tension side second level voltage u _nIn direct ratio, have The output voltage signal of the first electronic analog switch circuit 10-1

Low-pressure side terminal 4m voltage u with described half-bridge power switching circuit 1 _mIn direct ratio, have

The input voltage signal of the second electronic analog switch circuit 10-2

Low-pressure side terminal 4m current i with described half-bridge power switching circuit 1 _mIn direct ratio, have

First output voltage signal of the described second electronic analog switch circuit 10-2

With the described upper end 1c1 current i that goes up power switch pipe 1Tp _DpIn direct ratio, have Second output voltage signal of the described second electronic analog switch circuit 10-2

With the described lower end 1e2 current i of power switch pipe 1Tn down _DnIn direct ratio, have

In like manner, the N channel electron analog switch shown in Fig. 2 a, the first electronic analog switch circuit 10-1 and the second electronic analog switch circuit 10-2 have been realized the analog simulation of the N level power switch equivalent electric circuit shown in Fig. 1 a respectively.The N of first an analog switching circuit 10-1 signal input voltage wherein

Respectively with described N level power switch equivalent electric circuit in N level voltage u _D1, u _D2..., u _DNIn direct ratio, the signal output voltage of the described first analog switching circuit 10-1

Public output m voltage u with described N level power switch equivalent electric circuit _mIn direct ratio.The signal input voltage of the described second analog switching circuit 10-2

Public output current i with described N level power switch equivalent electric circuit _mIn direct ratio, the N of described second an analog switching circuit 10-2 signal output voltage

Respectively with described N level power switch equivalent electric circuit in N level node current i _D1, i _D2..., i _DNIn direct ratio.

The functional relation of the one order inertia circuit 12 realization formulas (12) that constitute with operational amplifier 11 is as the analog simulation circuit of the reactor 6 among Fig. 2 b.

The functional relation of the proportional integral circuit 13 realization formulas (13) that constitute with operational amplifier 11 is as the analog simulation circuit of the capacitor 7 among Fig. 2 c.

The functional relation of the ratio amplifying circuit 15 realization formulas (14) that constitute with operational amplifier 11 is as the ratio amplifying circuit 15 among Fig. 2 d.

With directly/ac voltage signal generator circuit 16 realizes the analog simulation of voltage source 9 among Fig. 1 e, wherein

Here e represents the both end voltage of voltage source 9.

Fig. 3 has provided the basic analog simulation circuit of a kind of pwm power converter of the present invention, comprises electronic analog switch circuit 10, adder circuit 18, adder circuit 18L, adder circuit 18C, one order inertia circuit 12, proportional integral circuit 13, ratio amplifying circuit 15, straight/ac voltage signal generator circuit 16 etc.Among the figure, the first electronic analog switch circuit 10-1 is used for the voltage relationship of the power switch circuit of analog simulation pwm power converter, the second electronic analog switch circuit 10-2 is used for the current relationship of the power switch circuit of analog simulation pwm power converter, one order inertia circuit 12 is used for electric current and the voltage relationship of analog simulation reactor, proportional integral circuit 13 is used for voltage and the current relationship of analog simulation capacitor, ratio amplifying circuit 15 is used for voltage and the current relationship of analog simulation resistor, adder circuit 18L, 18C and 18 is used for the analog simulation add operation, and straight/ac voltage signal generator circuit 16 is used for the voltage signal of analog simulation voltage source.

Among Fig. 3, the input of the first electronic analog switch circuit 10-1

Be described pwm power converter high side voltage u _dCorresponding low-voltage conditioned signal, the output of the first electronic analog switch circuit 10-1

Be described pwm power converter low-pressure side voltage u _mCorresponding low-voltage conditioned signal; The input of the second electronic analog switch circuit 10-2

Be described pwm power converter low-pressure side current i _mCorresponding low-voltage conditioned signal, the output of the second electronic analog switch circuit 10-2

Be described pwm power converter high voltage side current i _dCorresponding low-voltage conditioned signal; The input of one order inertia circuit 12

Be described reactor voltage u _LCorresponding low-voltage conditioned signal, the output of one order inertia circuit 12

Be described reactor 6 current i _LCorresponding low-voltage conditioned signal; The input of proportional integral circuit 13

Be described condenser current i _CCorresponding low-voltage conditioned signal, the output of proportional integral circuit 13

Be described capacitor 7 voltage u _CCorresponding low-voltage conditioned signal; The input of ratio amplifying circuit 15

Be described resistor 8 voltage u _RCorresponding low-voltage conditioned signal, the output of ratio amplifying circuit 15

Be described resistor 8 current i _RCorresponding low-voltage conditioned signal; Adder circuit 18L realizes the input signal of one order inertia circuit 12 Calculating, the input signal of adder circuit 18L is voltage (the voltage u of each element of loop, described reactor 6 place _LExcept) corresponding low-voltage conditioned signal; Adder circuit 18C realizes the input signal of proportional integral circuit 13

Calculating, the input signal of adder circuit 18C is 7 electric current (current i together with each branch road of node of described capacitor _CExcept) corresponding low-voltage conditioned signal; Adder circuit 18 is realized the capacitance voltage initial value

With condenser voltage Read group total; Defeated people's signal of the second electronic analog swtich 10-2 $u_{i_m}^c=-u_{i_L}^c.$

Embodiment 1:

Fig. 2 f has provided a kind of embodiment that has inverter functionality of one order inertia circuit diagram 2b, and among the figure, C0 is that electric capacity, R0 and R1 are resistance.Fig. 2 g has provided a kind of embodiment that has inverter functionality of proportional integral circuit diagram 2c, and among the figure, C1 is that electric capacity, R2 and R3 are resistance.Fig. 2 h has provided a kind of embodiment that has inverter functionality of ratio amplification circuit diagram 2d, and among the figure, R5 and R6 are resistance.

As the internal resistance r that ignores reactor 6 _L(be r _L=0) time, the resistance R 1 in Fig. 2 f one order inertia circuit 12 is infinitely great (open circuit), and one order inertia circuit 12 is reduced to integrating circuit at this moment.

When ignoring capacitor 7 equivalent series resistance r _C(be r _C=0) time, the resistance R 3=0(short circuit in Fig. 2 g proportional integral circuit 13), proportional integral circuit 13 is reduced to integrating circuit at this moment.

Embodiment 2:

Fig. 4 provides a kind of half-bridge voltage-dropping type pwm converter topological structure, wherein, the half-bridge power switch low-pressure side terminal 4 of half-bridge power switching circuit 1 is connected with an end of a reactor 6, the other end of reactor 6 connects capacitor 7 and resistor 8, the on high-tension side first level terminal 2 of half-bridge power switching circuit 1 is connected voltage source 9 with the on high-tension side second level terminal 3, and the voltage to earth of the on high-tension side first level terminal 2 and the on high-tension side second level terminal 3 is u _pAnd u _n, u is arranged _p-u _n=E _dE wherein _dThe both end voltage of expression voltage source 9 is DC quantity, the both end voltage u of resistor 8 _oExpression.

As shown in Figure 4, the both end voltage of reactor 6 is u _L=u _m-u _o, its corresponding low-voltage conditioned signal is closed and is

$u_{u_L}^c=u_{u_m}^c-u_{u_o}^c---\left(15\right)$

The electric current of resistor 8 is i _R=u _o/ R, its corresponding low-voltage conditioned signal is closed and is

$u_{i_R}^c=\frac{K_i}{K_{u}R}{u}_{u_o}^c---\left(16\right)$

The electric current of capacitor 7 is i _C=i _L-i _R, its corresponding low-voltage conditioned signal is closed and is

$u_{i_C}^c=u_{i_L}^c-u_{i_R}^c---\left(17\right)$

Therefore, with reference to figure 2, Fig. 2 b, Fig. 2 c, Fig. 2 d, can obtain analog simulation circuit to Fig. 4 shown in Fig. 4 a, among the figure, the control signal of electronic analog switch circuit 10 is S, adder circuit 18L has realized formula (15), adder circuit 18C has realized formula (17), one order inertia circuit 12 has been realized the simulation of the current signal of reactor 6, proportional integral circuit 13 has been realized the simulation of the voltage signal of capacitor 7, ratio amplifying circuit 15 has been realized the simulation of resistor 8 electric currents that formula (16) is expressed, and straight/alternating-voltage generator is realized the simulation of on high-tension side the first/the second level voltage.When the on high-tension side second level terminal, 3 ground connection, $u_{u_p}^c=u_{E_d}^c,u_{u_n}^c=0;$ When the intermediate level ground connection of voltage source 9, $u_{u_p}^c=u_{E_d}^c/2,u_{u_n}^c=-u_{E_d}^c/2.$ Resistor 8 can substitute with current source, and at this moment, ratio amplifying circuit 15 can be substituted by a voltage signal generator among Fig. 4 a.

Embodiment 3:

Fig. 5 provides a kind of half-bridge booster type pwm converter topological structure, wherein, half-bridge power switching circuit 1 low-pressure side terminal 4 is connected with an end of reactor 6, the other end of reactor 6 connects voltage source 9, and the on high-tension side first level terminal 2 of half-bridge power switching circuit 1 and the on high-tension side second level terminal 3 also connect capacitor 7 and resistor 8.Wherein, the both end voltage e of voltage source 9 _sExpression is DC quantity, of ac.

As shown in Figure 5, the both end voltage of reactor 6 is u _L=u _m-e _s, its corresponding low-voltage conditioned signal is closed and is

$u_{u_L}^c=u_{u_m}^c-u_{e_s}^c---\left(18\right)$

The electric current of resistor 8 is i _R=u _d/ R, its corresponding low-voltage conditioned signal is closed and is

$u_{i_R}^c=\frac{K_i}{K_{u}R}{u}_{u_d}^c---\left(19\right)$

The electric current of capacitor 7 is i _C=i _d-i _R, its corresponding low-voltage conditioned signal is closed and is

$u_{i_C}^c=u_{i_d}^c-u_{i_R}^c---\left(20\right)$

Among Fig. 5, DC bus-bar voltage u _d=u _C+ U _C0, its corresponding low-voltage conditioned signal is closed and is

$u_{u_d}^c=u_{u_C}^c+u_{U_{C0}}^c---\left(21\right)$

In the formula, U _C0The initial voltage of expression capacitor 7.

Therefore, can obtain analog simulation circuit to Fig. 5 shown in Fig. 5 a, among the figure, the control signal of electronic analog switch circuit 10 is S, adder circuit 18L has realized formula (18), adder circuit 18C has realized formula (20), adder circuit 18 has been realized formula (21), one order inertia circuit 12 has been realized the simulation of the current signal of reactor 6, proportional integral circuit 13 has been realized the simulation of the voltage signal of capacitor 7, ratio amplifying circuit 15 has been realized formula (19) ratio function, and straight/alternating-voltage generator is realized voltage source signal

With

Simulation.Resistor 8 can substitute with current source, and at this moment, ratio amplifying circuit 15 can be substituted by a voltage signal generator in Fig. 5 a system simulation artificial circuit 17.

Embodiment 4:

Fig. 6 provides the two-way pwm converter topological structure of a kind of half-bridge, wherein, the low-pressure side terminal 4 of half-bridge power switching circuit 1 is connected with an end of reactor 6, the other end of reactor 6 connects voltage source 9a, and the on high-tension side first level terminal 2 of half-bridge power switching circuit 1 and the high-pressure side second level terminal 3 also connect another voltage source 9.Compare with embodiment 3, capacitor 7 and the resistor 8 of Fig. 5 are replaced with voltage source 9, therefore after analog circuit proportional integral circuit 13, adder circuit 18 and the ratio amplifying circuit 15 of relevant capacitor 7 and resistor 8 among Fig. 5 a being deleted, at the analog simulation circuit of Fig. 6 shown in Fig. 6 a.

Embodiment 5:

Fig. 7 provides a kind of single-phase H bridge voltage-dropping type pwm converter topological structure.Compare with Fig. 3 of embodiment 1, Fig. 7 is H bridge switch circuit.Wherein, a phase half-bridge power switching circuit low-pressure side terminal 4a is connected with an end of a reactor 6, the other end shunt capacitor 7 of reactor 6 and resistor 8,4b is in parallel with the other end of capacitor 7 and resistor 8 for b phase half-bridge power switching circuit low-pressure side terminal, and the on high-tension side first level terminal 2 of two-phase power switch circuit is connected voltage source 9 with the on high-tension side second level terminal 3.

As shown in Figure 7, the both end voltage of reactor 6 is u _L=u _Ma-u _Mb-u _o, its corresponding low-voltage conditioned signal is closed and is

$u_{u_L}^c=u_{u_{\mathrm{ma}}}^c-u_{u_{\mathrm{mb}}}^c-u_{u_o}^c---\left(22\right)$

In the formula, u _MaThe voltage to earth of expression a phase half-bridge power switching circuit low-pressure side terminal 4a, u _MbThe voltage to earth of expression b phase half-bridge power switching circuit low-pressure side terminal 4b, u _oThe both end voltage of expression resistor 8.

It is referring to formula (16) and (17) that the corresponding low-voltage conditioned signal of the electric current of the electric current of resistor 8 and capacitor 7 is closed.

Therefore, can obtain analog simulation circuit to Fig. 7 shown in Fig. 7 a, among the figure, a and b mutually power switch circuit respectively by the first electronic analog switch circuit 10a and second electronic analog switch circuit 10b simulation, their control signal is respectively Sa and Sb, adder circuit 18L has realized formula (22), and one order inertia circuit 12 has been realized the simulation of reactor 6 current signals.Other circuit is identical with Fig. 5 a.

When being operated in the bipolarity pwm pattern, namely pwm switching signal Sa is opposite with the Sb logic, and two electronic analog switch circuit 10a and 10b among this moment Fig. 7 a can be reduced to an electronic analog swtich, shown in Fig. 7 b.

Embodiment 6:

Fig. 8 provides a kind of single-phase H bridge booster type pwm converter topological structure.Compare with Fig. 5 of embodiment 3, Fig. 8 is H bridge switch circuit, wherein, a phase half-bridge power switching circuit low-pressure side terminal 4a is connected with an end of a reactor 6, the other end of reactor 6 connects voltage source 9, b phase half-bridge power switching circuit low-pressure side terminal 4b is connected with voltage source 9 other ends, and the on high-tension side first level terminal 2 of two-phase power switch circuit and the on high-tension side second level terminal 3 also connect capacitor 7 and resistor 8.

As shown in Figure 8, the both end voltage of reactor 6 is u _L=u _Ma-u _Mb-e _s, its corresponding low-voltage conditioned signal is closed and is

$u_{u_L}^c=u_{u_{\mathrm{ma}}}^c-u_{u_{\mathrm{mb}}}^c-u_{e_s}^c---\left(23\right)$

In the formula, u _MaThe voltage to earth of expression a phase half-bridge power switching circuit low-pressure side terminal 4a, u _MbThe voltage to earth of expression b phase half-bridge power switching circuit low-pressure side terminal 4b, e _sThe both end voltage of expression voltage source 9.

Among Fig. 8, dc bus current i _dEqual two-phase power switch current i _Da, i _DbSum, i.e. i _d=i _Da+ i _Db, its corresponding low-voltage conditioned signal is closed and is

$u_{i_d}^c=u_{i_{\mathrm{da}}}^c+u_{i_{\mathrm{db}}}^c---\left(24\right)$

The corresponding low-voltage conditioned signal relation of the electric current of the electric current of resistor 8 and capacitor 7 is referring to formula (19) and (20).

Therefore, can obtain analog simulation circuit to Fig. 8 shown in Fig. 8 a, among the figure, a and b mutually power switch circuit respectively by electronic analog switch circuit 10a and 10b simulation, their control signal is respectively Sa and Sb, and adder circuit 18L has realized formula (23), and adder circuit 18C has realized formula (20) and (24), one order inertia circuit 12 has been realized the simulation of reactor 6 current signals, and proportional integral circuit 13 has been realized the simulation of capacitor 7 voltage signals.Other circuit is identical with Fig. 5 a.

When being operated in the bipolarity pwm pattern, namely pwm switching signal Sa is opposite with the Sb logic, and two electronic analog switch circuit 10a and 10b among this moment Fig. 8 a can be reduced to an electronic analog swtich, shown in Fig. 8 b.

Embodiment 7:

Fig. 9 provides the two-way pwm converter topological structure of a kind of single-phase H bridge.Compare with Fig. 6 of embodiment 4, Fig. 9 is H bridge switch circuit, wherein, a phase half-bridge power switching circuit low-pressure side terminal 4a is connected with an end of a reactor 6, the other end of reactor 6 connects voltage source 9, b phase half-bridge power switching circuit low-pressure side terminal 4b is connected with voltage source 9 other ends, and the on high-tension side first level terminal 2 of two-phase half-bridge power switching circuit 1 and the on high-tension side second level terminal 3 also meet another voltage source 9a.

Compare with embodiment 6, Fig. 9 replaces with voltage source 9a with the capacitor 7 of Fig. 8 and resistor 8, therefore after proportional integral circuit 13, adder circuit 18 and the ratio amplifying circuit 15 of relevant capacitor 7 and resistor 8 among Fig. 8 a being deleted, at the analog simulation circuit of Fig. 9 shown in Fig. 9 a.

When being operated in the bipolarity pwm pattern, namely pwm switching signal Sa is opposite with the Sb logic, and two electronic analog switch circuit 10a and 10b among this moment Fig. 9 a can be reduced to an electronic analog swtich, shown in Fig. 9 b.

Embodiment 8:

Figure 10 provides a kind of three-phase voltage increasing type pwm converter topological structure, among the figure, a phase half-bridge power switching circuit low-pressure side terminal 4a is connected with the end of a reactor 6a, the other end of reactor 6a connects voltage source 9a, b phase half-bridge power switching circuit low-pressure side terminal 4b is connected with the end of a reactor 6b, the other end of reactor 6b connects voltage source 9b, c phase half-bridge power switching circuit low-pressure side terminal 4c is connected with the end of a reactor 6c, the other end of reactor 6c connects voltage source 9c, the other end of three voltage sources 9 is connected in parallel, and the on high-tension side first level terminal 2 of half-bridge power switching circuit 1 and the on high-tension side second level terminal 3 also connect capacitor 7 and resistor 8.Wherein, the both end voltage of voltage source 9a, 9b and 9c is used e respectively _Sa, e _SbAnd e _ScExpression, the sub-voltage to earth u of its public connecting end _NExpression.

As shown in Figure 10, the both end voltage of reactor 6a is u _La=u _Ma-e _Sa-u _N, its corresponding low-voltage conditioned signal is closed and is

$u_{u_{\mathrm{La}}}^c=u_{u_{\mathrm{ma}}}^c-u_{e_{\mathrm{sa}}}^c-u_{u_N}^c---\left(25\right)$

In like manner, the corresponding low-voltage conditioned signal of the both end voltage of reactor 6b is closed and is

$u_{u_{\mathrm{Lb}}}^c=u_{u_{\mathrm{mb}}}^c-u_{e_{\mathrm{sb}}}^c-u_{u_N}^c---\left(26\right)$

Reactor 6c electric current can have a and b mutually reactor current calculate i.e. i _Lc=-(i _La+ i _Lb), its corresponding low-voltage conditioned signal is closed and is

$u_{i_{\mathrm{Lc}}}^c=-(u_{i_{\mathrm{La}}}^c+u_{i_{\mathrm{Lb}}}^c)---\left(27\right)$

Can get the three-phase voltage source neutral point voltage is $u_N=\frac{1}{3}(u_{\mathrm{ma}}+u_{\mathrm{mb}}+u_{\mathrm{mc}}-e_{\mathrm{sa}}-e_{\mathrm{sb}}-e_{\mathrm{sc}}),$ Its corresponding low-voltage conditioned signal is closed and is

$u_{u_N}^c=\frac{1}{3}(u_{u_{\mathrm{ma}}}^c+u_{u_{\mathrm{mb}}}^c+u_{u_{\mathrm{mc}}}^c-u_{e_{\mathrm{sa}}}^c-u_{e_{\mathrm{sb}}}^c-u_{e_{\mathrm{sc}}}^c)---\left(28\right)$

Among Figure 10, dc bus current i _dEqual the three-phase power switch current i _Da, i _DbAnd i _DcSum, i.e. i _d=i _Da+ i _Db+ i _Dc, its corresponding low-voltage conditioned signal is closed and is

$u_{i_d}^c=u_{i_{\mathrm{da}}}^c+u_{i_{\mathrm{db}}}^c+u_{i_{\mathrm{dc}}}^c---\left(29\right)$

The corresponding low-voltage conditioned signal relation of the electric current of the electric current of resistor 8 and capacitor 7 is referring to formula (19) and (20).

Therefore, can obtain analog simulation circuit to Figure 10 shown in Figure 10 a, among the figure, a, b and c mutually power switch circuit respectively by electronic analog switch circuit 10a, 10b and 10c simulation, their control signal is respectively Sa, Sb and Sc, adder circuit 18La has realized formula (25), adder circuit 18Lb has realized formula (26), adder circuit 18C has realized formula formula (20) and (29), adder circuit 18 has been realized formula (21), adder circuit 18a has realized formula (28), one order inertia circuit 12a has realized the simulation of reactor 6a current signal, and one order inertia circuit 12b has realized the simulation of reactor 6b current signal simultaneously, and adder circuit 18a has realized formula (27), namely realized the simulation of reactor 6c current signal, proportional integral circuit 13 has been realized the simulation of capacitor 7 voltage signals simultaneously.Other circuit is identical with Fig. 5 a.

Embodiment 9:

Figure 11 provides a kind of uniphase mode blocking multi-level converter topological structure, is divided into/following two brachium pontis, and each is formed each brachium pontis by N submodule SM and a reactor cascade.Among the figure, modular multilevel converter submodule 19 is made up of half-bridge power switching circuit 1, capacitor 7 and resistor 8.The modular multilevel converter intermediate terminal 22 of two reactor 6p and 6n links to each other with a voltage source 9, the half-bridge power switching circuit low-pressure side terminal 4 of last brachium pontis top terminals module is connected with modular multilevel converter positive direct-current bus terminal 20, the on high-tension side second level terminal 3 of following brachium pontis bottom submodule is connected with the negative dc bus terminal 21 of modular multilevel converter, and modular multilevel converter positive direct-current bus terminal 20 links to each other with 9n with two voltage source 9p that are in series with the negative dc bus terminal 21 of modular multilevel converter.Wherein, the both end voltage e of voltage source 9 _sExpression, the both end voltage of voltage source 9p and 9n is all used U _Dc/ 2 expressions, a upper and lower brachium pontis N submodule both end voltage is used u respectively _p, u _nExpression.

As shown in Figure 11, the both end voltage of last brachium pontis reactor 6p is Its corresponding low-voltage conditioned signal is closed and is

$u_{u_{\mathrm{Lp}}}^c=u_{e_s}^c+u_{u_p}^c-\frac{u_{U_{\mathrm{dc}}}^c}{2}---\left(30\right)$

The both end voltage of following brachium pontis reactor 6n is

Its corresponding low-voltage conditioned signal is closed and is

$u_{u_{\mathrm{Ln}}}^c=-u_{e_s}^c+u_{u_n}^c-\frac{u_{U_{\mathrm{dc}}}^c}{2}---\left(31\right)$

Last brachium pontis submodule output voltage sum is

Its corresponding low-voltage conditioned signal is closed and is

$u_{u_p}^c=\underset{j=1}{\overset{N}{\mathrm{\&Sigma;}}}{u}_{u_m}^c\left(p_j\right)---\left(32\right)$

In the formula, u _m(p _j) voltage in the expression between j submodule 19SM of brachium pontis low-pressure side terminal 4 and its on high-tension side second level terminal 3.

Following brachium pontis submodule output voltage sum is

Its corresponding analog simulation circuit signal closes and is

$u_{u_n}^c=\underset{j=1}{\overset{N}{\mathrm{\&Sigma;}}}{u}_{u_m}^c\left(n_j\right)---\left(33\right)$

In the formula, u _m(n _j) the following voltage between j submodule 19SM of brachium pontis low-pressure side terminal 4 and its on high-tension side second level terminal 3 of expression.

Among Figure 11, the current i of voltage source 9 _s=i _Lp-i _Ln, its corresponding analog simulation circuit signal closes and is

$u_{i_s}^c=u_{i_{\mathrm{Lp}}}^c-u_{i_{\mathrm{Ln}}}^c---\left(34\right)$

Therefore, can obtain analog simulation circuit to Figure 11 a modular multilevel converter submodule 19 shown in Figure 11 b, among the figure, the control signal of electronic analog switch circuit 10 is S, adder circuit 18C has realized formula (20), proportional integral circuit 13 has been realized the simulation of capacitor 7 voltage signals, and adder circuit 18 has been realized formula (21), and ratio amplifying circuit 15 has been realized formula (19) ratio function.

The analog simulation circuit 23 of the modular multilevel converter submodule of employing Figure 11 b can obtain the analog simulation circuit of Figure 11 entire circuit, and shown in Figure 11 c, among the figure, system simulation artificial circuit 17a and 17b represent upper and lower brachium pontis analog simulation circuit respectively.N switching signal S (p1), S (p2) are arranged in system simulation artificial circuit 17a ..., the analog simulation circuit 23 of N modular multilevel converter submodule of S (pN) control also produces N voltage

Adder circuit 18a has realized formula (32), and one order inertia circuit 12 has been realized the simulation of formula (30) and reactor 6p current signal simultaneously.N switching signal S (n1), S (n2) are arranged in system simulation artificial circuit 17b ..., the analog simulation circuit 23 of N modular multilevel converter submodule of S (nN) control also produces N voltage

Adder circuit 18b has realized formula (33), and adder circuit 18La has realized formula (30), and adder circuit 18Lb has realized formula (31), and adder circuit 18La has realized formula (30), and one order inertia circuit 12a has realized the simulation of reactor 6n current signal.Adder circuit 18 has been realized the simulation of the phase current signal of formula (34).

The method of present embodiment also extends to heterogeneous modular multilevel converter.

Embodiment 10:

Figure 12 has provided a kind of single-phase switch circuit topological structure of diode clamp formula three-level converter, and this power switch circuit operating state can be come equivalence with 3 sections change over switches, and its equivalent electric circuit is shown in Figure 12 a.

With reference to figure 1a and Fig. 2 a, can obtain the 3 channel electron analog switch artificial circuits of Figure 12 a shown in Figure 12 b.

Embodiment 11:

Figure 13 has provided a kind of plant system drawing of pwm power converter, comprise: pwm power inverter main circuit 25, pwm power converter voltage current detecting modulate circuit and drive circuit 26 and pwm power converter control circuit 28, wherein pwm power converter voltage current detecting modulate circuit and drive circuit 26 are mainly finished the voltage and current detection to pwm power inverter main circuit 25, conditioning etc., high voltage signal and current signal are transformed into the analog simulation circuit signal that satisfies the 28 interface level requirements of pwm power converter control circuit, in order to make pwm power converter control circuit 28 directly carry out data acquisition and control to it.Therefore to combine with drive circuit 26 with pwm power converter voltage current detecting modulate circuit be the controlled device pwm power converter main system 27 of pwm power converter control circuit 28 to pwm power inverter main circuit 25.

Figure 13 a has provided a kind of semi-physical real-time simulation system that adopts pwm power converter analog simulation method of the present invention, and system simulation artificial circuit 17 has been realized the analog simulation at pwm power converter main system 27 among Figure 13 among the figure.For pwm power converter control circuit 28, the external characteristic of pwm power converter main system 27 and the external characteristic of system simulation artificial circuit 17 are identical.

Adder circuit 18L in above-described embodiment can be combined into the one order inertia circuit 12 of band addition function with one order inertia circuit 12; Adder circuit 18C in above-described embodiment can be combined into the proportional integral circuit 13 of band addition function with proportional integral circuit 13.

Though above-mentionedly by reference to the accompanying drawings the specific embodiment of the present invention is described; but be not limiting the scope of the invention; one of ordinary skill in the art should be understood that; on the basis of technical scheme of the present invention, those skilled in the art do not need to pay various modifications that creative work can make or distortion still in protection scope of the present invention.

Claims (5)

1. pwm power converter analog simulation circuit, it is characterized in that, comprise first electronic analog switch circuit and second electronic analog switch circuit, the output of described first electronic analog switch circuit is connected with the input of first adder, the output of described first adder is connected with the input of one order inertia circuit, the output of described one order inertia circuit is connected with the input of second electronic analog switch circuit and the input of second adder respectively, the output of the described second electronic switch analog circuit is connected with second adder, the output of described second adder is connected with the proportional integral circuit, described proportional integral circuit is connected with the input of the 3rd adder, and the output passing ratio amplifying circuit of described the 3rd adder connects the input of second adder; The input of the 3rd adder also with directly/output of ac voltage signal generator is connected, described straight/output of ac voltage signal generator also is connected with second electronic analog switch circuit; The output of the 3rd adder also is connected with the input of first electronic analog switch circuit, and the input of described first electronic analog switch circuit and second electronic analog switch circuit all is connected with external control signal.

2. the analog simulation method that adopts of a kind of pwm power converter analog simulation circuit as claimed in claim 1 is characterized in that concrete steps are:

Step 1: set up the terminal voltage of each device in the described pwm power converter, the electrical model of end current relationship, according to Kirchhoff's law, obtain each loop and the voltage of each node in the described pwm power converter, the electrical model of current relationship;

Step 2: according to the voltage transformation coefficient, the voltage transformation in the described electrical model is become corresponding low-voltage conditioned signal, according to current-ratio, the current transformation in the described electrical model is become corresponding low-voltage conditioned signal; Described low-voltage conditioned signal refers to the voltage signal in known electronic analog switch circuit and operation amplifier circuit normal working voltage scope;

Step 3: adopt first electronic analog switch circuit and second electronic analog switch circuit to realize that the switch function in the described electrical model concerns, namely adopt two semi-bridge type power switch circuits in the electronic analog swtichs simulation pwm power converter; The employing operation amplifier circuit is realized addition, proportionality coefficient, index, the integral relation in the described electrical model.

3. a kind of pwm power converter analog simulation method as claimed in claim 2 is characterized in that, the electrical model in the described step 1 refers to the terminal voltage with device, the input-output characteristic that the end current relationship is described described device.

4. a kind of pwm power converter analog simulation method as claimed in claim 2 is characterized in that the scheme of described step 3 is:

Adopt operation amplifier circuit to realize the one order inertia circuit function, the reactor in the simulation pwm power converter;

Adopt operation amplifier circuit to realize the proportional integral circuit function, the capacitor in the simulation pwm power converter;

Adopt operation amplifier circuit to realize ratio amplifying circuit function, the resistor in the simulation pwm power converter;

Adopt voltage source and current source in straight/ac voltage signal generator simulation pwm power converter.

5. as claim 2 or 4 described a kind of pwm power converter analog simulation methods, it is characterized in that the concrete steps of described step 3 are:

(1) each the semi-bridge type power switch circuit in the pwm power converter is realized analog simulation by described first electronic analog switch circuit, second electronic analog switch circuit, wherein the voltage relationship in the semi-bridge type power switch circuit and current relationship carry out analog simulation by first electronic analog switch circuit, second electronic analog switch circuit respectively, and described first electronic analog switch circuit, second electronic analog switch circuit are controlled synchronously by outside pwm switching signal S; The signal input voltage of described first electronic analog switch circuit is pressed into direct proportion with the on high-tension side respective electrical ordinary telegram of described semi-bridge type power switch circuit respectively, and the signal output voltage of described first electronic analog switch circuit and described semi-bridge type power switch circuit low-pressure side output end voltage are in direct ratio; The low-pressure side output end current of the signal input voltage of described second electronic analog switch circuit and described semi-bridge type power switch circuit is in direct ratio, and the signal output voltage of described second electronic analog switch circuit is in direct ratio with the electric current that flows through the on high-tension side corresponding level node of described semi-bridge type power switch circuit respectively;

(2) voltage/current of each the described reactor in pwm power converter relation realizes analog simulation by a described one order inertia circuit, wherein the electric current of the signal output voltage of one order inertia circuit and described reactor is in direct ratio, the signal input voltage of described one order inertia circuit and the both end voltage of described reactor are in direct ratio, and are calculated according to Kirchhoff's second law by loop, the described reactor place corresponding low-voltage conditioned signal of each element voltage;

(3) voltage/current of each the described capacitor in pwm power converter relation realizes analog simulation by a described proportional integral circuit, its capacitor initial voltage is simulated by voltage source, wherein the both end voltage of the signal output voltage of proportional integral circuit and described capacitor is in direct ratio, the signal input voltage of described proportional integral circuit and the electric current of described capacitor are in direct ratio, and the corresponding low-voltage conditioned signal of each branch current that is connected on the same node by described capacitor calculates according to Kirchhoff's current law (KCL);

(4) voltage/current of each the described resistor in pwm power converter relation realizes analog simulation by a described ratio amplifying circuit, wherein the both end voltage of the signal input voltage of ratio amplifying circuit and described resistor is in direct ratio, and the signal output voltage of ratio amplifying circuit and the electric current of described resistor are in direct ratio;

(5) several voltage sources in the pwm power converter and current source by described straight/the ac voltage signal generator circuit realizes analog simulation, wherein said straight/several signal output voltages of ac voltage signal generator circuit are in direct ratio with corresponding described several voltage source voltage and current source electric currents respectively.

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