CN103296871A - Ripple modulation compensation method for input voltage of single-phase inverter - Google Patents
Ripple modulation compensation method for input voltage of single-phase inverter Download PDFInfo
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- CN103296871A CN103296871A CN 201310199131 CN201310199131A CN103296871A CN 103296871 A CN103296871 A CN 103296871A CN 201310199131 CN201310199131 CN 201310199131 CN 201310199131 A CN201310199131 A CN 201310199131A CN 103296871 A CN103296871 A CN 103296871A
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Abstract
A ripple modulation compensation method for input voltage of a single-phase inverter includes: inverter output voltage and full-bridge inverter circuit input voltage are collected while modulating pulse is output; SPWM (sinusoidal pulse width modulation) pulse signals are obtained by processing the inverter output voltage; ripple parameters are extracted from the full-bridge inverter circuit input voltage; according to pulse widths of the ripple parameter compensation SPWM signals, output voltage harmonic caused by ripples can be eliminated from compensated modulation. The method has the advantages that a modulation strategy is compensated only in software, so that hardware cost is saved; input voltage ripple parameters are compensated directly, so that ripple influence can be inhibited effectively and output quality of an inverter system is improved.
Description
Technical field
The invention belongs to inverter control field, relate to a kind of modulation compensated method at single-phase inverter full bridge inverter input voltage ripple.
Background technology
Single-phase inverter is when practical application, reason owing to self structure, the low-frequency ripple of output frequency can appear doubling in the full bridge inverter input terminal voltage, the ripple amplitude can increase along with the increase of inverter load, and the ripple peak value produces mobile when load impedance changes with respect to the position of modulation signal starting point.
Sinusoidal pulse width modulation (SPWM) modulation strategy is prerequisite with full bridge inverter input constant voltage, so the ripple that exists in the input voltage will influence the inverter output voltage quality, makes first-harmonic be superimposed with high order harmonic component based on triple-frequency harmonics.And the increase of tracking wave amplitude, inverter output voltage triple-frequency harmonics content significantly increases, and the output voltage quality significantly reduces.
For suppressing the influence that the input voltage ripple brings, common methods is the size that increases the inverter circuit input end capacitor, the ripple of filtering input voltage.But this way will certainly increase hardware cost and the volume of inverter, and input end capacitor is not strong to the filter action of low-frequency ac signal, and is limited to the inhibition of ripple.Not only do not increase hardware cost and improve from modulation strategy, more can suppress the ripple influence fully.
Application number is the input voltage instantaneous value that patent " compensation method of ripple amplitude modulation(PAM) and the device " real-time sampling of CN02115213.6 has the ripple signal, compensates next carrier cycle modulating pulse width with the ratio of specified input voltage and instantaneous value.This compensation method is along with the input voltage effective value departs from the increase of specified input voltage degree, and compensation effect can variation, and has the time delay of a carrier cycle all the time.
Summary of the invention
The present invention is directed to the deficiency in the above-mentioned background technology, a kind of modulation compensated method at single-phase inverter full bridge inverter input voltage ripple is provided.Based on half period modulating pulse before the SPWM, amplitude and phase parameter according to the input voltage ripple compensate modulating pulse width, the modulation effect that SPWM modulating pulse after the compensation is produced can compensate the influence of input voltage ripple, reduce inverter output voltage triple-frequency harmonics content, improve the output voltage quality.
Because the half period modulating pulse is identical with later half cycle modulating pulse before the described SPWM, described ripple doubles output voltage frequency, its waveform in the half period before and after SPWM is identical, and the modulating pulse width array that preceding half period modulating pulse is compensated gained according to the ripple parameter also can be used for later half cycle inversion modulation.Compensation method processing procedure of the present invention such as Fig. 1, it is as follows to comprise step:
Step 1: the modulating pulse width array that a last control cycle Len got is N is used for this control cycle inversion modulation, gathers inverter output voltage and full bridge inverter input voltage during the output modulating pulse synchronously.
Step 2: handle inverter output voltage and obtain effective value, error between effective value and the output voltage reference value is carried out PID regulates, obtain next periodic modulation coefficient M, M multiplies each other with the sinusoidal rule variation of the positive half period of fixing array and obtains SPWM half period pulse duration array.
Step 3: handle the full bridge inverter input voltage and obtain maximum U
Max, minimum value U
MinAnd maximum U
MaxStorage sequence number N
p, by formula (U
Max-U
Min)/U
MaxCalculate ratio K, by formula 2 π N
p/ N calculates phase difference p.
Step 4: with described K and p substitution compensation formula 1/{1-K[1-cos (2wt+p)]/2}, wherein wt equals n π/N, and n is 1 to N integer, is compensated the coefficient array.
Step 5: in the SPWM half period pulse duration array in element and the penalty coefficient array element of corresponding sequence number multiply each other, obtain the modulating pulse width array, return step 1 during next control cycle.
When described control cycle was start cycle, the modulating pulse width array was the SPWM half period pulse duration array that M equaled 0.1 o'clock.But the present invention is not limited to initial M equals 0.1.
In the step 1, described modulating pulse width array is preceding half period inversion modulation signal, be used for only need changing the controller output mode when later half cycle inversion is modulated, described synchronous collection voltage signal process was carried out in the preceding half period of control cycle, the later half cycle of control cycle is image data not, the collection array of half period before only handling.
In the step 2, the span of described M is 0＜M≤1, when the explanation load greater than 1 time of the value of M surpasses specifiedly, the value of M need be recalled to less than 1.Generally get close to 1 value for example 0.99.
The length that the sinusoidal rule of described positive half period changes array is N, and amplitude is fixed value, equals f
Sys/ (2Nf
Out), wherein, f
SysBe timer clock frequency, f
OutBe output voltage frequency.
In the step 3, described ratio K is full bridge inverter input voltage peak-to-peak value and peaked ratio, and described phase difference p is input voltage maximum U
MaxWith half period modulation signal original position phase difference before the SPWM.
Compared with prior art, the modulation compensated method of single-phase inverter full bridge inverter input voltage ripple of the present invention, its beneficial effect is: need not increase the size of filtering device and other peripheral hardware circuit need be set, only utilize existing voltage check device and digitial controller in the inversion system, do not increase the hardware system cost; Adopt the half period compensation way can reduce the required control time of compensation; On the basis of SPWM modulation strategy, increase the compensation tache at full bridge inverter input voltage ripple parameter, can suppress the influence of input voltage ripple fully, effectively improve the inversion system output quality.
Description of drawings
Fig. 1 is compensation method processing procedure schematic diagram;
Fig. 2 is the inversion system structured flowchart;
Fig. 3 is the processing procedure schematic diagram of digitial controller output modulated pwm signal and trigger data acquisition;
Fig. 4 is inverter harmonic wave of output voltage content schematic diagram under certain loading condition when not adding compensation method of the present invention;
Fig. 5 adds after the compensation method of the present invention inverter harmonic wave of output voltage content schematic diagram under certain loading condition.
Embodiment
Further specify the present invention below in conjunction with embodiment and accompanying drawing.
As shown in Figure 2, in this inversion system, comprise direct voltage source, input filter capacitor, single-phase full bridge MOSFET inverter circuit, duplex frequency boostering transformer and the parts of being formed by LM4F230 microprocessor and peripheral chip such as digitial controller that lead acid accumulator is formed.Specified input voltage range 20V ~ 32V, rated output voltage 220V ± 5%, specified output frequency 50Hz ± 0.5Hz.Digitial controller timer module clock frequency is 80MHz, and array length N is 256.This moment, the inverter circuit switching frequency was 25.6kHz, and it is that the maximum that timer is counted is 3125 that the sinusoidal rule of positive half period changes the array amplitude.
At the compensation tache of full bridge inverter input voltage ripple, the implementation procedure of compensation method relates to the two paths of signals collection.And it is synchronous in time to require voltage signal acquisition and SPWM signal to generate.Utilize the timer module of LM4F110 microprocessor to realize the synchronous of signals collecting triggering and modulation signal output.Concrete grammar is: the counter values under the unidirectional increment mode of timer module is set to greater than 3125 and triggered the one-off pattern number conversion at 0 o'clock and pulse signal is put height, when counter values is consistent with comparand register numerical value pulse signal is put low, as Fig. 3.
Digitial controller is gathered voltage signal in time period half period before control, and save as the array form, handle the image data of preceding half period in the later half time period in cycle of control, obtain the modulated pulse signal of next control cycle, concrete compensation tache comprises following steps:
Step 4. is handled the full bridge inverter input voltage U that gathers
InArray obtains maximum U wherein
MaxWith minimum value U
Min
Step 5. peak-to-peak value and maximum ratio K equal (U
Max-U
Min)/U
Max
Step 6. is by analyzing input voltage maximum U
MaxStorage sequence number N in image data
p, calculate N
pWith the ratio of data length N, the Circular measure 2 π N of this ratio correspondence
p/ N is original position and the phase difference p of input voltage maximum place of SPWM modulation signal.
Step 7. is with full bridge inverter input voltage U
InThe parameter K value of ripple and p value are updated to compensation formula 1/{1-K[1-cos (2wt+p)]/2}.
Wt equals n π/N in step 8. compensation formula, and n size is with the pulse sequence number is corresponding accordingly, and value is 1 to N, and obtaining length is the penalty coefficient array of N.
In the step 9.SPWM positive half period modulation signal pulse duration array in element and the penalty coefficient array penalty coefficient of corresponding sequence number multiply each other, obtain the modulating pulse width array of next control cycle.
During step 10. arrival of following one-period, the half period drives full bridge inverter and carries out inversion control according to modulating pulse width array output modulated pulse signal before the modulation, and collection inverter output voltage U
OutWith full bridge inverter input voltage U
In, data acquisition is finished and is namely entered modulation during later half cycle, changes the complementary pulse that the controller output mode makes its output modulating pulse width array, returns step 1 simultaneously, and it is modulation compensated to carry out ripple again.
When Fig. 4 did not add compensation method for the SPWM modulation strategy, inverter harmonic wave of output voltage content schematic diagram under the 200W resistive load, transverse axis were frequency, and the longitudinal axis is the voltage logarithm, and visible output voltage comprises a large amount of triple-frequency harmonics and quintuple harmonics; Fig. 5 is for after adding compensation method of the present invention, inverter harmonic wave of output voltage content schematic diagram under the identical load situation, and transverse axis, the longitudinal axis are consistent with Fig. 4, and this output voltage only comprises a spot of each harmonic.
As seen the modulation compensated method of single-phase inverter input voltage ripple of the present invention, utilize existing voltage check device and digitial controller in the inversion system, other peripheral hardware circuit need be set, only need on the basis of existing SPWM modulation strategy half period modulation signal, increase the compensation tache at full bridge inverter input voltage ripple.The present invention can suppress the harmonic wave of output voltage that the input voltage ripple causes, and effectively improves the inversion system output quality.
Claims (3)
1. modulation compensated method of single-phase inverter input voltage ripple, it is characterized in that, described compensation method is on the basis of half period modulated pulse signal before the SPWM sinusoidal pulse width modulation, compensates according to full bridge inverter input voltage ripple parameter pulse-width, may further comprise the steps:
Step 1: the modulating pulse width array that a last control cycle Len got is N is used for this control cycle inversion modulation, gathers inverter output voltage and full bridge inverter input voltage during the output modulating pulse synchronously;
Step 2: handle inverter output voltage and obtain effective value, error between effective value and the output voltage reference value is carried out the PID adjusting obtain index of modulation M, the array of M and the sinusoidal rule variation of the positive half period of fixing multiplies each other and obtains SPWM half period pulse duration array;
Step 3: handle the full bridge inverter input voltage and obtain maximum U
Max, minimum value U
MinAnd maximum U
MaxStorage sequence number N
p, by formula (U
Max-U
Min)/U
MaxCalculate ratio K, by formula 2 π N
p/ N calculates phase difference p;
Step 4: with described K and p substitution compensation formula 1/{1-K[1-cos (2wt+p)]/2}, wherein wt equals n π/N, and n is 1 to N integer, is compensated the coefficient array;
Step 5: in the SPWM half period pulse duration array in element and the penalty coefficient array element of corresponding sequence number multiply each other, obtain the modulating pulse width array, return step 1 during next control cycle.
2. method according to claim 1 is characterized in that when described control cycle was start cycle, the modulating pulse width array was the SPWM half period pulse duration array that M equaled at 0.1 o'clock.
3. method according to claim 1 is characterized in that in the step 2 that the span of described M is 0＜M≤1, when the explanation load greater than 1 time of the value of M surpasses specifiedly, the value of M need be recalled to less than 1.
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| CN 201310199131 CN103296871A (en) | 2013-05-26 | 2013-05-26 | Ripple modulation compensation method for input voltage of single-phase inverter |
| CN201310585848.0A CN103683878B (en) | 2013-05-26 | 2013-11-19 | Ripple modulation compensation method for input voltage of single-phase inverter |
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| CN 201310199131 CN103296871A (en) | 2013-05-26 | 2013-05-26 | Ripple modulation compensation method for input voltage of single-phase inverter |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103887824A (en) * | 2014-04-17 | 2014-06-25 | 浙江大学 | Voltage loop ripple compensation control system and control method of photovoltaic grid-connected inverter |
| CN103904691A (en) * | 2014-04-22 | 2014-07-02 | 深圳市贝尔太阳能技术有限公司 | Intelligent photovoltaic power generation system |
| CN113114141A (en) * | 2021-04-26 | 2021-07-13 | 北京机械设备研究所 | Method, device and equipment for compensating power supply voltage of electric steering engine |
| CN114499136A (en) * | 2022-03-31 | 2022-05-13 | 广东高斯宝电气技术有限公司 | Method for inhibiting output power frequency ripple of switching power supply |
| CN115296444A (en) * | 2022-10-10 | 2022-11-04 | 国网江西省电力有限公司电力科学研究院 | Wireless energy transfer device |
| CN113114141B (en) * | 2021-04-26 | 2024-06-07 | 北京机械设备研究所 | Method, device and equipment for compensating power supply voltage of electric steering engine |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI641205B (en) | 2015-09-30 | 2018-11-11 | 財團法人工業技術研究院 | Method of ripple-compensation control and power converter using the same |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5156005A (en) * | 1991-05-24 | 1992-10-20 | Sunpower, Inc. | Control of stirling cooler displacement by pulse width modulation of drive motor voltage |
| CN1148864C (en) * | 2002-05-09 | 2004-05-05 | 艾默生网络能源有限公司 | Method and device for compensating ripple amplitude modulation |
| CN102033490B (en) * | 2010-11-22 | 2013-01-16 | 浙江工业大学 | One-fourth cycle repetitive controller based on ideal error dynamic |
-
2013
- 2013-05-26 CN CN 201310199131 patent/CN103296871A/en active Pending
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103887824A (en) * | 2014-04-17 | 2014-06-25 | 浙江大学 | Voltage loop ripple compensation control system and control method of photovoltaic grid-connected inverter |
| CN103904691A (en) * | 2014-04-22 | 2014-07-02 | 深圳市贝尔太阳能技术有限公司 | Intelligent photovoltaic power generation system |
| CN113114141A (en) * | 2021-04-26 | 2021-07-13 | 北京机械设备研究所 | Method, device and equipment for compensating power supply voltage of electric steering engine |
| CN113114141B (en) * | 2021-04-26 | 2024-06-07 | 北京机械设备研究所 | Method, device and equipment for compensating power supply voltage of electric steering engine |
| CN114499136A (en) * | 2022-03-31 | 2022-05-13 | 广东高斯宝电气技术有限公司 | Method for inhibiting output power frequency ripple of switching power supply |
| CN115296444A (en) * | 2022-10-10 | 2022-11-04 | 国网江西省电力有限公司电力科学研究院 | Wireless energy transfer device |
| CN115296444B (en) * | 2022-10-10 | 2023-03-24 | 国网江西省电力有限公司电力科学研究院 | Wireless energy transfer device |
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| CN103683878A (en) | 2014-03-26 |
| CN103683878B (en) | 2015-12-02 |
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