CN103259604B - A kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system - Google Patents
A kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system Download PDFInfo
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Abstract
The present invention is applicable to microwave and millimeter wave integration test field, provides a kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system, it is characterized in that, comprise anti aliasing purposes filter, A/D module, FPGA module and DSP module; Described anti aliasing purposes filter passes into intermediate-freuqncy signal, for carrying out filtering to described intermediate-freuqncy signal; Described A/D module is connected with described anti aliasing purposes filter, for changing described intermediate-freuqncy signal; Described FPGA module is connected with described A/D module, for processing digital signal; Described DSP module is connected with described FPGA module, for processing digital signal.Multi-functional measuring multiple parameters Digital IF Processing multiplex system of the present invention is the multiplex technique by Digital IF Processing module, multiple measurement function is realized when not increasing digital circuit hardware resource, save cost, reduce power consumption, achieve the synthesization of measuring instrument.
Description
Technical field
The invention belongs to microwave and millimeter wave integration test technical field, particularly relate to a kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system.
Background technology
In testing radio, software and radio technique is study hotspot.After radiofrequency signal is transformed into intermediate frequency, the analog signal digitlization as early as possible utilizing software and radio technique to receive, realizes the Digital Signal Processing such as Digital Down Convert, extraction, filtering by software.This technology obtains application in the common bench instruments such as frequency spectrograph, receiver, vector network analyzer, Noise Factor Analyzer.Often need to test frequency spectrum, field intensity, noise factor, the multiple parameter of standing-wave ratio in testing radio, this radio comprehensive test platform often needing main control computer, multiple stage universal tester to form, or adopt multiple measurement module in a radio comprehensive monitoring instrument.An instrument or measurement module only achieve the test of single parameter or a small amount of parameter.
As shown in Figure 1, it is made up of main control computer, control circuit and multiple stage universal tester existing radio system comprehensive test platform block diagram.According to the control command of main control computer, pass through control bus, adopt the multiple technologies such as bus test, virtual instrument, select different instruments to form special test macro, to meet the measurement of the various parameters such as testing radio intermediate frequency spectrum, field intensity, noise factor, standing-wave ratio.
In the universal testers such as existing receiver or frequency spectrograph, single channel IF signal processing block diagram as shown in Figure 2, signal process part is by high-speed dsp (DigitalSignalProcessing, Digital Signal Processing), FPGA (Field-ProgrammableGateArray, i.e. field programmable gate array) or ASIC device complete.The orthogonal local oscillation signal that intermediate-freuqncy signal produces through digital mixer and digital controlled oscillator (NCO) is multiplied, and produces I, Q two-way mixed frequency signal, interested signal is downconverted to zero intermediate frequency.Then through low pass filter, filter out-band external signal, extracts useful signal.Through sample rate conversion, reduce sampling rate, be beneficial to the process of follow-up signal.Large extraction factor range provides the ability that can be designed to broadband or narrow-band digital channel, and provides high processing gain.By can obtain amplitude, frequency, the phase information of signal to the process of I, Q two paths of signals.The process of multichannel intermediate-freuqncy signal needs the extra hardware resource increasing parallel processing.
At present, there is following shortcoming in prior art:
1, comprehensive test platform formation is complicated, volume is large, very flexible.
The integrated test system platform of existing tester composition needs according to concrete functional parameter, selects different instruments to form special test macro.This System's composition complexity, very flexible, complex operation, poor reliability, cost intensive, tester is required high, be not suitable with battlefield technique guarantee.
2, multimeter intermediate frequency process module testing function singleness, or need more hardware resource to increase test function, power consumption is large, cost is high.
Existing multimeter adopts software and radio technique, utilizes software simulating test function.But digital signal processing module function singleness, a set of digital signal processing module only designs for single or a small amount of measurement function.Needing to increase hardware resource to increase measurement function, using high-end FPGA or asic chip.And several subsignal process chip of top grade are resourceful there is expensive, that volume is larger shortcoming simultaneously.Existing Digital Signal Processing flow process is difficult to realize more measurement function with less hardware resource, lower cost.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system, be intended to the multiplex technique by Digital IF Processing module, multiple measurement function is realized when not increasing digital circuit hardware resource, save cost, reduce power consumption, achieve the synthesization of measuring instrument.
The present invention is achieved in that a kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system, comprises anti aliasing purposes filter, A/D module, FPGA module and DSP module;
Described anti aliasing purposes filter passes into intermediate-freuqncy signal, for carrying out filtering to described intermediate-freuqncy signal;
Described A/D module is connected with described anti aliasing purposes filter, for changing described intermediate-freuqncy signal;
Described FPGA module is connected with described A/D module, for processing digital signal;
Described DSP module is connected with described FPGA module, for processing digital signal.
Further, also digital down converter is comprised; Described digital down converter realizes in FPGA module, converts the signal into zero intermediate frequency, obtains I, Q two-way orthogonal signalling simultaneously.
Further, described digital down converter comprises frequency mixing module and filtering extraction module; Described frequency mixing module is connected with AD input, and described filtering extraction module is connected with described frequency mixing module, and the extraction of described filtering extraction module requires to arrange according to resolution bandwidth than parameter.
Further, described frequency mixing module comprises NCO module, the first multiplier and the second multiplier; Described NCO module is connected with described first multiplier, the second multiplier respectively, is also multiplied in the first multiplier, the second multiplier with input data respectively, completes mixing for generation of sine and cosine ripple sample value.
Further, described filtering extraction module comprises the first cic filter, the second cic filter, a HB filter, the 2nd HB filter, the first FIR filter and the second FIR filter;
Described first multiplier is connected with described first cic filter, and described first cic filter, a HB filter are connected successively with the first FIR filter, and described first FIR filter is connected with memory;
Described second multiplier is connected with described second cic filter, and described second cic filter, the 2nd HB filter are connected successively with the second FIR filter, and described second FIR filter is connected with memory.
Further, described FPGA module comprises function selecting module, and described function selecting module is connected with described digital down converter; The difference test of described function selecting module by selecting different functions to complete same set of digital signal processing module.
Further, described FPGA module comprises optimum configurations and control module, described optimum configurations is connected with described digital down converter with control module, described optimum configurations and control module according to optimum configurations and function control each digital signal processing module under difference in functionality pattern parameter reselect configuration.
Further, described FPGA module also comprises some parallel-to-serial converters and deserializer, and described parallel-to-serial converter and deserializer are by realizing the time-sharing multiplex of multi channel signals to module to the speed conversion of signal stream.
Further, described some parallel-to-serial converters and deserializer are two parallel-to-serial converters and two deserializers, wherein, first parallel-to-serial converter is connected with the first multiplier, second parallel-to-serial converter is connected with the second multiplier, first deserializer is connected with the first FIR filter, and the second deserializer is connected with the second FIR filter.
Further, described anti aliasing purposes filter includes two paths of signals, is respectively reference signal and reflected signal, and described reference signal and reflected signal carry out analog-to-digital conversion respectively by A/D module.
Multi-functional measuring multiple parameters Digital IF Processing multiplex system of the present invention is by the multiplexing multiple measurement function such as frequency spectrum, field intensity, noise factor, standing-wave ratio achieving microwave and millimeter wave when not increasing digital circuit hardware resource of Digital IF Processing module.And by carry out time-sharing multiplex to same IP kernel and carry out selecting the flexibility of optimum configurations under control realization resources conservation and different measuring pattern to IP kernel parameter.Digital medium-frequency signal processing module compared with existing radio system integration testing platform and universal tester provides cost savings, reduces power consumption, achieves the synthesization of measuring instrument and the flexibility of measurement.
Accompanying drawing explanation
Fig. 1 is the radio system comprehensive test platform block diagram that prior art provides;
Fig. 2 is the existing universal tester single channel IF signal processing block diagram that prior art provides;
Fig. 3 is the IF signal processing hardware structure diagram that the embodiment of the present invention provides;
Fig. 4 is the multiplexing block diagram of digital signal processing module that the embodiment of the present invention provides;
Fig. 5 is the multi-channel digital IF signal processing array signal processing block diagram that the embodiment of the present invention provides.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
The present invention adopts digitised Intermediate Frequency technology in microwave and millimeter wave test.Digitised Intermediate Frequency is based on software radio thought, based on wideband A/D, high speed FPGA, high-speed dsp, take software as core by A/D as much as possible close to radio frequency input, as far as possible early by analog signal figure.Compared with traditional analog form, digitised Intermediate Frequency has the features such as flexibility, adaptability, stability and opening.
As shown in Figure 3, a kind of multi-functional measuring multiple parameters Digital IF Processing multiplex system, comprises anti aliasing purposes filter 301, A/D module 302, FPGA module 303 and DSP module 304.Described anti aliasing purposes filter 301 passes into intermediate-freuqncy signal, for carrying out filtering to described intermediate-freuqncy signal; Described A/D module 302 is connected with described anti aliasing purposes filter 301, for changing described intermediate-freuqncy signal; Described FPGA module 303 is connected with described A/D module 302, and described DSP module 304 is connected with described FPGA module 303, for processing digital signal.Intermediate-freuqncy signal enters FPGA module 303 after A/D module 302 is sampled and DSP module 304 carries out Digital Signal Processing, signal transforms to zero intermediate frequency after digital down converter, obtain I, Q two-way orthogonal signalling simultaneously, then through multi-stage digital decimation filter and FIR shaping filter, then the data processings such as video filtering, video detection, FFT are carried out.The difference that the parameters such as the extraction ratio of decimation filter can require according to resolution bandwidth etc. and arranging, the difference that flow chart of data processing also can require according to resolution bandwidth etc. and designing.
As shown in Figure 4, in order to realize different functions with same set of digital signal processing module, present invention employs and carry out multiplexing to the IP kernel of FPGA module 303 under different measuring pattern.Digital down converter comprises frequency mixing module and filtering extraction module; Described frequency mixing module comprises NCO module 403, first multiplier 402 and the second multiplier 404.Described NCO module 403 is connected with described first multiplier 402, second multiplier 404 respectively.Described filtering extraction module comprises the first cic filter 405, second cic filter 408, a HB filter 406, the 2nd HB filter 409, first FIR filter 407 and the second FIR filter 410.Described first multiplier 402 is connected with described first cic filter 405, and described first cic filter 405, a HB filter 406 are connected successively with the first FIR filter 407, and described first FIR filter 407 is connected with memory 411.Described second multiplier 404 is connected with described second cic filter 408, and described second cic filter 408, the 2nd HB filter 409 are connected successively with the second FIR filter 410, and described second FIR filter 410 is connected with memory 411.By realizing parallel-serial conversion to the speed conversion of data flow and then realizing carrying out time-sharing multiplex to IP kernel under a kind of measurement pattern, and the method selecting control is carried out to the IP kernel parameter of FPGA module 303.Achieve the multiplexing of the digital signal processors such as digital down converter, cic filter, HB filter, FIR filter under different measuring pattern, and achieve NCO digital local oscillator frequency, cic filter extracts coefficient, HB filter extracts coefficient, isoparametric the selections control of HB filter coefficient, Finite Impulse Response filter coefficient.Utilize function selecting module 412 to achieve same set of digital signal processing module and complete different test functions, utilizing optimum configurations and controlling functions module 413 to achieve, each digital signal processing module completes parameter under difference in functionality pattern reselects configuration, achieves the multiplexing of digital signal processing module.
Based on array signal processing Digital Signal Processing FB(flow block) as shown in Figure 5, reference signal and reflected signal two paths of signals (R passage and A channel) are needed for the isoparametric test of standing-wave ratio, also have two AD to carry out analog-to-digital conversion accordingly, the data after conversion also will synchronously process after being received by FPGA module 303 simultaneously.In order to save hardware resource, the present invention flows through speed conversion to signal and realizes parallel-serial conversion, and the sequential between each calculation step of Exact Design, realizes the time-sharing multiplex of module.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (5)
1. a multi-functional measuring multiple parameters Digital IF Processing multiplex system, is characterized in that, comprises anti aliasing purposes filter, A/D module, FPGA module and DSP module;
Described anti aliasing purposes filter passes into intermediate-freuqncy signal, for carrying out filtering to described intermediate-freuqncy signal;
Described A/D module is connected with described anti aliasing purposes filter, for changing described intermediate-freuqncy signal;
Described FPGA module is connected with described A/D module, for processing digital signal;
Described DSP module is connected with described FPGA module, for processing digital signal;
Described system also comprises digital down converter, and described digital down converter realizes in FPGA module, converts the signal into zero intermediate frequency, obtains I, Q two-way orthogonal signalling simultaneously;
Described digital down converter comprises frequency mixing module and filtering extraction module; Described frequency mixing module is connected with AD input, and described filtering extraction module is connected with described frequency mixing module, and the extraction of described filtering extraction module requires to arrange according to resolution bandwidth than parameter;
Described frequency mixing module comprises NCO module, the first multiplier and the second multiplier; Described NCO module is connected with described first multiplier, the second multiplier respectively, is also multiplied in the first multiplier, the second multiplier with input data respectively, completes mixing for generation of sine and cosine ripple sample value;
Described filtering extraction module comprises the first cic filter, the second cic filter, a HB filter, the 2nd HB filter, the first FIR filter and the second FIR filter;
Described first multiplier is connected with described first cic filter, and described first cic filter, a HB filter are connected successively with the first FIR filter, and described first FIR filter is connected with memory;
Described second multiplier is connected with described second cic filter, and described second cic filter, the 2nd HB filter are connected successively with the second FIR filter, and described second FIR filter is connected with memory;
Described FPGA module also comprises some parallel-to-serial converters and deserializer, and described parallel-to-serial converter and deserializer are by realizing the time-sharing multiplex of multi channel signals to module to the speed conversion of signal stream.
2. multi-functional measuring multiple parameters Digital IF Processing multiplex system according to claim 1, it is characterized in that, described FPGA module comprises function selecting module, and described function selecting module is connected with described digital down converter; The difference test of described function selecting module by selecting different functions to complete same set of digital signal processing module.
3. multi-functional measuring multiple parameters Digital IF Processing multiplex system according to claim 2, it is characterized in that, described FPGA module comprises optimum configurations and control module, described optimum configurations is connected with described digital down converter with control module, described optimum configurations and control module according to optimum configurations and function control each digital signal processing module under difference in functionality pattern parameter reselect configuration.
4. multi-functional measuring multiple parameters Digital IF Processing multiplex system according to claim 1, it is characterized in that, described some parallel-to-serial converters and deserializer are two parallel-to-serial converters, two deserializers, wherein, first parallel-to-serial converter is connected with the first multiplier, second parallel-to-serial converter is connected with the second multiplier, and the first deserializer is connected with the first FIR filter, and the second deserializer is connected with the second FIR filter.
5. multi-functional measuring multiple parameters Digital IF Processing multiplex system according to claim 4, it is characterized in that, described anti aliasing purposes filter includes two paths of signals, is respectively reference signal and reflected signal, and described reference signal and reflected signal carry out analog-to-digital conversion respectively by A/D module.
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| CN112350765B (en) * | 2020-10-20 | 2022-03-22 | 中国电子科技集团公司第五十四研究所 | Multi-stage full-digital frequency conversion demodulation device based on digital resampling |
| CN112865873B (en) * | 2021-02-02 | 2022-03-11 | 四川赛狄信息技术股份公司 | Intermediate frequency signal processor and intermediate frequency signal processing system |
| CN114252722A (en) * | 2022-01-21 | 2022-03-29 | 上海创远仪器技术股份有限公司 | High-bandwidth vector network analyzer system for realizing vector signal receiving and transmitting |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101510756A (en) * | 2009-03-06 | 2009-08-19 | 山东大学 | Digital signal down variable frequency processing system based on MIMO real time test platform |
-
2013
- 2013-05-20 CN CN201310187989.7A patent/CN103259604B/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101510756A (en) * | 2009-03-06 | 2009-08-19 | 山东大学 | Digital signal down variable frequency processing system based on MIMO real time test platform |
Non-Patent Citations (2)
| Title |
|---|
| 基于MIMO实时平台的数字下变频系统的设计与实现;宋文曈;《中国优秀硕士论文全文数据库》;20100515;说明书第1章第8页倒数第3行至第10页倒数第1行、第3章第35页倒数第6行至第37页第13行以及图1.1、图3.3 * |
| 数字下变频的抽取滤波器组成的ASIC设计;陈亦欧;《中国优秀硕士论文全文数据库》;20080115;说明书第2章第4页第1行至第6页第4行以及图2-2 * |
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