CN103236923B - Safe encryption method for WLAN - Google Patents
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Abstract
A kind of highly effective and safe encryption method for WLAN, encodes first group in plain text and is divided into 4 coded words in units of word, and first group of master key coding is divided in units of word 4 key words;By the 1st key word in described first group of master key coding to the 3rd key word and the 1st respective loops of the 0th key word computing one word length of generation, again the 1st key word is moved forward to the 0th position to the 2nd key word to the 3rd key word, described 1st respective loops is moved to the position of the 3rd key word;Send into second group of in plain text coding, this second group in plain text coding take turns the clock cycle with its upper one group of plaintext encoded interval at least 4;Meanwhile, sending into second group of master key coding, this second group of master key encodes and encodes identical with the time interval that first group encodes in plain text in plain text with the time interval of on it one group of master key coding and described second group.The method substantially increases the data throughout of encryption/decryption speed and unit interval, and the high safety of data.
Description
Technical field
The present invention relates to the implementation method of block encryption algorithm, particularly relate to a kind of safety for WLAN and encrypt
Method.
Background technology
Along with the extensive application of WLAN, its safety issue is more and more prominent.For WLAN,
Safety aspect is the most fragile, and this is owing to transfer rate can reach 11M, and coverage reaches 100 meters.Its transmission speed just
Degree is fast, and wide coverage just makes it the most fragile at secure context.Because data all expose to the open air aloft during transmission,
It is easy to by malicious person's data intercept bag.
At present, in the implementation of existing algorithm, the most still using software approach to realize, its implementation is the most square
Just, but its arithmetic speed is not the most preferable, is difficult to meet real-time needs, and hard-wired mode exists hardware spending
Greatly, high cost, circuit realiration area and power consumption are big etc. not enough.And along with society is more and more higher to the needs of information security,
Therefore the circuit realiration to AES and the management to key are also proposed the biggest challenge, in actual applications, phase
For the correlated performance of deciphering, user often focuses more on the performance indications of encryption, the most how to meet encryption data peace
While full property, and improving the enciphering rate of cryptographic algorithm, this is again a new difficult problem.
Summary of the invention
It is an object of the present invention to provide a kind of safe encryption method for WLAN, the method substantially increases and adds solution
Close speed and the data throughout of unit interval, and the high safety of data.
For reaching above-mentioned purpose, the technical solution used in the present invention is:
A kind of safe encryption method for WLAN, comprises the following steps:
Step one. first group is encoded in plain text in units of word, is divided into 4 coded words, first group of master key is encoded with word
It is divided into 4 key words for unit;
Step 2. the 1st key word in described first group of master key coding is transported to the 3rd key word and a constant XOR
After calculation, remake inverible transform, then generate the 1st respective loops of a word length with the 0th key word XOR, then by the 1st
Key word moves forward to the 0th position to the 2nd key word to the 3rd key word, and described 1st respective loops is moved to the 3rd
The position of key word, and retain this respective loops;
Step 3. repeat step 2 and generate 31 sub-keys of first group of master key coding;
Step 4. described 1st respective loops is encoded the 1st coded word to the 3rd coded word in plain text with described first group
After XOR, remake inverible transform, then generate the first round ciphertext word of a word length with the 0th coded word XOR, then
1st coded word is moved forward to the 0th position to the 2nd coded word to the 3rd coded word, described first round ciphertext word is moved
Position to the 3rd coded word;
Step 5. sending into second group of coding in plain text, this second group plaintext coding is divided into 4 coded words in units of word, should
Second group in plain text coding take turns the clock cycle with its upper one group of plaintext encoded interval at least 4;Meanwhile, send into second group of master key to compile
Code, second group of master key coding is divided into 4 key words in units of word, this second group of master key coding and one group of master key on it
The time interval of coding encodes identical with the time interval that first group encodes in plain text with described second group in plain text;
Step 6. repeat step 2 and generate 31 sub-keys of second group of master key coding;
Step 7. close to described first group of the 2nd wheel that coding uses first group of master key to encode the most in order in plain text
Key carries out 31 to the 32nd respective loops repetition step 3 and takes turns encryption;In like manner, described second group of plaintext coding is made the most in order
Carry out 32 with the 1st respective loops of second group of master key coding to the 32nd respective loops repetition step 3 and take turns encryption;
Step 8. encode after 32 take turns encryption in plain text when one group, its 0th to the 3rd coded word is made antitone mapping,
Acquisition ciphertext encodes;
In described ciphering process, inverible transform is: T is inverible transform in ciphering process, and wherein T is Z32 2To Z32 2One
Inverible transform, is composited by nonlinear transformation τ and linear change L,
I.e. T (.)=L (τ (.)).Wherein: nonlinear transformation τ: it is to be made up of 4 parallel S boxes.If input is A=
(a1, a2, a3, a4)∈(Z 8 2) 4, it is output as B=(b1, b2, b3, b4)∈(Z 8 2) 4, then have:
(b1, b2, b3, b4)=τ(A)=(Sbox(a1), Sbox(a2), Sbox(a3), Sbox(a4));
The output of linear transformation L: nonlinear transformation τ is also the input of linear transformation L.If input is B ∈ Z32 2, then
Have:
C=L (B)=B (B < < 2) (B < < 10) (B < < 18) (B < < 24), wherein < < i is that 32 bit cyclic move to left
I position.
Relevant content in technique scheme is explained as follows:
In such scheme, described first group in plain text coding and its upper one group of plaintext encoded interval are 4 to take turns the clock cycle.
Owing to technique scheme is used, the present invention compared with prior art has following advantages and an effect:
(1) present invention designs succinctly, and encryption and decryption mode is identical, and cipher key spreading mode is similar with encryption and decryption mode, encryption and decryption
Neutralizing the S box in cipher key spreading the most identical, when this algorithm realizes, the utilization rate of hardware is higher, and the most whole algorithm is less
Circuit area on realize;Secondly, safety is high, and the information security for China has relatively reliable guarantee.By to key
Real-time update so that the safety of data is more preferable, can stop more attack.
(2) encryption/decryption speed is fast, and the present invention is by each wheel taken turns produced during depositing enciphering and deciphering algorithm respectively
Ciphertext and by each sub-key taken turns produced during key schedule, then by a data input indicative signal
Data_input and master key input indicative signal key_input controls the input of data and the input of master key respectively, from
And can be able to obtain every 4 clock cycle after obtain the ciphertext of first group of 128 Bit data through 32 clock units
Second group, the 3rd group, until the ciphertext of all data, thus need not wait that 32 clock units could obtain the brightest respectively
The ciphertext of literary composition data, namely 4 clock units can process the clear data of one group of 128 bit, are therefore greatly improved number
According to encryption/decryption speed and the handling capacity of data, such that it is able to large batch of process data so that encryption and decryption processing speed obtains
Great raising.
(3) circuit realiration is simple, is used for depositing wheel ciphertext and son produced by each wheel by defining different depositors
Key, so that circuit realiration is relatively easy, it is not necessary to too much considers enciphering and deciphering algorithm and the logic of key schedule
Realize.
(4) applicable surface is wider, by significantly improve encryption and decryption processing speed and data throughout, so that can fit
For application higher to rate request, so that its range expands, different applied environments can be suitable for.
Accompanying drawing explanation
Accompanying drawing 1 is integrated circuit structural representation of the present invention;
Accompanying drawing 2 is each computing inner frame schematic diagram taken turns of cipher key spreading circuit of the present invention;
Accompanying drawing 3 is encryption and decryption circuit general frame schematic diagram of the present invention;
Accompanying drawing 4 is the inner frame schematic diagram of each computing taken turns in enciphering and deciphering algorithm of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawings and embodiment the invention will be further described:
Embodiment: a kind of safe encryption method for WLAN,
Comprise the following steps:
Step one. first group is encoded in plain text in units of word, is divided into 4 coded words, first group of master key is encoded with word
It is divided into 4 key words for unit.
Step 2. the 1st key word in described first group of master key coding is transported to the 3rd key word and a constant XOR
After calculation, remake inverible transform, then generate the 1st respective loops of a word length with the 0th key word XOR, then by the 1st
Key word moves forward to the 0th position to the 2nd key word to the 3rd key word, and described 1st respective loops is moved to the 3rd
The position of key word, and retain this respective loops.
Step 3. repeat step 2 and generate 31 sub-keys of first group of master key coding.
Step 4. described 1st respective loops is encoded the 1st coded word to the 3rd coded word in plain text with described first group
After XOR, remake inverible transform, then generate the first round ciphertext word of a word length with the 0th coded word XOR, then
1st coded word is moved forward to the 0th position to the 2nd coded word to the 3rd coded word, described first round ciphertext word is moved
Position to the 3rd coded word.
Step 5. sending into second group of coding in plain text, this second group plaintext coding is divided into 4 coded words in units of word, should
Second group in plain text coding take turns the clock cycle with its upper one group of plaintext encoded interval at least 4;Meanwhile, send into second group of master key to compile
Code, second group of master key coding is divided into 4 key words in units of word, this second group of master key coding and one group of master key on it
The time interval of coding encodes identical with the time interval that first group encodes in plain text with described second group in plain text.
Step 6. repeat step 2 and generate 31 sub-keys of second group of master key coding.
Step 7. close to described first group of the 2nd wheel that coding uses first group of master key to encode the most in order in plain text
Key carries out 31 to the 32nd respective loops repetition step 3 and takes turns encryption;In like manner, described second group of plaintext coding is made the most in order
Carry out 32 with the 1st respective loops of second group of master key coding to the 32nd respective loops repetition step 3 and take turns encryption.
Step 8. encode after 32 take turns encryption in plain text when one group, its 0th to the 3rd coded word is made antitone mapping,
Acquisition ciphertext encodes.
Described first group in plain text coding and its upper one group of plaintext encoded interval are 4 to take turns the clock cycle.
In described ciphering process, inverible transform is: T is inverible transform in ciphering process, and wherein T is Z32 2To Z32 2One
Inverible transform, is composited by nonlinear transformation τ and linear change L,
I.e. T (.)=L (τ (.)).Wherein: nonlinear transformation τ: it is to be made up of 4 parallel S boxes.If input is A=
(a1, a2, a3, a4)∈(Z 8 2) 4, it is output as B=(b1, b2, b3, b4)∈(Z 8 2) 4, then have:
(b1, b2, b3, b4)=τ(A)=(Sbox(a1), Sbox(a2), Sbox(a3), Sbox(a4));
The output of linear transformation L: nonlinear transformation τ is also the input of linear transformation L.If input is B ∈ Z32 2, then
Have:
C=L (B)=B (B < < 2) (B < < 10) (B < < 18) (B < < 24), wherein < < i is that 32 bit cyclic move to left
I position.
The present embodiment foregoing is explained as follows.
In accompanying drawing 1, the function of each signal is described as follows:
Input signal:
Clk: system clock inputs,
Rst_: reset signal, Low level effective,
Crypt: encryption and decryption pattern, 0 is deciphering, and 1 is encryption,
Key [127:0]: the master key of algorithm, bit wide is 128 bits,
New_key: more new master key indication signal,
Sms4_in [127:0]: input in plain text, bit wide is 128 bits.
Data_input: input indicative signal in plain text.
Key_input: key input indicative signal.
Output signal:
Sms4_out [127:0]: ciphertext exports, and bit wide is 128 bits,
Cryptdone: encryption and decryption termination instruction signal,
Roundcipher [31:0]: wheel ciphertext, bit wide is 32 bits.
Internal signal:
Round [5:0]: wheel selects control signal, and bit wide is 6 bits,
Roundkey [31:0]: round key, bit wide is 32 bits.
Encryption key lengths is 128 bits, is expressed as MK=(MK0, MK1, MK2, MK3), wherein MKi(i=0,1,2,3)
For word, round key is expressed as (rk0, rk1,…, rk31), wherein rki(i=0,1 ..., 31) it is word.Round key is by encryption key
Generate.FK=(FK0, FK1, FK2, FK3) it is systematic parameter, CK=(CK0, CK1,…, CK31) it is preset parameter, for key
Expansion algorithm, wherein FKi(i=0,1,2,3), CKi(i=0,1 ..., 31) it is word.This algorithm uses nonlinear iteration structure, with
Word is that unit is encrypted computing, and an iteration computing is called a round transformation. one has 32 takes turns iterated transform.If input is (X0,
X1, X2, X3) ∈ (Z32 2 ) 4, round key is rk ∈ Z32 2, then round function F is:
F(X0, X1, X2, X3, rk)=X0⊕T(X1⊕X2⊕X3⊕rk)
Definition antitone mapping R is: R (A0, A1, A2, A3)=(A3, A2, A1, A0), Ai ∈ Z32 2, i=0,1,2,3.If it is the most defeated
Enter for (X0, X1, X2, X3)∈(Z32 2 ) 4, ciphertext is output as (Y0, Y1, Y2, Y3)∈(Z32 2 ) 4, round key is rki∈Z32 2,
i=0,1,…, 31.Then the enciphering transformation of this algorithm is: for i=0,1 ..., 31 have
Xi+4=F( Xi, Xi+1, Xi+2, Xi+3, rki )= Xi⊕T(Xi+1⊕Xi+2⊕Xi+3⊕rki)
(Y0, Y1, Y2, Y3) = R(X32, X33, X34, X35)=(X35, X34, X33, X32)
The hardware that inventive algorithm Hardware Implementation comprises the key schedule in algorithm realizes and enciphering and deciphering algorithm
Hardware realize, and with quick hardware algorithm implementation method realize after circuit include cipher key spreading circuit, encryption and decryption circuit
With wheel control circuit.Needed for described cipher key spreading circuit refers to take turns encryption and decryption with in the master key generation algorithm of 128 bits 32
The circuit of sub-key, a length of 32 bits of each of which respective loops.Described encryption and decryption circuit refers to 128 bits plaintexts and by close
32 respective loops that key expanded circuit produces obtain the circuit of 128 bit ciphertexts through the encryption process that algorithm 32 is taken turns.Described
Wheel control circuit refers to select and the wheel number in control key expanded circuit and encryption and decryption circuit.
Described encryption and decryption circuit, the depositor of 32 32 bits of definition, deposit respectively by produced by enciphering and deciphering algorithm
The wheel ciphertext that 32 take turns, the wheel ciphertext of each of which wheel is 32 bits, and data input a length of 128 bits, and defeated by data
Entering indication signal data_input to determine when to send into 128 new Bit datas, indication signal data_input is a week
Phase is the indication signal of 4 clock units, namely sends into 128 new Bit datas after every 4 clock units.
Described encryption and decryption circuit, when indication signal data_input indication signal is effective, first group of 128 Bit data
Send in encryption and decryption circuit, the ciphertext of first group of 128 Bit data can be obtained through 32 clock units, then through 4 clock lists
Unit can obtain the ciphertext of second group of 128 Bit data, then can obtain the 3rd group of 128 Bit datas through 4 clock units
Ciphertext, the like, until all of data have processed.
Described cipher key spreading circuit, the depositor of 32 32 bits of definition, deposit key schedule respectively and produced
32 sub-keys taken turns, a length of 32 bits of sub-key of each of which wheel, master key is 128 bits, and by a master key
Input indicative signal key_input determines when to send into 128 new bit master keys.Indication signal key_input is one
Cycle is the indication signal of 4 clock units.In the case of master key is constant, it indicates that signal key_input is the most invalid;
When master key changes with the clear data change of input, it is defeated that the clock cycle of indication signal key_input is equal to data
Enter the clock cycle of indication signal data_input.
Above-described embodiment, only for technology design and the feature of the explanation present invention, its object is to allow person skilled in the art
Scholar will appreciate that present disclosure and implements according to this, can not limit the scope of the invention with this.All according to the present invention
The equivalence that spirit is made changes or modifies, and all should contain within protection scope of the present invention.
Claims (1)
1. the safe encryption method for WLAN, it is characterised in that: comprise the following steps:
Step one. first group is encoded in plain text in units of word, is divided into 4 coded words, first group of master key is encoded with word as list
Position is divided into 4 key words;
Step 2. by the 1st key word in described first group of master key coding to the 3rd key word and a constant XOR
After, remake inverible transform, then generate the 1st respective loops of a word length with the 0th key word XOR, closeer by the 1st
Key word moves forward to the 0th position to the 2nd key word to the 3rd key word, described 1st respective loops is moved to the 3rd close
The position of key word, and retain this respective loops;
Step 3. repeat 31 sub-keys of first group of master key coding of step 2 regeneration;
Step 4. described 1st respective loops is encoded the 1st coded word to the 3rd coded word XOR in plain text with described first group
After computing, remake inverible transform, then generate the first round ciphertext word of a word length with the 0th coded word XOR, then by the 1st
Position coded word moves forward to the 0th position to the 2nd coded word to the 3rd coded word, and described first round ciphertext word is moved to the 3rd
The position of position coded word;
Step 5. sending into second group of coding in plain text, this second group plaintext coding is divided into 4 coded words in units of word, and this is second years old
Group encodes in plain text and on it, one group of plaintext encoded interval at least 4 takes turns the clock cycle;Meanwhile, send into second group of master key coding, the
Two groups of master key codings are divided into 4 key words in units of word, this second group of master key coding and one group of master key coding on it
Time interval with described second group in plain text coding identical with the time interval that first group encodes in plain text;
Step 6. repeat 31 sub-keys of second group of master key coding of step 2 regeneration;
Step 7. encode the 2nd of the first group of master key coding using step 3 the most in order in plain text to described first group and take turns
Sub-key carries out 31 to the 32nd respective loops and takes turns encryption;In like manner, described second group of plaintext coding is used step the most in order
1st respective loops of second group of master key coding of six carries out 32 to the 32nd respective loops and takes turns encryption;
Step 8. encode after 32 take turns encryption in plain text when one group, its 0th to the 3rd coded word is made antitone mapping, it is thus achieved that
Ciphertext encodes;
In described ciphering process, inverible transform is: T is inverible transform in ciphering process, and wherein T is Z32 2To Z32 2One reversible
Conversion, is composited by nonlinear transformation τ and linear change L,
I.e. T (.)=L (τ (.)), wherein: nonlinear transformation τ: it is to be made up of 4 parallel S boxes, if input is A=(a1,
a2, a3, a4)∈(Z 8 2) 4, it is output as B=(b1, b2, b3, b4)∈(Z 8 2) 4, then have:
(b1, b2, b3, b4)=τ(A)=(Sbox(a1), Sbox(a2), Sbox(a3), Sbox(a4))
The output of linear transformation L: nonlinear transformation τ is also the input of linear transformation L, if input is B ∈ Z32 2, then have:
C=L (B)=B (B < < 2) (B < < 10) (B < < 18) (B < < 24), wherein < < i is that 32 bit cyclic move to left i
Position.
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CN201010272420.7A CN101938739B (en) | 2010-09-06 | 2010-09-06 | Encryption method for wireless local area network |
CN201310176066.1A CN103236923B (en) | 2010-09-06 | 2010-09-06 | Safe encryption method for WLAN |
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CN1527531A (en) * | 2003-03-07 | 2004-09-08 | 华为技术有限公司 | Method of realizing data enciphering standard or double data enciphering standard |
CN1845213A (en) * | 2006-03-02 | 2006-10-11 | 西安西电捷通无线网络通信有限公司 | Method for realizing encryption/decryption processing in SMS4 cipher algorithm |
CN101013938A (en) * | 2007-01-12 | 2007-08-08 | 广州市诚毅科技软件开发有限公司 | Encryption method of block cipher |
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US7043017B2 (en) * | 2001-09-13 | 2006-05-09 | Freescale Semiconductor, Inc. | Key stream cipher device |
WO2004107635A2 (en) * | 2003-05-21 | 2004-12-09 | Docomo Communications Laboratories Usa, Inc. | Broadcast encryption using rsa |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN1527531A (en) * | 2003-03-07 | 2004-09-08 | 华为技术有限公司 | Method of realizing data enciphering standard or double data enciphering standard |
CN1845213A (en) * | 2006-03-02 | 2006-10-11 | 西安西电捷通无线网络通信有限公司 | Method for realizing encryption/decryption processing in SMS4 cipher algorithm |
CN101013938A (en) * | 2007-01-12 | 2007-08-08 | 广州市诚毅科技软件开发有限公司 | Encryption method of block cipher |
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