CN103235714A - Method for constructing random sequence by shortest linear shifting register - Google Patents
Method for constructing random sequence by shortest linear shifting register Download PDFInfo
- Publication number
- CN103235714A CN103235714A CN2013101124045A CN201310112404A CN103235714A CN 103235714 A CN103235714 A CN 103235714A CN 2013101124045 A CN2013101124045 A CN 2013101124045A CN 201310112404 A CN201310112404 A CN 201310112404A CN 103235714 A CN103235714 A CN 103235714A
- Authority
- CN
- China
- Prior art keywords
- shift register
- sequence
- equal
- constructing
- random series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The invention discloses a method for constructing random sequence by a shortest linear shifting register. The method comprises five steps: firstly: presetting a finite sequence with a cycle of N, finding the smallest integer n, the nth number of item is not zero, and number of items smaller than n in the sequence is zero; secondly: taking the number of item smaller than or equal to n in the sequence of the first step as a new subsequence; thirdly: appointing n join polynomials with a value of 1, which are corresponding to the new subsequence of the second step, the corresponding series of each multinomial is 0; fourthly: constructing n plus 1 multinomial of linear shifting register by the new subsequence of the second step, and generating sequence multinomial and series with a cycle of n plus 1; fifthly: cycling the forth step, conducting recursive operation, and finally obtaining the shortest linear shifting register with a cycle N. The method provided by the invention occupies small storage cell, and saves hardware resources.
Description
Affiliated technical field
The present invention be directed to present widely used random series, solve the problem that structure generates the linear shift register of arbitrary random series, be specifically related to a kind of method of constructing the line of shortest length shift register of random series.
Background technology
Random series can be used as a kind of signal form, also can be used as a random number.It is the sign indicating number of a class extensive application.For example, in continuous wave radar, can be used as distance measuring signal, in telechirics, can be used as the group synchronization signal, also can be used as noise source and in secret communication, play encryption effect etc.It can also produce that pseudo random number is suitable for and the system simulation of Sun Ji and in digital display circuit as error code testing signal etc.Random series also can be used for spread spectrum, in multi-address system as address signal etc.Random series has many-sided application, so its status is extremely important, to it and research also increasingly extensive and deep.
Linear shift register is a class random bit sequences maker, all is widely used in hardware sequencer and cryptography, also can satisfy low-power consumption or high-speed requirement.Be the random series of N for one-period, need take the shift register with N storage unit usually, just need take a lot of hardware resources in bigger random series of some cycles like this.This in this case, finding a kind of can the generation cycle be that the shortest property shift register of the random series of N just seems particularly important.
Summary of the invention
To achieve these goals, the invention provides a kind of method of constructing the line of shortest length shift register of random series, be divided into following a few step:
The first step: given one-period is the finite sequence a of N
i(0≤i≤N), seek minimum integer and seek nonnegative integer n
0, in the sequence less than n
0Item number be 0.
Second the step. with in the described sequence of the first step less than equaling n
0The item number assignment give a new subsequence d
i(the corresponding item number of 0≤i≤N), wherein f
N0(x) be d
N0Corresponding polynomial expression.
The 3rd step. agreement n
0+ 1 value is 1 connection polynomial expression, with d in the second step described new subsequence
i(0≤i≤n
0) corresponding, the progression of each polynomial expression correspondence is 0.
The 4th step. by described new subsequence structure n of second step
0+ 1 rank linear shift register＜f
N0+1(x), L
N0+1Polynomial expression, as the cycle be n
0+ 1 random series generator polynomial f
N0+1(x) and progression L
N0+1
The 5th step. circulated for the 4th step, carry out recursive operation, calculating is positioned at n
0And the generation linear shift register of the periodic sequence arbitrarily between the N finally obtains linear shift register＜f that the cycle is the sequence of N
N(x), L
N.
Adopt the present invention, obtaining the generation cycle is the line of shortest length shift register of the random series of N, few storage unit that taken of trying one's best, economize on hardware resource.
Embodiment
In conjunction with needs of the present invention, be described below term earlier:
1, q unit Galois field
Suppose that a set F is non-NULL, the member among the F can be called element.Further regulation addition and these two kinds of computings of multiplication in F namely for any two element a and b among the F, can be carried out additive operation and multiplying to them.The result of additive operation note is made a+b, be called they and.Result's note of multiplying is made a*b, is called the long-pending of them.Require any two elements among the F to be still element among the F through the result of additive operation and multiplying simultaneously.Just F is self-styled for additive operation and the multiplying of defined.Simultaneously, following rule is satisfied in the additive operation among the F and multiplying:
(1) for arbitrary element a among the F, b, c has
a+b=b+a
(a+b)+c=a+(b+c)
a*b=b*a
(a*b)*c=a*(b*c)
a*(b+c)=a*b+a*c
(2) there is an element 0 among the F, has character
a+0=a
(3) there is an element-a among the F, has character
a+(-a)=0
(4) there is non-0 an element e among the F, has character
a*e=a
(5) to non-0 element a among any F, there is element a
-1, have character
a*a
-1=e
F is a territory for additive operation and the multiplying of defined so.Further, if the element number among the F is limited q, F just is called q unit Galois field.
2, n level linear feedback shift register
N level linear feedback shift register sequence is by its preceding n item a
0, a
1..., a
N-2, a
N-1With feedback function F (x
1, x
2..., x
N-1, x
nThe c of)=-
1x
n-c
2x
N-1-...-c
nx
1(c
i∈ F
q) definite fully.
3, degeneration polynomial expression
Given Galois field F
qOn polynomial f (x)=1+c
1X+c
2x
2+ ... + c
Lx
LIf it is the highest
c
L=0, claim that so this polynomial expression is what degenerate.
4, connect polynomial expression
Suppose that N is a positive integer, Galois field F
qA last finite sequence
a
0，a
1，a
2，…，a
N-1（1）
Its item number N is called the length of this sequence.Simultaneously also (1) is called one and longly is the q metasequence of N.Supposition again
f(x)=1+c
1x+c
2x
2+…+c
Lx
L（2）
Be F
qOn a polynomial expression, and L=1.Connect polynomial L level linear shift register such as Fig. 2 (Fig. 2 sees Appendix) with f (x) serving as herein, brief note work＜f (x), L 〉.
Do not suppose c herein
LNon-0, that is to say＜f (x), L〉can degenerate.
Further, if
a
k=-(c
1a
k-1+c
2a
k-2+…+c
La
k-L，k=L，L+1,…,N-1 （3）
That is to say＜f (x), L〉from original state (a
0, a
1..., a
L-1) generation (1) of setting out,
Abbreviation＜f (x), L〉generation (1).
After understanding above concept, below the present invention is described in detail.
Appoint to give one long be the q metasequence (1) of N, construct the linear shift register of a progression minimum, i.e. the shortest linear shift register.Be divided into following a few step:
The first step: seek nonnegative integer n
0, calling sequence (1) is satisfied
a
0=a
1=a
2=…=a
n0-1=0,a
n0≠0
Second the step: with in the described sequence of the first step less than equaling n
0The item number assignment give a new subsequence d
i(the corresponding item number of 0≤i≤N), namely
d
0=d
1=d
2=…=d
n0-1=0,d
n0=a
n0
The 3rd step: agreement n
0Individual value is 1 connection polynomial expression, with second the step described new subsequence corresponding, the progression of each polynomial expression correspondence is 0, namely
f
0(x)=f
1(x)=f
2(x)=…=f
n0(x)=1；
L
1=L
2=…=L
n0=0
The 4th step: get any one n0+1 level linear shift register conduct＜f
N0+1(x), L
N0+1,
Value is as follows herein:
f
n0+1(x)=1-d
n0x
n0+1，L
n0+1=n0+1
The 5th step. circulated for the 4th step, calculate the generation linear shift register of the periodic sequence arbitrarily between n0 and N, as f
N0+2(x)=1-d
N0+1x
N0+2, f
N0+3(x)=1-d
N0+2x
N0+3. carry out recursive operation. up to being recycled to f
N(x)=1-d
N-1x
NEnd.
After the 5th step, circulation ended, finally obtain linear shift register＜f that the cycle is the sequence of N
N(x), L
N.
In the above step, suppose＜f
i(x), L
i, i=1,2 ..., n(n
0＜n＜N) try to achieve is to f
n(x) and d
nCan represent with following general formula:
f
n(x)=1+c
n1x+c
n2x
2+…+c
nLnx
Ln
d
n=a
n+c
n1a
n-1+c
n2a
n-2+…+c
nLna
n-Ln
Wherein, if d
n=0,
f
n+1(x)=f
n(x)
If at this moment dn ≠ 0 has m(0≤m≤n) to make
f
n+1(x)=f
n(x)-d
nd
m -1x
n-mf
m(x)
L
n+1=max{L
n，n+1-L
n}
So circulation obtains producing a line of shortest length shift register of (1) at last
<f
N(x)，L
N>
The present invention has provided a kind of method of the shortest generation linear shift register that arbitrary length in the confinement is the q unit random series of N that is configured with, and uses can be the as far as possible few storage unit that takies linear shift register of the method, the economize on hardware resource.
Claims (5)
1. a method of constructing the line of shortest length shift register of random series is characterized in that, comprises following steps:
The first step: given one-period is the finite sequence a of N
i, wherein i seeks minimum integer and seeks nonnegative integer n more than or equal to 0 and smaller or equal to N
0, in the sequence less than n
0Item number be 0.
Second the step. with in the described sequence of the first step less than equaling n
0The item number assignment give a new subsequence d
iCorresponding item number, wherein i is more than or equal to 0 and smaller or equal to N, f
N0(x) be d
N0Corresponding polynomial expression.
The 3rd step. agreement n
0+ 1 value is 1 connection polynomial expression, with d in the second step described new subsequence
iCorresponding, wherein i is more than or equal to 0 and smaller or equal to n
0, the progression of each polynomial expression correspondence is 0.
The 4th step. by described new subsequence structure n of second step
0+ 1 rank linear shift register＜f
N0+1(x), L
N0+1Polynomial expression, as the cycle be n
0+ 1 random series generator polynomial f
N0+1(x) and progression L
N0+1
The 5th step. circulated for the 4th step, carry out recursive operation, calculate and N between the generation linear shift register of periodic sequence arbitrarily, finally obtain linear shift register＜f that the cycle is the sequence of N
N(x), L
N.
2. a kind of method of constructing the line of shortest length shift register of random series as claimed in claim 1 is characterized in that, described the 4th step structure n
0+ 1 rank linear shift register＜f
N0+1(x), L
N0+1In connection polynomial computation formula be f
N0+1(x)=f
N0(x)-d
N0x
N0+1Progression is L
N0+1=n
0+ 1.
3. a kind of method of constructing the line of shortest length shift register of random series as claimed in claim 1 is characterized in that, described the 5th step hypothesis＜f
i(x), L
iTry to achieve, i=1 wherein, 2 ..., n, n is greater than n
0And less than N, then to f
n(x) and d
nCan represent with following general formula:
f
n(x)=1+c
n1x+c
n2x
2+…+c
nLnx
Ln；
d
n=a
n+c
n1a
n-1+c
n2a
n-2+…+c
nLna
n-Ln。
4. a kind of method of constructing the line of shortest length shift register of random series as claimed in claim 3 is characterized in that, wherein, if d
n=0, f
N+1(x)=f
n(x).
5. a kind of method of constructing the line of shortest length shift register of random series as claimed in claim 3 is characterized in that, if d
n≠ 0, at this moment there is m to make
f
n+1(x)=f
n(x)-d
nd
m -1x
n-mf
m(x)；
L
n+1=max{L
n，n+1-L
n};
Wherein m is more than or equal to 0 and smaller or equal to n.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013101124045A CN103235714A (en) | 2013-04-02 | 2013-04-02 | Method for constructing random sequence by shortest linear shifting register |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013101124045A CN103235714A (en) | 2013-04-02 | 2013-04-02 | Method for constructing random sequence by shortest linear shifting register |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103235714A true CN103235714A (en) | 2013-08-07 |
Family
ID=48883759
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013101124045A Pending CN103235714A (en) | 2013-04-02 | 2013-04-02 | Method for constructing random sequence by shortest linear shifting register |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103235714A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106293611A (en) * | 2015-06-03 | 2017-01-04 | 宜春市等比科技有限公司 | A kind of pseudorandom number generation method for spread spectrum communication and channeling |
| CN110058842A (en) * | 2019-03-14 | 2019-07-26 | 西安电子科技大学 | A kind of pseudo-random number generation method and device of structurally variable |
| CN114138336A (en) * | 2021-11-17 | 2022-03-04 | 中国电子科技集团公司第三十研究所 | K-wrong linear approximation method of 0-1 sequence |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4890252A (en) * | 1987-10-29 | 1989-12-26 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Long period pseudo random number sequence generator |
| US20040078408A1 (en) * | 2002-10-18 | 2004-04-22 | Miller David H. | Modular galois-field subfield-power integrated inverter-multiplier circuit for galois-field division over GF(256) |
| CN101019099A (en) * | 2004-09-22 | 2007-08-15 | 诺基亚公司 | Method and device for generating pseudo random numbers |
| CN101187856A (en) * | 2007-12-12 | 2008-05-28 | 四川长虹电器股份有限公司 | Random number generation method |
| CN101355423A (en) * | 2008-09-10 | 2009-01-28 | 四川长虹电器股份有限公司 | Method for generating stream cipher |
| CN102176693A (en) * | 2011-03-04 | 2011-09-07 | 南京航空航天大学 | NRSR (nonlinear ring shifting register) |
-
2013
- 2013-04-02 CN CN2013101124045A patent/CN103235714A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4890252A (en) * | 1987-10-29 | 1989-12-26 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Long period pseudo random number sequence generator |
| US20040078408A1 (en) * | 2002-10-18 | 2004-04-22 | Miller David H. | Modular galois-field subfield-power integrated inverter-multiplier circuit for galois-field division over GF(256) |
| CN101019099A (en) * | 2004-09-22 | 2007-08-15 | 诺基亚公司 | Method and device for generating pseudo random numbers |
| CN101187856A (en) * | 2007-12-12 | 2008-05-28 | 四川长虹电器股份有限公司 | Random number generation method |
| CN101355423A (en) * | 2008-09-10 | 2009-01-28 | 四川长虹电器股份有限公司 | Method for generating stream cipher |
| CN102176693A (en) * | 2011-03-04 | 2011-09-07 | 南京航空航天大学 | NRSR (nonlinear ring shifting register) |
Non-Patent Citations (6)
| Title |
|---|
| MASSEY J L.: "hift-register synthesis and BCH decoding", 《INFORMATION THEORY, IEEE TRANSACTIONS ON》 * |
| 刘元锋等: "基于FPGA生成MD5算法中常数Ti的研究", 《微电子学与计算机》 * |
| 李培刚: "伪随机序列的复杂度研究", 《中国优秀博硕士学位论文全文数据库 (硕士)信息科技辑（半年刊 ）》 * |
| 王旭峰: "进位反馈移位寄存器序列的密码学性质", 《中国优秀博硕士学位论文全文数据库 (硕士)信息科技辑（季刊 ）》 * |
| 胡杏: "变系数反馈移位寄存器序列研究及其软件实现", 《中国优秀硕士学位论文全文数据库信息科技辑（月刊 ）》 * |
| 赵亚涛: "基于多核多线程的梅西算法的研究和实现", 《中国优秀硕士学位论文全文数据库信息科技辑（月刊 ）》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106293611A (en) * | 2015-06-03 | 2017-01-04 | 宜春市等比科技有限公司 | A kind of pseudorandom number generation method for spread spectrum communication and channeling |
| CN110058842A (en) * | 2019-03-14 | 2019-07-26 | 西安电子科技大学 | A kind of pseudo-random number generation method and device of structurally variable |
| CN110058842B (en) * | 2019-03-14 | 2021-05-18 | 西安电子科技大学 | Structure-variable pseudo-random number generation method and device |
| CN114138336A (en) * | 2021-11-17 | 2022-03-04 | 中国电子科技集团公司第三十研究所 | K-wrong linear approximation method of 0-1 sequence |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Jator et al. | Trigonometrically fitted block Numerov type method for y′′= f (x, y, y′) | |
| Pei et al. | Perfect Gaussian integer sequences of arbitrary length | |
| Moree | Numerical semigroups, cyclotomic polynomials, and Bernoulli numbers | |
| Masoodi et al. | An analysis of linear feedback shift registers in stream ciphers | |
| Mohammed et al. | A three step implicit hybrid linear multistep method for the solution of third order ordinary differential equations | |
| CN103235714A (en) | Method for constructing random sequence by shortest linear shifting register | |
| CN104158557A (en) | Parameter estimation method of Gold sequence | |
| CN103441813B (en) | A kind of low associated binary sequence set creation method for cdma system | |
| Scheicher et al. | Digit systems over commutative rings | |
| Mitra | On the properties of pseudo noise sequences with a simple proposal of randomness test | |
| Kim et al. | Linear complexity and autocorrelation of prime cube sequences | |
| Peinado et al. | Improving the period and linear span of the sequences generated by DLFSRs | |
| Weiss | Deducing three gap theorem from rauzy-veech induction | |
| Miyazaki et al. | A study of an automorphism on the logistic maps over prime fields | |
| Yoshida et al. | Some properties of the maximum period on the logistic map over Z 2n | |
| Nishihara et al. | A remark on the computation of cube roots in finite fields | |
| CN108075858B (en) | A kind of generation method and device of ZC sequence | |
| Fujisaki | Correlational properties of the full-length sequences based on the discretized golden mean transformations | |
| Rabago | Solving Higher-Order\(p\)-Adic Polynomial Equations via Newton-Raphson Method | |
| CN107846272B (en) | Device and method for rapidly generating Golden sequence | |
| Witno | A family of sequences generating Smith numbers | |
| Prasad et al. | A construction of matroidal error correcting networks | |
| Krengel | Some constructions of almost-perfect, odd-perfect and perfect polyphase and almost-polyphase sequences | |
| Mandal | Design and analysis of cryptographic pseudorandom number/sequence generators with applications in RFID | |
| Perez | Collatz Conjecture: Is It False? |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130807 |