CN103227214A - Metallization structure of compound semiconductor - Google Patents
Metallization structure of compound semiconductor Download PDFInfo
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- CN103227214A CN103227214A CN2013101309573A CN201310130957A CN103227214A CN 103227214 A CN103227214 A CN 103227214A CN 2013101309573 A CN2013101309573 A CN 2013101309573A CN 201310130957 A CN201310130957 A CN 201310130957A CN 103227214 A CN103227214 A CN 103227214A
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Abstract
The invention discloses a metallization structure of a compound semiconductor, which comprises a compound semiconductor substrate, and a first layer metal film, a second layer metal film, a third layer metal film and an electrode layer metal film which are prepared from the substrate upward sequentially to form the metallization layer structure, wherein the thickness of each metal film is less than 1 micrometer; the total thickness of the metal films is less than 2 micrometers; the first layer metal film is made of a metal material; an eutectic point of the metal material and that of a material of the compound semiconductor substrate are within 150-450 DEG C; the second layer metal film is made of a metal material with activation energy within 150-500kJ/mol; and the third layer metal film is made of a metal material which is matched with the material of the second layer metal film and a material of the electrode layer metal film in two mechanical parameters of hardness and an elasticity modulus. The metallization structure of a compound semiconductor device has a good electrical characteristic and stable mechanical bonding strength.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of metallization structure of compound semiconductor.
Background technology
Along with the continuous development of information technology, the effect that compound semiconductor is brought into play in microelectronics and optoelectronics field is more and more huger.With mercury cadmium telluride (HgCdTe), indium antimonide (InSb), indium gallium arsenic compound semiconductors such as (InGaAs) is that the infrared focal plane array that basic material prepares has become the main flow that current Infrared Detectors develops.This type of infrared focal plane detector has wide application prospect in fields such as target homing, missile warning detection, information scoutings.
InGaAs, InSb are typical III-V compound semiconductors, and HgCdTe is typical group.In semiconductor device technology, each semiconductor device all needs metallization, thereby forms metal and semi-conductive ohmic contact, and to realize good electrical characteristics, the compound semiconductor device that is used for the Infrared Detectors preparation is no exception.But Infrared Detectors can be operated under many rugged environments, and in aerospace space environments such as high pressure, high vacuum, metallization structure may separate with compound semiconductor, causes component failure.Therefore, the metallization structure that is used for Infrared Detectors is proposed stricter requirement, should satisfy the electrology characteristic requirement that can form little Ohmic resistance exactly, satisfied the requirement that can have stable mechanics to contact with compound semiconductor again.
In Sharp Corp, in the patent No. 86108717, pointed out on the compound semiconductor base plate such as a kind of GaAlAs, form titanium film earlier, form the alloy-layer of one deck again with Jin Weizhu.The deficiency of the method is: titanium film is a traditional silicon technology metallization prime coat material commonly used.Titanium film coefficient of linear expansion and silicon, element semiconductors such as germanium coupling, but do not match with the thermal coefficient of expansion of most compounds semi-conducting material, titanium is an insoluble metal in addition, is difficult to and compound semiconductor forms alloy.Though the method can form good Ohmic contact after alloying, the adhesive force between metallization structure and the base plate is bad, and reliability is not high.
Summary of the invention
The invention provides a kind of metallization structure of compound semiconductor, bad in order to the adhesive force between metallization structure and the base plate in the solution prior art, the problem that reliability is not high.
Particularly, the metallization structure of compound semiconductor provided by the invention comprises:
Compound semiconductor substrate, and, form the metallization stratiform structure of compound semiconductor from ground floor metallic film, second layer metal film, three-layer metal film and electrode layer metallic film that compound semiconductor substrate upwards prepares successively;
Wherein, the thickness of each layer metallic film is all less than 1 μ m, and the gross thickness of each layer metallic film is less than 2 μ m; And the material of described ground floor metallic film is the metal material of eutectic point in 150 ℃～450 ℃ scopes with the compound semiconductor substrate material; The material of described second layer metal film is the metal material of activation energy in 150kJ/mol～500kJ/mol scope; The material of described three-layer metal film is the metal material that is complementary on two mechanics parameters of consistency and elasticity modulus with second layer metal thin-film material and electrode layer metallic film material.
Alternatively, in the metallization structure of compound semiconductor of the present invention, the thickness of described three-layer metal film is greater than the thickness of described second layer metal film and described electrode layer metallic film.
Alternatively, in the metallization structure of compound semiconductor of the present invention, the thickness of described ground floor metallic film is 200～6000 dusts; The thickness of described second layer metal film is 100～3000 dusts; The thickness of described three-layer metal film is 200～6000 dusts; The thickness of described electrode layer metallic film is 100～3000 dusts.
Alternatively, in the metallization structure of compound semiconductor of the present invention, the material of described electrode layer metallic film is that conductivity is greater than 3.0 * 10
7Sm
-1, and the stable metal material of chemical property.
Alternatively, in the metallization structure of compound semiconductor of the present invention, the material of described ground floor metallic film is Ni, In, Ge, Al or Au; The material of described second layer metal film is Au, Pt, Ti or Cr; The material of described three-layer metal film is Pd or Ni; The material of described electrode layer metallic film is Au or Pt.
Alternatively, in the metallization structure of compound semiconductor of the present invention, described ground floor metallic film, second layer metal film, three-layer metal film and electrode layer metallic film prepare by ion beam sputtering equipment.
Alternatively, in the metallization structure of compound semiconductor of the present invention, when described ion sputtering equipment prepares each layer metallic film in same vacuum chamber, prepare under the same vacuum degree.
Alternatively, in the metallization structure of compound semiconductor of the present invention, after described each layer of ion beam sputtering equipment sputter metallic film end, carry out vacuum heat; Wherein, during vacuum heat, annealing temperature is 250 ℃～400 ℃, temperature retention time 30min～2h.
Beneficial effect of the present invention is as follows:
The phenomenon that the film base separates appears in the metallization structure that technical scheme of the present invention has been eliminated compound semiconductor, realized that the compound semiconductor metallization structure promptly has good electrology characteristic, has stable mechanical characteristic again, improved the reliability of compound semiconductor device greatly, improved the rate of finished products of Infrared Detectors greatly, simple in structure, good reproducibility.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structure chart of the metallization structure of a kind of compound semiconductor provided by the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
Be operated under many rugged environments in order to solve Infrared Detectors, metallization structure may separate with compound semiconductor, the problem that causes component failure, the invention provides a kind of metallization structure of compound semiconductor, it is by rete design of components, thicknesses of layers design, preferably, also many aspects such as the choice of equipment by the growing metal film and subsequent heat treatment design are carried out technological improvement, the metallization structure of having realized compound semiconductor device had both possessed the good electrical characteristic, possessed stable mechanics bond strength again.Below just be elaborated by the metallization structure of several specific embodiments to compound semiconductor of the present invention.
Embodiment one
The embodiment of the invention provides a kind of metallization structure of compound semiconductor, as shown in Figure 1, comprise: compound semiconductor substrate 110, and, form the metallization stratiform structure of compound semiconductor from ground floor metallic film 120, second layer metal film 130, three-layer metal film 140 and electrode layer metallic film 150 that compound semiconductor substrate 110 upwards prepares successively; Wherein, the thickness of each layer metallic film is all less than 1 μ m, and the gross thickness of each layer metallic film is less than 2 μ m.
Particularly, the main effect of ground floor metallic film 120 is exactly to form good Ohmic contact with compound semiconductor substrate, therefore just need to select a kind of metal material that is easy to form with compound semiconductor alloy, promptly the eutectic point of metal material of Xuan Zeing and compound semiconductor is low can meet the demands.To this, in the embodiment of the invention, the material of choosing the ground floor metallic film for the metal material of eutectic point in 150 ℃～450 ℃ scopes of compound semiconductor substrate material;
The main effect of second layer metal film 130 is not to form alloy-layer with ground floor metallic film 120, but form counterdiffusion with ground floor metallic film 120 and three-layer metal film 140, to improve the bond strength between rete and the substrate, will select the low metal material of activation energy.To this, in the embodiment of the invention, the material of choosing the second layer metal film is the metal material of activation energy in 150kJ/mol to 500kJ/mol scope.
The main effect of three-layer metal film 140 is to prevent the electrode layer metallic film to the second layer metal film diffusion, and to this, the thickness of three-layer metal film is than second layer metal rete and electrode layer metal film bed thickness.In addition, the material selection of three-layer metal film also to realize and first and second layer metallic film and electrode layer metallic film between in the coupling of two mechanics parameters of consistency and elasticity modulus.
The effect of the 4th layer of metallic film 150 is exactly to realize good electrical connection, so select conductivity greater than 3.0 * 10
7Sm
-1, and the stable metal of chemical property.
Embodiment two
The embodiment of the invention provides a kind of metallization structure of compound semiconductor, and structure chart continues as shown in Figure 1, and this embodiment is the angle of choosing from the material of preparation technology, each metal level and thickness, to the further elaboration of embodiment one described metallization structure.
, beneficial in the present embodiment to the expansion of subsequent technique in order to prepare the smooth metallization structure of surface topography, so select to adopt ion beam sputtering equipment to prepare each metal level.
Particularly, when the metallization structure of preparation compound semiconductor, utilize ion beam sputtering equipment on compound semiconductor substrate, bottom-up growth successively:
The ground floor metallic film, optimum thickness 200 to 6000 dusts, optional material can but be not limited to Ni, In, Ge, Al, Au etc.;
The second layer metal film, optimum thickness 100 to 3000 dusts, optional material can but be not limited to Au, Pt, Ti, Cr etc.;
The three-layer metal film, optimum thickness 200 to 6000 dusts, optional material can but be not limited to Pd, Ni etc.;
And, the electrode layer metallic film, optimum thickness 100 to 3000 dusts, optional material can but be not limited to Au and Pt etc.
Above-mentioned ground floor metallic film, second layer metal film, three-layer metal film and electrode layer metallic film all are that ion beam sputtering makes in same vacuum chamber, under the same vacuum degree.
After each metal level sputter preparation finishes, preferably, carry out the vacuum heat operation.When carrying out the vacuum heat operation, the eutectic point of considering ground floor metallic film and compound semiconductor substrate is low, and prevent that again the electrode layer metallic film from crossing the electrology characteristic that extends influence in other metallic diaphragms, therefore during vacuum heat, annealing temperature is difficult for too high, annealing temperature is difficult for long, and it is 250 ℃ to 400 ℃ that present embodiment provides optimum annealing temperature, best temperature retention time 30 minutes to 2 hours.
In sum, the metallization structure of the described compound semiconductor of the embodiment of the invention, eliminated the phenomenon that the film base separates, realized that the compound semiconductor metallization structure promptly has good electrology characteristic, have stable mechanical characteristic again, improved the reliability of compound semiconductor device greatly, improved the rate of finished products of Infrared Detectors greatly, simple in structure, good reproducibility.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (8)
1. the metallization structure of a compound semiconductor, it is characterized in that, comprise: compound semiconductor substrate, and, form the metallization stratiform structure of compound semiconductor from ground floor metallic film, second layer metal film, three-layer metal film and electrode layer metallic film that compound semiconductor substrate upwards prepares successively;
Wherein, the thickness of each layer metallic film is all less than 1 μ m, and the gross thickness of each layer metallic film is less than 2 μ m; The material of described ground floor metallic film is the metal material of eutectic point in 150 ℃～450 ℃ scopes with the compound semiconductor substrate material; The material of described second layer metal film is the metal material of activation energy in 150kJ/mol～500kJ/mol scope; The material of described three-layer metal film is the metal material that is complementary on two mechanics parameters of consistency and elasticity modulus with second layer metal thin-film material and electrode layer metallic film material.
2. the metallization structure of compound semiconductor as claimed in claim 1 is characterized in that, the thickness of described three-layer metal film is greater than the thickness of described second layer metal film and described electrode layer metallic film.
3. the metallization structure of compound semiconductor as claimed in claim 2 is characterized in that, the thickness of described ground floor metallic film is 200～6000 dusts; The thickness of described second layer metal film is 100～3000 dusts; The thickness of described three-layer metal film is 200～6000 dusts; The thickness of described electrode layer metallic film is 100～3000 dusts.
4. the metallization structure of compound semiconductor as claimed in claim 1 is characterized in that, the material of described electrode layer metallic film is that conductivity is greater than 3.0 * 10
7Sm
-1, and the stable metal material of chemical property.
5. as the metallization structure of any described compound semiconductor in the claim 1 to 4, it is characterized in that the material of described ground floor metallic film is Ni, In, Ge, Al or Au; The material of described second layer metal film is Au, Pt, Ti or Cr; The material of described three-layer metal film is Pd or Ni; The material of described electrode layer metallic film is Au or Pt.
6. the metallization structure of compound semiconductor as claimed in claim 1 is characterized in that, described ground floor metallic film, second layer metal film, three-layer metal film and electrode layer metallic film prepare by ion beam sputtering equipment.
7. the metallization structure at compound semiconductor as claimed in claim 6 is characterized in that, when described ion sputtering equipment prepares each layer metallic film in same vacuum chamber, prepare under the same vacuum degree.
8. as the metallization structure of claim 6 or 7 described compound semiconductors, it is characterized in that, after finishing by described each layer of ion beam sputtering equipment sputter metallic film, carry out vacuum heat; Wherein, during vacuum heat, annealing temperature is 250 ℃～400 ℃, temperature retention time 30min～2h.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105633008A (en) * | 2014-11-06 | 2016-06-01 | 中国科学院苏州纳米技术与纳米仿生研究所 | Indium bump preparation method and infrared focal plane array detector |
| CN108624844A (en) * | 2017-03-17 | 2018-10-09 | 株洲中车时代电气股份有限公司 | A kind of wafer rear metallic film and preparation method thereof |
Citations (2)
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| CN1181636A (en) * | 1996-10-03 | 1998-05-13 | 丰田合成株式会社 | Gan Compound semiconductor element and manufacturing method therefor |
| CN203218272U (en) * | 2013-04-16 | 2013-09-25 | 中国电子科技集团公司第十一研究所 | Metallization structure of compound semiconductor |
-
2013
- 2013-04-16 CN CN2013101309573A patent/CN103227214A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1181636A (en) * | 1996-10-03 | 1998-05-13 | 丰田合成株式会社 | Gan Compound semiconductor element and manufacturing method therefor |
| CN203218272U (en) * | 2013-04-16 | 2013-09-25 | 中国电子科技集团公司第十一研究所 | Metallization structure of compound semiconductor |
Non-Patent Citations (3)
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|---|
| H.S.KIM, E.PLIS ET AL.: "N-type ohmic contact on type-ⅡInAs/GaSb strained layer superlattice", 《ELECTRONICS LETTERS》, vol. 44, no. 14, 31 July 2008 (2008-07-31) * |
| 李俊承: "InGaAsSb半导体激光器欧姆接触的研究", 《长春理工大学硕士学位论文》, 30 April 2012 (2012-04-30) * |
| 王英鸿: "半导体激光器欧姆接触工艺的研究", 《长春理工大学硕士学位论文》, 23 March 2013 (2013-03-23), pages 26 - 29 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105633008A (en) * | 2014-11-06 | 2016-06-01 | 中国科学院苏州纳米技术与纳米仿生研究所 | Indium bump preparation method and infrared focal plane array detector |
| CN105633008B (en) * | 2014-11-06 | 2019-04-23 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of preparation method of indium column, infrared focal plane array seeker |
| CN108624844A (en) * | 2017-03-17 | 2018-10-09 | 株洲中车时代电气股份有限公司 | A kind of wafer rear metallic film and preparation method thereof |
| CN108624844B (en) * | 2017-03-17 | 2019-11-12 | 株洲中车时代电气股份有限公司 | A kind of backside of wafer metallic film and preparation method thereof |
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Application publication date: 20130731 |