CN103218268B - A kind of SRAM type FPGA crosstalk verification method - Google Patents
A kind of SRAM type FPGA crosstalk verification method Download PDFInfo
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- CN103218268B CN103218268B CN201310077776.9A CN201310077776A CN103218268B CN 103218268 B CN103218268 B CN 103218268B CN 201310077776 A CN201310077776 A CN 201310077776A CN 103218268 B CN103218268 B CN 103218268B
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Abstract
A kind of SRAM type FPGA crosstalk verification method, realize based on SRAM type FPGA crosstalk demo plant, this device comprises PC, FPGA socket, signal input unit and tunable load electric capacity; The verification method of SRAM type FPGA crosstalk comprises: the cross talk effects between maximum in single I/O-BANK/minimum crosstalk noise checking, adjacent I/O-BANK and the relation of crosstalk and output switching activity speed, input signal edge and load capacitance; In proof procedure, by PC for FPGA to be verified provides different configuration files, and under different test condition, the noise size detected on the disturbed line in FPGA to be verified realizes the checking of FPGA device at crosstalk noise.
Description
Technical field
The present invention relates to a kind of SRAM type FPGA crosstalk verification method, belong to the application verification technical field of FPGA.
Background technology
Along with the development of semiconductor technology, the integrated level of SRAM type FPGA constantly increases.Thus the I/O port of FPGA is on the increase and the more crypto set that distributes on the one hand, makes to be more prone to mutual interference between I/O; On the other hand due to power consumption and heat radiation, the operating voltage step-down of FPGA, makes I/O more responsive to interference.Therefore in the application process of FPGA, as easy as rolling off a log generation crosstalk noise between I/O, and can produce and affect comparatively significantly.Therefore, the crosstalk noise between the I/O of FPGA the device own and degrees of tolerance of crosstalk noise is become to the standard weighing FPGA device quality.
Summary of the invention
The technical matters that the present invention solves is: overcome the deficiencies in the prior art, provide a kind of SRAM type FPGA crosstalk verification method, the crosstalk noise that can realize FPGA device itself can produce and can bear is verified.
The technical scheme that the present invention takes is:
A kind of SRAM type FPGA crosstalk verification method, the crosstalk noise comprised between the checking of maximum in single I/O-BANK/minimum crosstalk noise, adjacent I/O-BANK is verified and the influence factor of crosstalk is verified;
In described single I/O-BANK, maximum/minimum crosstalk noise checking comprises the steps:
(1) I/O-BANK of SRAM type FPGA is chosen;
(2) be interfering line by adjacent with ground wire I/O port arrangement in the I/O-BANK selected, described interfering line is output port and continues to export square wave;
(3) other I/O port in described I/O-BANK is configured to static low level signal, one by one as disturbed line;
(4) amplitude of crosstalk noise on all disturbed lines is tested and record;
(5) all disturbed lines are configured to static high level signal one by one, again test the amplitude of crosstalk noise on all disturbed lines and record;
(6) will being interfering line with exporting the adjacent I/O port arrangement of driving power supply line in described I/O-BANK, continuing to export square wave, repeated execution of steps (3) ~ (5);
(7) in described I/O-BANK, interfering line is configured in remotely with the position of power pin, repeated execution of steps (3) ~ (5) again;
(8) according to the amplitude of crosstalk noise on the disturbed line recorded in step (5) ~ (7), statistics draws maximum in described I/O-BANK/minimum crosstalk noise;
Crosstalk noise checking between described adjacent I/O-BANK comprises the steps:
A () selects two adjacent I/O-BANK in SRAM type FPGA;
B () selects an I/O port respectively in described two I/O-BANK, and it is nearest to make between two I/O ports;
C () is in two I/O ports, using one of them as interfering line, be configured to output port and continue to export square wave, another is as disturbed line, when described disturbed line is configured to static low level voltage and static high level voltage, measure the crosstalk noise amplitude on disturbed line respectively;
D () by the location swap of the interfering line in step (c) and disturbed line, then measures the crosstalk noise amplitude on disturbed line;
E two I/O-BANK that () selects other adjacent, repeated execution of steps (b) ~ (d), complete the crosstalk noise checking in selected SRAM type FPGA between all two adjacent I/O-BANK;
The influence factor checking of described crosstalk comprises the steps:
(aa) in an I/O-BANK of SRAM type FPGA, select remotely with two I/O ports of power pin respectively as interfering line and disturbed line, interfering line is configured to output port and continues to export square wave;
(bb) adjust the output switching activity speed that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(cc) adjust the load capacitance size that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(dd) interfering line is configured to input port, the edge rate of input signal on adjustment interfering line, keep the condition of static low level and static high level voltage respectively at disturbed line under, detects the amplitude of crosstalk noise on disturbed line and record.
The influence factor of described crosstalk comprises output switching activity speed, input signal edge rate and load capacitance size.
The present invention's beneficial effect is compared with prior art:
(1) the invention provides a SRAM type FPGA crosstalk verification method, according to the needs of device application checking, adjustment and measurement can be carried out to Verification Project or method at any time.
(2) the present invention can be general for the SRAM type FPGA of domestic different factories different size, and also can be general for the SRAM type FPGA of external Xilinx company different size, can to compare test to the crosstalk situation of different factory easily.
Accompanying drawing explanation
Fig. 1 is maximum in single I/O-BANK/minimum crosstalk noise verification method schematic diagram;
Fig. 2 is the verification method schematic diagram of the cross talk effects between adjacent I/O-BANK;
Fig. 3 is the influence factor checking schematic diagram of crosstalk;
Fig. 4 is demo plant schematic diagram.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described in detail.
A kind of SRAM type FPGA crosstalk verification method that the present invention proposes carries out based on such as lower device:
As shown in Figure 4, SRAM type FPGA crosstalk demo plant comprises: PC, FPGA socket, signal input unit and tunable load electric capacity;
PC: provide configuration file for FPGA to be verified and configure FPGA by JTAG mode;
FPGA socket: for FPGA to be verified and demo plant provide interface;
Signal input unit: the input signal providing the edge rise/fall time adjustable for FPGA to be verified;
Tunable load electric capacity: the load capacitance providing size adjustable for FPGA to be verified.
SRAM type FPGA crosstalk verification method of the present invention, the crosstalk noise comprised between the checking of maximum in single I/O-BANK/minimum crosstalk noise, adjacent I/O-BANK is verified and the influence factor of crosstalk is verified; The influence factor of crosstalk comprises output switching activity speed, input signal edge rate and load capacitance size.
Fpga chip has a lot of I/O port, and in order to convenient management, all I/O ports are divided into some I/O-BANK, the I/O-BANK of every a fpga chip determines when chip dispatches from the factory.
As shown in Figure 1, in single I/O-BANK, maximum/minimum crosstalk noise checking comprises the steps:
(1) I/O-BANK of SRAM type FPGA is chosen;
(2) be interfering line by adjacent with ground wire I/O port arrangement in the I/O-BANK selected, described interfering line is output port and continues to export square wave;
(3) other I/O port in described I/O-BANK is configured to static low level signal, one by one as disturbed line;
(4) amplitude of crosstalk noise on all disturbed lines is tested and record by oscillograph;
(5) all disturbed lines are configured to static high level signal one by one, again test the amplitude of crosstalk noise on all disturbed lines and record;
(6) will being interfering line with exporting the adjacent I/O port arrangement of driving power supply line in described I/O-BANK, continuing to export square wave, repeated execution of steps (3) ~ (5);
(7) in described I/O-BANK, interfering line is configured in remotely with the position of power pin, repeated execution of steps (3) ~ (5) again;
(8) according to the amplitude of crosstalk noise on the disturbed line recorded in step (5) ~ (7), statistics draws maximum in described I/O-BANK/minimum crosstalk noise;
As shown in Figure 2, the crosstalk noise checking between adjacent I/O-BANK comprises the steps:
A () selects two adjacent I/O-BANK in SRAM type FPGA;
B () selects an I/O port respectively in described two I/O-BANK, and it is nearest to make between two I/O ports;
C () is in two I/O ports, using one of them as interfering line, be configured to output port and continue to export square wave, another is as disturbed line, when described disturbed line is configured to static low level voltage and static high level voltage, measure the crosstalk noise amplitude on disturbed line respectively;
D () by the location swap of the interfering line in step (c) and disturbed line, then measures the crosstalk noise amplitude on disturbed line;
E two I/O-BANK that () selects other adjacent, repeated execution of steps (b) ~ (d), complete the crosstalk noise checking in selected SRAM type FPGA between all two adjacent I/O-BANK;
As shown in Figure 3, the influence factor checking of crosstalk comprises the steps:
(aa) in an I/O-BANK of SRAM type FPGA, select remotely with two I/O ports of power pin respectively as interfering line and disturbed line, interfering line is configured to output port and continues to export square wave;
(bb) adjust the output switching activity speed that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(cc) adjust the load capacitance size that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(dd) interfering line is configured to input port, the edge rate of input signal on adjustment interfering line, keep the condition of static low level and static high level voltage respectively at disturbed line under, detects the amplitude of crosstalk noise on disturbed line and record.
The content be not described in detail in instructions of the present invention belongs to the known technology of professional and technical personnel in the field.
Claims (2)
1. a SRAM type FPGA crosstalk verification method, is characterized in that: the crosstalk noise comprised between the checking of maximum in single I/O-BANK/minimum crosstalk noise, adjacent I/O-BANK is verified and the influence factor of crosstalk is verified;
In described single I/O-BANK, maximum/minimum crosstalk noise checking comprises the steps:
(1) I/O-BANK of SRAM type FPGA is chosen;
(2) be interfering line by adjacent with ground wire I/O port arrangement in the I/O-BANK selected, described interfering line is output port and continues to export square wave;
(3) other I/O port in described I/O-BANK is configured to static low level signal, one by one as disturbed line;
(4) amplitude of crosstalk noise on all disturbed lines is tested and record;
(5) all disturbed lines are configured to static high level signal one by one, again test the amplitude of crosstalk noise on all disturbed lines and record;
(6) will being interfering line with exporting the adjacent I/O port arrangement of driving power supply line in described I/O-BANK, continuing to export square wave, repeated execution of steps (3) ~ (5);
(7) in described I/O-BANK, interfering line is configured in remotely with the position of power pin, repeated execution of steps (3) ~ (5) again;
(8) according to the amplitude of crosstalk noise on the disturbed line recorded in step (5) ~ (7), statistics draws maximum in described I/O-BANK/minimum crosstalk noise;
Crosstalk noise checking between described adjacent I/O-BANK comprises the steps:
A () selects two adjacent I/O-BANK in SRAM type FPGA;
B () selects an I/O port respectively in described two I/O-BANK, and it is nearest to make between two I/O ports;
C () is in two I/O ports, using one of them as interfering line, be configured to output port and continue to export square wave, another is as disturbed line, when described disturbed line is configured to static low level voltage and static high level voltage, measure the crosstalk noise amplitude on disturbed line respectively;
D () by the location swap of the interfering line in step (c) and disturbed line, then measures the crosstalk noise amplitude on disturbed line;
E two I/O-BANK that () selects other adjacent, repeated execution of steps (b) ~ (d), complete the crosstalk noise checking in selected SRAM type FPGA between all two adjacent I/O-BANK;
The influence factor checking of described crosstalk comprises the steps:
(aa) in an I/O-BANK of SRAM type FPGA, select remotely with two I/O ports of power pin respectively as interfering line and disturbed line, interfering line is configured to output port and continues to export square wave;
(bb) adjust the output switching activity speed that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(cc) adjust the load capacitance size that interfering line outputs signal, keep the condition of static low level voltage and static high level voltage respectively at disturbed line under, measure the amplitude of crosstalk noise on disturbed line and record;
(dd) interfering line is configured to input port, the edge rate of input signal on adjustment interfering line, keep the condition of static low level and static high level voltage respectively at disturbed line under, detects the amplitude of crosstalk noise on disturbed line and record.
2. a kind of SRAM type FPGA crosstalk verification method according to claim 1, is characterized in that: the influence factor of described crosstalk comprises the output switching activity speed of I/O port, the input signal edge rate of I/O port and the load capacitance size of I/O port.
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