CN103138693B - Voltage amplifying system - Google Patents

Abstract

Disclosed is a voltage amplification system comprising: an input amplification stage having a first input terminal receiving a first input signal, a second input terminal receiving a second input signal, and a first output terminal; an output amplifier stage coupled between a first potential and a second potential, having a first input coupled to a first output of the input amplifier stage and an output providing a system output signal; and a charge-discharge path, a first input end of which is coupled to the first input end of the input amplifier stage, a second input end of which is coupled to the second input end of the input amplifier stage, and a first output end of which is coupled to the first input end of the output amplifier stage, wherein when a difference between the first input signal and the second input signal exceeds a first threshold value larger than zero, an output end of the charge-discharge path is switched from a high-impedance state to an absorption state or a current supply state so as to improve a slew rate of the system output signal.

Description

Voltage amplification system

Technical field

Embodiments of the invention are related to electronic-circuit device, are more specifically still not exclusively to rapid translating work( The voltage amplification system of energy.

Background technology

Amplifier plays key player in the application such as analog-digital converter and power integrated circuit.According to tradition, such as scheme Voltage amplification system 100A shown in 1A, can be divided into two-stage amplifier, input amplifier stage 101, have first input end, Second input and the first outfan, its first input end receives the first input signal IN1, and it is defeated that its second input receives second Enter signal IN2, difference VIN12 of the first input signal IN1 and the second input signal IN2 is amplified by input amplifier stage 101, defeated at it Going out end provides the first output signal VO1.Output amplifier stage 102, is coupled between the first potential V1 and the second potential V2, has One input and system output, its first input end is coupled to the first outfan of input amplifier stage 101, and its outfan provides System output signal VOUT.Output amplifier stage 102 example and without limitation be used for provide larger electric current with driving load.As figure Voltage amplification system 100B shown in 1B, inputs amplifier stage 101 in some embodiments and also has the second outfan, provide second Output signal VO2.Correspondingly, output amplifier stage 102 also has the second input, defeated with the second of receives input amplifier stage 101 Go out signal VO2.Undergoing mutation when input signal, (the first input signal IN1 mutation or the mutation of the second input signal IN2 lead to the Difference VIN12 of one input signal IN1 and the second input signal IN2 is mutated) when it is desirable to system output signal VOUT also can ring rapidly Should.But, based on the reason the example below is unrestricted, the system output signal VOUT of output amplifier stage 102 generally cannot be fast Speed change.(1) because the transistor of output amplifier stage 102 typically requires offer larger current to drive high power load, thus defeated The input going out amplifier stage 102 generally has larger electric capacity (such as grid capacitance or trap electric capacity)；(2) output amplifier stage 102 The first input stage and the electric capacity of system output amplifier stage (grid of such as output transistor and drain electrode between) there is Miller (miller) effect；(3) generally carry out loop compensation in one larger capacitance of first input end coupling of output amplifier stage 102； (4) the input charging current ability of amplifier stage 101 and/or the reason such as discharge current is limited in one's ability.

Fig. 1 C illustrates that a specific dual-stage amplifier 100C, dual-stage amplifier 100C include inputting amplifier stage 101 and defeated Go out amplifier stage 102 and compensating electric capacity C1.Input amplifier stage 101 includes, and transistor N1 is in order to provide bias current, transistor N4 With N3 (a group to pipe) in order to receive the first input signal IN1 and the second input signal IN2, transistor P1 and P2 (a group to pipe) As active load and provide the first output signal VO1；Output amplifier stage 102 includes, and transistor P3 is based on input amplifier stage 101 Output signal VO1 drive external load, transistor N2 is as the active load of transistor P3；Compensating electric capacity C1 is coupled in crystal Between the grid of pipe P3 and drain electrode.When the first input signal IN1 increases suddenly it is desirable to system output signal VOUT also becomes therewith Greatly.But, the bias current by transistor N1 is limited, and the compensating electric capacity C1 velocity of discharge is slow, thus have impact on compensation electricity Hold the speed of the change in voltage of C1 other end (system output).The switching rate how improving amplifier is art technology The difficult problem that personnel face.

Content of the invention

In view of one or more problems of the prior art, there is provided a kind of voltage amplification system, improve conversion speed Rate.

The invention provides a kind of voltage amplification system, including：Input amplifier stage, has first input end, the second input End and the first outfan, its first input end receives the first input signal, and its second input receives the second input signal；Output Amplifier stage, is coupled between the first potential and the second potential, has first input end and outfan, and its first input end is coupled to First outfan of described input amplifier stage, its outfan provides system output signal；And charge and discharge path, there is the first input End, the second input and the first outfan, its first input end is coupled to the first input end of described input amplifier stage, and it second Input is coupled to the second input of described input amplifier stage, and its first outfan is coupled to the first of described output amplifier stage Input, when the difference of described first input signal and described second input signal exceeds more than zero first threshold, described fills The outfan putting path is converted to absorption by high-impedance state or provides electric current.

A kind of voltage amplification system, including, input amplifier stage, there is first input end, the second input, the first outfan With the second outfan, its first input end reception the first input signal, its second input receives the second input signal；Output is put Big level, is coupled between the first potential and the second potential, has first input end, the second input and outfan, and it is first defeated Enter the first outfan that end is coupled to described input amplifier stage, its second input is coupled to the second defeated of described input amplifier stage Go out end, its outfan provides system output signal, including, the first power tube, there is first end, the second end and control end, it the One end is coupled to or is configured to the outfan of described output amplifier stage, and its second end is coupled to described first potential, its control End be coupled to or be configured to described input amplifier stage first input end, described first power tube include nmos pass transistor or NPN bipolar transistor；Second power tube, has first end, the second end and control end, and its first end is coupled to or is configured to The outfan of described output amplifier stage, its second end is coupled to described second potential, and its control end is coupled to or is configured to described Second input of input amplifier stage, described second power tube includes PMOS transistor or PNP bipolar transistor；And fill Put path, there is first input end, the second input, the first outfan and the second outfan, its first input end is coupled to institute State the first input end of input amplifier stage, its second input is coupled to the second input of described input amplifier stage, and it first Outfan is coupled to the first input end of described output amplifier stage, and its second outfan is coupled to the second of described output amplifier stage Input, when the difference of described first input signal and described second input signal exceeds more than zero first threshold, described fills Put path to the first input end of described output amplifier stage and the second input repid discharge；When described second input signal and institute State the first input signal difference be more than zero Second Threshold when, the first input end to described output amplifier stage for the described charge and discharge path With the second input quick charge.

The voltage amplification system that the present invention provides can be very good to improve the switching rate of amplifier.

Brief description

Describe the specific embodiment of the present invention below with reference to the accompanying drawings in detail, wherein identical reference represents identical Part or feature.

Figure 1A～1C illustrates the schematic circuit diagram of existing voltage amplification system 100A, 100B and 100C；

Fig. 2 illustrates the schematic circuit diagram of voltage amplification system 200 according to an embodiment of the invention；

Fig. 3 A～3D illustrates voltage amplification system 300A, 300B according to an embodiment of the invention, 300C and 300D Schematic circuit diagram；

Fig. 4 A～4B illustrates the schematic circuit diagram of voltage amplification system 400A according to an embodiment of the invention and 400B；

Fig. 5 A～5B illustrates the schematic circuit diagram of voltage amplification system 500A according to an embodiment of the invention and 500B；

Fig. 6 A～6B illustrates the schematic circuit diagram of voltage amplification system 600A according to an embodiment of the invention and 600B；

Fig. 7 A～7D illustrates voltage amplification system 700A, 700B according to an embodiment of the invention, 700C and 700D Schematic circuit diagram；

Fig. 8 illustrates the schematic circuit diagram of voltage amplification system 800 according to an embodiment of the invention；

Fig. 9 illustrates the schematic circuit diagram of voltage amplification system 900 according to an embodiment of the invention；

Figure 10 illustrates the schematic circuit diagram of voltage amplification system 1000 according to an embodiment of the invention；

Figure 11 illustrates the schematic circuit diagram of voltage amplification system 1100 according to an embodiment of the invention；

Figure 12 illustrates the schematic circuit diagram of voltage amplification system 1200 according to an embodiment of the invention；

Figure 13 illustrates the schematic circuit diagram of voltage amplification system 1300 according to an embodiment of the invention；

Figure 14 illustrates the schematic circuit diagram of voltage amplification system 1400 according to an embodiment of the invention.

Specific embodiment

Specific embodiment below represents the exemplary embodiment of the present invention, and substantially merely illustrative explanation rather than Limit.In the following description, in order to provide thorough understanding of the present invention, a large amount of specific detail are elaborated.However, for ability Domain those of ordinary skill it is evident that：These specific detail are optional for the present invention.In other instances, In order to avoid obscuring the present invention, do not specifically describe known circuit, material or method.

In the description, refer to that " embodiment " or " embodiment " mean with reference to specific described by this embodiment Feature, structure or characteristic are included at least one embodiment of the present invention.Term " in one embodiment " is in description In each position occur not all referring to identical embodiment, be not mutually exclusive other embodiment or variable enforcement Example.All features disclosed in this specification, or disclosed all methods or during step, except mutually exclusive feature And/or beyond step, all can combine by any way.Additionally, it should be understood by one skilled in the art that provided herein Diagram is provided to descriptive purpose, and diagram is not necessarily drawn to scale.It should be appreciated that when title " element " " connects Arrive " or during " coupled " to another element, it can be directly connected or coupled to another element or there may be intermediary element. On the contrary, when claiming element " being directly connected to " or " being directly coupled to " another element, there is not intermediary element.Identical accompanying drawing mark Note instruction identical element.When claiming " element " " reception " a certain signal, can make to directly receive it is also possible to pass through switch, electricity Resistance, level displacement shifter, signal processing unit etc. receive.Term "and/or" used herein includes one or more correlations and lists Project any and all combination.

Fig. 2 illustrates the schematic circuit diagram of voltage amplification system 200 according to an embodiment of the invention.Voltage amplification system 200 include inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 201.

Charge and discharge path 201 has first input end, the second input and the first outfan, and its first input end is coupled to defeated Enter the first input end of amplifier stage 101, its second input is coupled to the second input of input amplifier stage 101, it is first defeated Go out the first input end that end is coupled to output amplifier stage 102, when the difference of the first input signal IN1 and the second input signal IN2 When VIN12 exceeds more than zero first threshold VTH1, charge and discharge path 201 to the first input end quick charge of output amplifier stage or Person discharges, to improve the switching rate of system output signal VOUT.In another embodiment, charge and discharge path 201 is acceptable When difference VIN21 of the second input signal IN2 and the first input signal IN1 exceeds more than zero Second Threshold VTH2, to output The first input end repid discharge of amplifier stage 102 or charging, to improve the switching rate of system output signal VOUT.

According to one embodiment of present invention, as shown in Figure 3A, output amplifier stage 102 includes low side transistors QL (such as Nmos pass transistor or NPN bipolar transistor), there is first end, the second end and the control end (leakage of corresponding nmos pass transistor Pole, source electrode and grid, or the colelctor electrode of NPN bipolar transistor, emitter stage and base stage), its first end is coupled to or joins It is set to the outfan of output amplifier stage 102, its second end is coupled to the first potential V1, its control end is coupled to or is configured to defeated Go out first output signal VO1 with receives input amplifier stage 101 for the input of amplifier stage 102.Because low side transistors are generally used In offer larger current, therefore commonly referred to as power tube.It is assumed that the first input end of input amplifier stage 101 is voltage amplification system The in-phase end (positive input terminal) of 300A, the second input of input amplifier stage 101 are that the end of oppisite phase of voltage amplification system 300A is (negative Input), when the first input signal IN1 is more than the second input signal IN2, system output signal VOUT can raise (positive turn Change).Now, charge and discharge path 201 monitors the first input signal IN1 and the second input signal IN2, when the anode first of amplifier is defeated When entering difference VIN12 of signal IN1 and the second input signal IN2 and being more than first threshold VTH1, the outfan of charge and discharge path 201 is low The control end of side transistor QL provides a repid discharge passage so as to the rapid reduction of grid voltage (or base voltage), low Side transistor QL quickly ends (shutoff) so that drain electrode (or colelctor electrode) voltage of low side transistors QL can quickly raise, Thus improving the forward conversion speed of system output signal VOUT.Difference when the first input signal IN1 and the second input signal IN2 When VIN12 is less than first threshold VTH1, the outfan of charge and discharge path 201 neither discharges, and does not also charge, to avoid to voltage amplification System 300A introduces error.In one embodiment, when the first input signal IN1 is little with difference VIN12 of the second input signal IN2 When first threshold VTH1, the outfan of charge and discharge path 201 is in high-impedance state, to avoid affecting the first of input amplifier stage 101 Output signal VO1.In one embodiment, the electricity of the outfan (absorb or provide) of the charge and discharge path 201 under high-impedance state Stream very little is hence it is evident that less than the bias current inputting amplifier stage 101, e.g., less than input the half of the bias current of amplifier stage 101. In one embodiment, the outfan of the charge and discharge path 201 under high-impedance state provides or the electric current of absorption is less than 10 microamperes.? In one embodiment, the outfan of the charge and discharge path 201 under high-impedance state absorbs or the electric current of offer is essentially 0 microampere. In other examples, when difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 When, the outfan of charge and discharge path 201 can provide or absorb certain electric current, as long as this electric current is less than input amplifier stage 101 Absorption electric current or current capacity is provided, the outfan of charge and discharge path 201 provides or the electric current that absorbs just can be transfused to Amplifier stage 101 absorbs or supplements, thus avoiding circuit maloperation.

When the second input signal IN2 is more than the first input signal IN1, system output signal VOUT can reduce that (negative sense turns Change).Now, charge and discharge path 201 monitors the first input signal IN1 and the second input signal IN2, and second when input amplifier stage is defeated Enter signal IN2 and the first input signal IN1 difference VIN21 exceed more than zero Second Threshold VTH2 when, charge and discharge path 201 defeated The control end going out end for low side transistors QL provides a quick charge passage so as to grid voltage (or base voltage) is rapid Raise, low side transistors QL fast conducting and with larger current to load discharge so that low side transistors QL drain electrode (or collection Electrode) voltage can quickly reduce, thus improve the negative sense switching rate of system output signal VOUT.In an embodiment In, when difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1, and when the second input (in other words, first input signal IN1 Jie when difference VIN21 of signal IN2 and the first input signal IN1 is less than Second Threshold VTH2 In the difference of Second Threshold VTH2 " the second input signal IN2 with " and " the second input signal IN2 and first threshold VTH1 sum " it Between), the outfan of charge and discharge path 201 is in high-impedance state, with avoid affecting the first output signal VO1 of input amplifier stage 101 or The first input end of person's output amplifier stage 102.

When the negative input end for voltage amplification system 300A for the first input end, the input amplifier stage 101 that input amplifier stage 101 The second input be voltage amplification system 300A positive input terminal when, the first input signal IN1 and the second input signal IN2 it When difference VIN12 is more than first threshold VTH1, the outfan of charge and discharge path 201 provides one soon for the control end of low side transistors QL Fast charge tunnel, low side transistors QL fast conducting and with larger current to load discharge so that the drain electrode of low side transistors QL (or colelctor electrode) voltage can quickly reduce, thus improve the negative sense switching rate of system output signal VOUT.Second is defeated When entering difference VIN21 of signal IN2 and the first input signal IN1 and being more than Second Threshold VTH2, the outfan of charge and discharge path 201 is low The control end of side transistor QL provides a repid discharge passage so as to the rapid reduction of grid voltage (or base voltage), low Side transistor QL quickly ends (shutoff) so that drain electrode (or colelctor electrode) voltage of low side transistors QL can quickly raise, Thus improving the forward conversion speed of system output signal VOUT.First threshold VTH1 and Second Threshold VTH2 can be equal, Can be unequal.In the foregoing description, charge and discharge path 201 both can be to the first input end quick charge of output amplifier stage 102 To improve its negative sense conversion rate it is also possible to the first input end repid discharge to output amplifier stage 102 turns to improve its forward direction Change speed.In certain embodiments, charge and discharge path 201 can only to the first input end quick charge of output amplifier stage 102 with Improve its negative sense conversion rate, and cannot be to the first input end repid discharge of output amplifier stage 102.In other embodiment In, charge and discharge path 201 can only to the first input end repid discharge of output amplifier stage 102 to improve its positive conversion rate, And cannot be to the first input end quick charge of output amplifier stage 102.These are replaced, deform, other implementations are equally applicable With following examples.

According to one embodiment of present invention, as shown in Figure 3 B, low side transistors QL of output amplifier stage 102 can also be used PMOS transistor or PNP bipolar transistor are realized.It is (corresponding that low side transistors QL have first end, the second end and control end The source electrode of PMOS transistor, drain and gate, or the emitter stage of PNP bipolar transistor, colelctor electrode and base stage), its source electrode (or emitter stage) is coupled to or is configured as output to the outfan of amplifier stage 102, and its drain electrode (or colelctor electrode) is coupled to the One potential V1, its control end is coupled to or is configured as output to the first input end of amplifier stage 102 with receives input amplifier stage First output signal VO1.It is assumed that the first input end of input amplifier stage 101 is the positive input terminal, defeated of voltage amplification system 300A The second input entering amplifier stage 101 is the negative input end of voltage amplification system 300A, when the first input signal IN1 is more than second During input signal IN2, system output signal VOUT can raise.Now, charge and discharge path 201 monitors the first input signal IN1 and the Two input signals IN2, when anode first input signal IN1 of amplifier and difference VIN12 of the second input signal IN2 are more than first During threshold value VTH1, the outfan of charge and discharge path 201 provides one quickly to fill passage so as to grid for the control end of low side transistors QL Pole tension (or base voltage) raises so that low side transistors QL are quickly ended rapidly, and then makes low side transistors QL Source electrode (or emitter stage) voltage can quickly raise, thus improve forward conversion speed.When the second input signal IN2 is more than During the first input signal IN1, system output signal VOUT can reduce.Charge and discharge path 201 monitoring is when the first input signal IN1 and the Two input signals IN2, when difference VIN21 of the second input signal IN2 and the first input signal IN1 is more than Second Threshold VTH2, The outfan of charge and discharge path 201 for low side transistors QL control end provide a repid discharge passage so as to grid voltage (or Person's base voltage) rapid reduce, low side transistors QL fast conducting with high current to load discharge so that low side transistors QL Source electrode (or emitter stage) voltage can quickly reduce, thus improve negative sense switching rate.

According to one embodiment of present invention, as shown in Figure 3 C, output amplifier stage 102 includes：High-side transistor QH is (such as PMOS transistor or PNP bipolar transistor), there is first end, the second end and the control end (leakage of corresponding PMOS transistor Pole, source electrode and grid, or the colelctor electrode of PNP bipolar transistor, emitter stage and base stage), its first end is coupled to or joins It is set to the outfan of output amplifier stage 102, its second end is coupled to the second potential V2, its control end is coupled to or is configured to defeated Go out the first outfan VO1 with receives input amplifier stage for the first input end of amplifier stage 102.It is assumed that the of input amplifier stage 101 One input is the positive input terminal of voltage amplification system 300A, the second input of input amplifier stage 101 is voltage amplification system The negative input end of 300A, when the first input signal IN1 is more than the second input signal IN2, system output signal VOUT can raise (positive conversion).Now, charge and discharge path 201 monitors the first input signal IN1 and the second input signal IN2, when amplifier just When holding difference VIN12 of the first input signal IN1 and the second input signal IN2 to be more than first threshold VTH1, charge and discharge path 201 defeated The control end going out end for low side transistors QL provides a repid discharge passage so as to grid voltage (or base voltage) is rapid Reduce, low side transistors QL fast conducting so that drain electrode (or colelctor electrode) voltage of low side transistors QL can quickly raise, Thus improving the forward conversion speed of system output signal VOUT.It is more than the first input signal when the second input signal IN2 IN1, system output signal VOUT can reduce (negative sense conversion).Now, charge and discharge path 201 monitoring when the first input signal IN1 with Second input signal IN2, when input amplifier stage the second input signal IN2 and the first input signal IN1 difference VIN21 more than the During two threshold values VTH2, the outfan of charge and discharge path 201 provides a quick charge passage for the control end of low side transistors QL, makes Its grid voltage (or base voltage) is rapid to be raised, and the quick cut-off of low side transistors QL is so that the drain electrode of low side transistors QL (or colelctor electrode) voltage can quickly reduce, thus improve the negative sense switching rate of system output signal VOUT.

As shown in Figure 3 D, the high-side transistor QH that output amplifier stage 102 according to an embodiment of the invention includes Nmos pass transistor or NPN bipolar transistor can be included, the first transistor Q2 has first end, the second end and control end (source electrode of corresponding nmos pass transistor, drain and gate, or the emitter stage of NPN bipolar transistor, colelctor electrode and base stage), its Source electrode is coupled to or is configured as output to the outfan of amplifier stage 102, and its drain electrode is coupled to the second potential V2, and its control end couples To or be configured as output to the first outfan VO1 with receives input amplifier stage for the first input end of amplifier stage 102.Its work is former Reason may be referred to the description to system 300B shown in Fig. 3 B and voltage amplification system 300C shown in Fig. 3 C.

Fig. 4 A illustrates the schematic circuit diagram of voltage amplification system 400A according to an embodiment of the invention, voltage amplification system System 400A includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 410.Wherein, charge and discharge path 410 includes the first mistake Adjust comparator 401 and first switch 402.

First imbalance comparator 401 has first input end, the second input and outfan, and its first input end is coupled to To receive the first input signal IN1, its second input is coupled to input amplifier stage to the first input end of input amplifier stage 101 101 the second input receives the second input signal IN2, and outfan carries first switch signal SW1, when the first input signal IN1 When exceeding first threshold VTH1 with difference VIN12 of the second input signal IN2, the voltage of the outfan of the first imbalance comparator 401 Overturn, overturn as significant level from inactive level；First switch 402, has first end, the second end and control end, and it One end is coupled to the first input end of output amplifier stage 102, and its second end is coupled to the first potential V1, and its control end is coupled to The outfan of one imbalance comparator 401.

If using NMOS as switch, low level is exactly inactive level, and high level is then significant level；On the contrary, If using PMOS as switch, low level is exactly significant level, and high level is then inactive level.Class according to switch Type, reasonably selects a comparator 401 first input end/the second input as positive/negative input or positive negative input, Or the rear class series connection odd number phase inverter in comparator, it is possible to obtain the significant level in accordance with the object of the invention and invalid electricity Flat.

When difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1, comparator is defeated Go out inactive level and make first switch 402 keep cut-off, charge and discharge path 201 does not produce to the system output VOUT of voltage amplification system Raw impact.When difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first threshold VTH1, comparator exports Significant level and so that first switch 402 is turned on, be that the first input end of output amplifier stage provides discharge path.

Fig. 4 B illustrates the schematic circuit diagram of voltage amplification system 400B according to an embodiment of the invention, voltage amplification system System 400B includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 420, and wherein charge and discharge path 420 includes the first mistake Adjust comparator 401 and first switch 402.Voltage amplification system 400B is with the difference of voltage amplification system 400A,

Second end of first switch 402 is coupled to the second potential V2, rather than the first potential V1.Therefore, when the first input letter When difference VIN12 of number IN1 and the second input signal IN2 is more than first threshold VTH1, comparator output significant level and make first Switch 402 conducting, is that the first input end of output amplifier stage provides quick charge and discharge path.

Can be using accomplished in many ways first imbalance comparator 401, such as by two of common comparator input stage Road adds the means such as mismatch.For example, the 100C of the amplifier shown in Fig. 1 C can use as comparator.Generally crystal Pipe N3 is the transistor mating with transistor N4, and transistor P1 is transistor (transistor N3 and the crystal mating with transistor P2 , to pipe, also referred to as one group of transistor P1 and transistor P2 is to pipe for referred to as one group of pipe N4), when the first input signal IN1 is more than second During input signal IN2, amplifier 100C exports high level；When the first input signal IN1 is less than the second input signal IN2, put Big device 100C output low level.It is assumed that transistor P1 is the transistor mating with transistor P2, if the size (ditch of transistor N3 Road breadth length ratio) it is more than transistor N4 it is necessary to the first higher input signal IN1 could make transistor N4 flow through and transistor N3 identical electric current, that is, the first input signal IN1 be higher than mono- numerical value (such as first threshold voltage of the second input signal IN2 VTH1) just so that comparator 100C overturns；If transistor N3 is the transistor mating with transistor N4, transistor The channel width-over-length ratio of P2 is more than transistor P1, then the electric current of transistor P2 is more than transistor P1 it is necessary to higher first input Signal IN1 could make transistor N1 successfully dredge the electric current of transistor P2, and that is, the first input signal IN1 is higher than the second input Mono- numerical value of signal IN2 (such as first threshold voltage VTH1) is just so that comparator 100C overturns.Can also be in crystalline substance One small resistor of the source series of body pipe N1, or the means such as the source series small resistor in transistor P1 obtain the first imbalance ratio Compared with device 401.By above-mentioned teaching, the different technologies personnel of this area can improve to various comparators, amplifier, realizes First imbalance comparator 401.

According to above-mentioned teaching, change the coupling of comparator input stage using identical method, for example, " if transistor N3 Be smaller in size than transistor N4 " or " breadth length ratio of transistor P2 be less than transistor P1 ", it is possible to obtain " when the second input signal When difference VIN21 of IN2 and the first input signal IN1 exceedes Second Threshold VTH2, the voltage of the outfan of the first imbalance comparator Overturn, overturn as significant level from inactive level ", and go to control first switch 402 with the output of comparator, and then improve The switching rate of the system output signal VOUT of voltage amplification system.

Fig. 5 A illustrates the schematic circuit diagram of voltage amplification system 500A according to an embodiment of the invention, voltage amplification system System 500A includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 510, and wherein charge and discharge path 510 includes the first mistake Adjust generator 4011, first comparator 4012 and first switch 402.

First imbalance generator 4011 and first comparator 4012 are to realize an enforcement of the first imbalance comparator 401 Example.

First imbalance generator 4011 includes input and outfan, and its input is coupled to input amplifier stage 101 To receive the first input signal IN1, outfan provides the first offset voltage VOS1 to first input end.First imbalance generator First input signal IN1 is carried out subtraction process by 4011, and that is, the first offset voltage VOS1 is the first input signal IN1 and the first threshold The difference of value VTH1, that is,：

VOS1=IN1-VTH1 (1)

First comparator 4012 has first input end, the second input and outfan, and its first input end is coupled to The outfan of one imbalance generator 4011, its second input is coupled to the first input end of input amplifier stage 101 to receive Second input signal IN2, outfan provides first switch signal SW1.

According to formula (1), difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 When, the first offset voltage VOS1 is less than the second input signal IN2, and that is, the input terminal voltage of first comparator 402 first end is less than The input terminal voltage at its second end, comparator exports inactive level and makes first switch 402 keep cut-off, and charge and discharge path 201 is not Impact is produced on the first input end of output amplifier stage 102.First input signal IN1 and difference VIN12 of the second input signal IN2 During more than first threshold VTH1, the first offset voltage VOS1 is more than the second input signal IN2, and that is, first comparator 4,012 first is defeated Enter terminal voltage and be more than its second input terminal voltage, comparator exports significant level and so that first switch 402 is turned on, amplify for output The first input end of level 102 provides repid discharge path.

If the second end of the first switch of voltage amplification system 500A 402 can also be coupled to the second potential V2, rather than First potential V1.Therefore, when difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first threshold VTH1 When, the first offset voltage VOS1 is more than the second input signal IN2, that is, first comparator 4012 first input end voltage be more than its Two input terminal voltages, comparator exports significant level and so that first switch 402 is turned on, and is that the first input end of output amplifier stage carries Supply quick charge path.

Fig. 5 B illustrates the schematic circuit diagram of voltage amplification system 500B according to an embodiment of the invention, voltage amplification system System 500B includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 520, and wherein charge and discharge path 520 includes the second mistake Adjust generator 4013, first comparator 4012 and first switch 402.

According to another embodiment, the first imbalance comparator 401 can be with the second imbalance generator 4013 and first Comparator 4012 is realizing.

Voltage amplification system 500B is with the difference of voltage amplification system 500A：Second imbalance generator 4013 includes Input and outfan, its input is coupled to the second input of input amplifier stage 101 to receive the second input signal IN2, Outfan provides the second offset voltage VOS2, the first offset voltage VOS2 be the second input signal IN2 and first threshold VTH1 it With that is,：

VOS2=IN2+VTH1 (2)

According to formula (2), difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 When, the first input signal IN1 is less than the second offset voltage VOS2, that is, first comparator 4012 first input end voltage be less than its Two input terminal voltages, comparator exports inactive level and makes first switch 402 keep cut-off, and charge and discharge path 201 is not put to voltage The system output VOUT of big system 500B produces impact.Difference VIN12 when the first input signal IN1 and the second input signal IN2 During more than first threshold VTH1, the first input signal IN1 is more than the second offset voltage VOS2, and that is, first comparator 402 first is defeated Enter terminal voltage and be more than its second input terminal voltage, comparator exports significant level and so that first switch 403 is turned on, amplify for output The first input end of level provides repid discharge path.

Second end of the first switch 402 of voltage amplification system 500B can be coupled to the second potential V2, rather than the first electricity Gesture V1.Therefore, when difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first threshold VTH1, first Offset voltage VOS2 is more than the second input signal IN2, and that is, first comparator 4012 first input end voltage is more than its second input Terminal voltage, first comparator 4012 exports significant level and so that first switch 402 is turned on, and is the first input end of output amplifier stage Provide quick charge path.

Fig. 6 A illustrates the schematic circuit diagram of voltage amplification system 600A according to an embodiment of the invention, voltage amplification system System 600A includes inputting amplifier stage 101, output amplifier stage 101 and charge and discharge path 610, and wherein charge and discharge path 610 includes the first mistake Adjust amplifier 601 and the first diode 602.

First imbalance amplifier 601 has first input end, the second input and outfan, and its first input end is coupled to The first input end of input amplifier stage 101, its second input is coupled to the second input of input amplifier stage 101, outfan Carry the first charge and discharge signal ICH1, when difference VIN12 of the first input signal IN1 and the second input signal IN2 exceeds more than the of zero During one threshold value VTH1, the outfan of the first imbalance amplifier 601 occurs to absorb electric current to the power and energy providing electric current.

First diode 602 has anode (first end) and negative electrode (the second end), and its negative electrode is coupled to output amplifier stage 101 First input end, its anode is coupled to the outfan of the first imbalance amplifier 601.

When difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 (it is assumed that its One end is in-phase end, and its second segment is end of oppisite phase), the first imbalance amplifier 601 has absorption function of current, due to diode Reversely couple, the first imbalance amplifier 601 cannot absorb electric current from the first input end of output amplifier stage 102, thus not right Voltage amplification system produces impact.Difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first threshold During VTH1, the first imbalance amplifier 601 has offer function of current, and the first diode 602 that this electric current passes through to couple flows into defeated Go out the first input end of amplifier stage 102, be provided for a quick charge path.

Fig. 6 B illustrates the schematic circuit diagram of voltage amplification system 600B according to an embodiment of the invention, voltage amplification system System 600 includes inputting amplifier stage 101, output amplifier stage 101 and charge and discharge path 620.Voltage amplification system 600B and voltage amplification The difference of system 600A is：

First imbalance amplifier 603 has first input end, the second input and outfan, and its first input end is coupled to The first input end of input amplifier stage 101, its second input is coupled to the second input of input amplifier stage 101, outfan Carry the second charge and discharge signal ICH2, when difference VIN12 of the first input signal IN1 and the second input signal IN2 exceeds more than the of zero During one threshold value VTH1, the outfan of the first imbalance amplifier 601 provides current to the power and energy absorbing electric current.

First diode 602 has anode (first end) and negative electrode (the second end), and its anode is coupled to output amplifier stage 102 First input end, its negative electrode is coupled to the outfan of the first imbalance amplifier 601.

When difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 (it is assumed that its One end is end of oppisite phase, and its second segment is in-phase end) it is assumed that the first imbalance amplifier 601 has offer function of current, due to two poles Reversely the coupling of pipe, the electric current of the first imbalance amplifier 601 cannot be supplied to the first input end of output amplifier stage 102, thus Impact will not be produced on voltage amplification system.Difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first During threshold value VTH1, the first imbalance amplifier 601 has absorption function of current, and this first imbalance amplifier 601 passes through the coupling One diode 602 absorbs electric current from the first input end of output amplifier stage 102, is provided for a repid discharge path.

Can be using accomplished in many ways first imbalance amplifier 401, such as by two of base amplifier input stage Road adds the means such as mismatch.For example, be the amplifier shown in Fig. 1 C 100C introduce corresponding mismatch.Generally (in crystalline substance Body pipe N3 is to mate with transistor N4, and body pipe P1 is to mate with transistor P2), when the first input signal IN1 is equal to the second input During signal IN2, amplifier 100C output balance, does not absorb and does not provide electric current yet；When the first input signal IN1 is more than the second input During signal IN2, amplifier device 100C exports high level, now connects load (resistive load or potential or a current source Or voltage source) both to load supplying, thus can referred to as have offer function of current；When the first input signal IN1 is less than the During two input signals IN2, amplifier 100C exports low level, now from other load absorption electric currents, thus referred to as can have Absorb function of current.It is assumed that transistor P1 is the transistor mating with transistor P2, if the breadth length ratio of transistor N3 is more than crystalline substance Body pipe N4 is it is necessary to the first higher input signal IN1 could make transistor N4 flow through and transistor N3 identical electric current, that is, First input signal IN1 be higher than mono- numerical value of the second input signal IN2 (such as first threshold voltage VTH1) just so that Comparator 100C is converted to offer function of current from absorption function of current.If transistor N3 is the crystal mating with transistor N4 Pipe, the breadth length ratio of transistor P2 more than transistor P1 is, then the electric current of transistor P2 more than transistor P1 it is necessary to higher by the One input signal IN1 could make transistor N1 flow through more electric currents, and that is, the first input signal IN1 is higher than the second input letter Number mono- numerical value of IN2 (such as first threshold voltage VTH1) is just so that comparator 100C carries from absorbing function of current and be converted to For function of current.Can also be in one small resistor of source series of transistor N1, or the little electricity of source series in transistor P1 The means such as resistance obtain the first imbalance comparator 401.By above-mentioned teaching, the different technologies personnel of this area can be to various amplifications Device improves, and realizes the first imbalance amplifier 601.

According to above-mentioned teaching, change the coupling of comparator input stage using identical method, it is possible to obtain " when the second input When difference VIN21 of signal IN2 and the first input signal IN1 exceedes Second Threshold VTH2, outfan occurs to absorb or provides electricity The imbalance amplifier of the power and energy of stream ", and provide charge or discharge to lead to the first input end for output amplifier stage 102 Road, and then improve the switching rate of the system output signal VOUT of voltage amplification system.

Fig. 7 A illustrates the schematic circuit diagram of voltage amplification system 700A according to an embodiment of the invention, voltage amplification system System 700A includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 710, and wherein charge and discharge path 710 includes the first mistake Adjust generator 4011, the first amplifier 6012 and the first diode 602.

First imbalance generator 4011 and the first amplifier 6012 are an enforcement realizing the first imbalance amplifier 601 Example.

First imbalance generator 4011 includes input and outfan, and its input receives the first input signal IN1, defeated Going out end provides the first offset voltage VOS1, function such as formula (1) and describing before.

First amplifier 6012 has first input end, the second input and outfan, and its first input end is coupled to The outfan of one imbalance generator 4011, its second input receives the second input signal IN2, and outfan provides the first charge and discharge Signal ICH1.

According to formula (1), difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 When, the first offset voltage VOS1 is less than the second input signal IN2, that is, the first amplifier 402 first input end voltage be less than its Two input terminal voltages (it is assumed that its first end is in-phase end, its second segment is end of oppisite phase), the first amplifier 6012 has absorption electricity Stream function, due to reversely coupling of the first diode 602, the first amplifier 6012 cannot be defeated from the first of output amplifier stage 102 Enter end and absorb electric current, thus not impact is produced on voltage amplification system.First input signal IN1 and the second input signal IN2 Difference VIN12 when being more than first threshold VTH1, the first amplifier 6012 has offer function of current, and this electric current passes through the coupling One diode 602 flows into the first input end of output amplifier stage 102, is provided for a quick charge path.

Fig. 7 B illustrates voltage amplification system 700B according to an embodiment of the invention, and voltage amplification system 700B includes defeated Enter amplifier stage 101, output amplifier stage 102 and charge and discharge path 720, wherein charge and discharge path 720 includes the first imbalance generator 4011st, the second amplifier 6013 and the first diode 602, wherein first diode 602 of Fig. 7 B, have anode (first end) and Negative electrode (the second end), its anode is coupled to the first input end of output amplifier stage 102, and its negative electrode is coupled to the second amplifier 6013 Outfan.According to formula (1), difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold During VTH1, the first offset voltage VOS1 is less than the second input signal IN2, and that is, the first amplifier 402 first input end voltage is less than Its second input terminal voltage (it is assumed that its first end is end of oppisite phase, its second segment is in-phase end), the second amplifier 6013 has and carries For function of current, due to reversely coupling of the first diode 602, the second amplifier 60123 cannot be the of output amplifier stage 102 One input provides electric current, thus not producing impact to voltage amplification system.First input signal IN1 and the second input signal When difference VIN12 of IN2 is more than first threshold VTH1, the second amplifier 6013 has absorption function of current, the second amplifier 6013 By the first diode 602 from the first input end current drawn of amplifier stage 102, it is provided for a repid discharge path.

Fig. 7 C illustrates the schematic circuit diagram of voltage amplification system 700C according to an embodiment of the invention, voltage amplification system System 700C includes inputting amplifier stage 101, output amplifier stage 102 and charge and discharge path 730, and wherein charge and discharge path 730 includes the second mistake Adjust generator 4013, the first amplifier 6012 and the first diode 602.

Second imbalance generator 4013 and the first amplifier 6012 are an enforcement realizing the first imbalance amplifier 601 Example.

Second imbalance generator 4013, including input and outfan, its input receives the second input signal IN2, Outfan provides the first offset voltage VOS2, its function such as formula (2) and the explanation with regard to Fig. 5 B.

According to formula (2), difference VIN12 of the first input signal IN1 and the second input signal IN2 is less than first threshold VTH1 When, the first offset voltage VOS1 is less than the second input signal IN2, that is, the first amplifier 402 first input end voltage be less than its Two input terminal voltages (it is assumed that its first end is in-phase end, its second segment is end of oppisite phase), amplifier has absorption function of current, by In reversely coupling of the first diode 602, the first amplifier 6012 cannot absorb electricity from the first input end of output amplifier stage 102 Stream, thus not produce impact to voltage amplification system.First input signal IN1 is big with difference VIN12 of the second input signal IN2 When first threshold VTH1, the first imbalance amplifier 601 has offer function of current, and this electric current passes through the first diode coupling The first input end of 602 inflow output amplifier stages 102, is provided for a quick charge and discharge path.

Fig. 7 D illustrates voltage amplification system 700D according to an embodiment of the invention, and voltage amplification system 700D includes defeated Enter amplifier stage 101, output amplifier stage 102 and charge and discharge path 740, wherein charge and discharge path 740 includes the second imbalance generator 4013rd, the second amplifier 6013 and the first diode 602.Difference with system 700C shown in Fig. 7 C is the one or two of Fig. 7 D Pole pipe 602, has anode (first end) and negative electrode (the second end), its anode is coupled to the first input end of output amplifier stage 102, Its negative electrode is coupled to the outfan of the second amplifier 6013.Here, not describing its work process.

Fig. 8 illustrates the schematic circuit diagram of voltage amplification system 800 according to an embodiment of the invention, voltage amplification system 800 include inputting amplifier stage 101, output amplifier stage 101 and charge and discharge path 810, and wherein charge and discharge path 810 includes the first transconductance stage 801 and first current subtractor 802.

First transconductance stage 801 has first input end, the second input, the first outfan and the second outfan, and it first Input is coupled to the first input end of input amplifier stage 101, and its second input is coupled to the second defeated of input amplifier stage 101 Enter end, its first outfan and the second outfan provide the first current signal I1 and the second current signal I2 respectively, wherein first Difference I12 of current signal I1 and the second current signal I2 and difference VIN12 of the first input signal IN1 and the second input signal IN2 It is directly proportional；

First current subtractor 802 has first input end, the second input and outfan, its first input end and second Input receives described first current signal I1 and described second current signal I2 respectively, and its outfan provides fast current signal The first input end charge or discharge to described output amplifier stage for the IO, described fast current signal IO and described first current signal I1 is directly proportional to difference I12 of described second current signal I2.Wherein, described first transconductance stage 801 or described first electric current subtract The least one set of musical instruments used in a Buddhist or Taoist mass 802 is mismatch to pipe or to resistance.

Fig. 9 illustrates the schematic circuit diagram of voltage amplification system 900 according to an embodiment of the invention, voltage amplification system 900 include inputting amplifier stage 101, output amplifier stage 101 and charge and discharge path 910, and wherein charge and discharge path 910 includes the first transconductance stage 901 and first current subtractor 902.

First transconductance stage 901 includes：First current source IB1, has first end and the second end, and its first input end is coupled to 3rd potential V3, in Fig. 9, represents the 3rd potential with short horizontal line；First resistor R1, has first end and the second end, it second End is coupled to second end of the first current source I1；Second resistance R2, has first end and the second end, and its second end is coupled to first Second end of current source I1；The first transistor Q1, has first end, the second end and control end, and its second end is coupled to the first electricity Second end of resistance R1, its control end is coupled to the first input end of input amplifier stage 101；Transistor seconds Q2, have first end, Second end and control end, its second end is coupled to the second end of second resistance R2, and its control end is coupled to input amplifier stage 101 Second input；Third transistor Q3, has first end, the second end and control end, and its first end is coupled to the first transistor Q1 First end, its second end is coupled to the 4th potential V4 (representing the 4th potential V4 with triangle), and its control end is coupled to it First end；4th transistor Q4, has first end, the second end and control end, and its first end is coupled to the of transistor seconds Q2 One end, its second end is coupled to the 4th potential V4, and its control end is coupled to its first end；5th transistor Q5, have first end, Second end and control end, its second end is coupled to the 4th potential V4, and its control end is coupled to the control end of its third transistor Q3； 6th transistor, has first end, the second end and control end, and its second end is coupled to the 4th potential V4, and its control end is coupled to The control end of its 4th transistor Q4；7th transistor, has first end, the second end and control end, and its first end is coupled to The first end of five transistor Q5, its second end is coupled to the 3rd potential V3, and its control end is coupled to its first end；8th transistor Q8, has first end, the second end and control end, and its first end is coupled to the first end of the 6th transistor Q6, and its second end couples To the 3rd potential V3, its control end is coupled to its first end；9th transistor Q9, has first end, the second end and control end, its First end provides the first current signal I1, and its second end is coupled to the 3rd potential V3, and its control end is coupled to the 7th transistor Q7 Control end；And the tenth transistor Q10, there is first end, the second end and control end, its first end provides the second current signal I2, its second end is coupled to the 3rd potential V3, and its control end is coupled to the control end of the 8th transistor Q8.

First current subtractor 902 includes：

3rd resistor R3, has first end and the second end, and its first end is coupled to the first end of the 9th transistor, and it second End is coupled to the 4th potential V4；4th resistance R4, has first end and the second end, and its first end is coupled to the tenth transistor Q10 First end, its second end is coupled to the 4th potential V4；3rd amplifier 9021, have first input end, the second input and Outfan, its first input end is coupled to the first end of 3rd resistor R3, and its second input is coupled to the of the 4th resistance R4 One end；11st transistor Q11, has first end, the second end and control end, and its second end is coupled to the first of the 4th resistance R3 End, its control end is coupled to the outfan of the 3rd amplifier 9021, and the electric current of the wherein the 11st transistor Q11 is the 3rd electric current I3；Tenth two-transistor Q12, has first end, the second end and control end, and its first end is coupled to the of the tenth transistor Q10 One end, its second end is coupled to the 3rd potential, and its control end is coupled to its first end；And the 13rd transistor Q13, have One end, the second end and control end, its first end provides the first electric current IO1, and its second end is coupled to the 3rd potential V3, its control end It is coupled to the control end of the tenth two-transistor Q12.

In one embodiment, the first potential is equal to the 4th potential, and the second potential is equal to the 3rd potential.

Transistor Q1 and Q2 in differential loop, transistor Q3 and Q4, transistor Q5 and Q6, transistor Q7 and Q8, crystal Pipe Q9 and Q10, has same or like annexation, and this transistorlike is referred to as to pipe, and such as transistor Q1 and Q2 is referred to as one , to pipe, referred to as one group of transistor Q3 and Q4 is to pipe for group.Resistance R1 and R2, resistance R3 and R4 also has same or like connection Relation, this quasi-resistance is referred to as to resistance, and such as referred to as one group of resistance R1 and R2 is to resistance.

It is assumed that the first transconductance stage 901 device is coupling (i.e. the first transconductance stage 901 is all coupling to resistance with to pipe), then Can obtain,

I1 × R3=(I2+I3) × R4 (3)

I1+I2=IB1 (4)

$I1-I2=\frac{IN2-IN1}{R1}---\left(5\right)$

According to formula (3)～(6), the 3rd electric current I3 and the " difference of the second input signal IN2 and the first input signal IN1 The relation of VIN21 " can be expressed as,

$I3=\frac{IB1\×(R3-R4)}{2\×R4}+\frac{(IN2-IN1)\×(R3+R4)}{2\×R4\×R1}---\left(6\right)$

Make the 3rd electric current I3 be equal to zero, can obtain

$IN2-IN1=\frac{IB1\×(R4-R3)}{R3+R4}\×R1=VTH2---\left(7\right)$

4th resistance R3 is set and is more than 3rd resistor R4, according to formula (6) and (7), when the second input signal IN2 and first When the difference of input signal IN1 is less than or equal to second threshold voltage VTH2, the 3rd electric current I3 is less than or equal to zero.Actually Because the 11st transistor Q11, the tenth two-transistor Q1 and the 13rd transistor Q13 cannot provide negative current, and make crystalline substance It is zero that body pipe Q13 keeps electric current, i.e. high-impedance state, does not produce impact to the first input end of output amplifier stage 102.When second is defeated When entering the difference of signal IN2 and the first input signal IN1 and being more than second threshold voltage VTH2, the 3rd electric current I3 is just transistor Q13 Starting the first input end to output stage 102 provides electric current, that is, increase by a quick charge path.

For this reason, those skilled in the art can be according to formula (7), rationally setting 3rd resistor R3 and the 4th resistance R4 Numerical value, arranges second threshold voltage VTH2.Meanwhile, the teaching according to this specification, those skilled in the art it will also be appreciated that Even if 3rd resistor R3 and the 4th resistance R4 are the resistance of coupling, when mismatch being introduced to pipe for the first transconductance stage 901, also may be used So that electric current I1 and I2 produces mismatch.For example, increase the channel width-over-length ratio with respect to transistor Q1 for the transistor Q2 (it is assumed that being P channel MOS transistor), then need higher second input signal IN2 just so that the electric current (or second electric current I2) of Q2 Electric current (or first electric current I1) equal to Q1.That is, the second input signal IN2 and difference VIN21 of the first input signal IN1 are less than Or when being equal to Second Threshold VTH2, the 3rd electric current I3 and the first electric current IO1 is zero, Q13 is high-impedance state；Second input letter When difference VIN21 of number IN2 and the first input signal IN1 is more than Second Threshold VTH2, the 3rd electric current I3 and the first output current IO1 charges to the input of output amplifier stage 102.Therefore, the matching changing following least one set device all can reach this The purpose of invention：One group of first transconductance stage 902 to pipe, one group of the first transconductance stage 902 to resistance, to resistance R3 and R4.

The control end of the first transistor Q1 is coupled to the second input of input amplifier stage 101, transistor seconds Q2's Control end is coupled to the of input amplifier stage 101 with input, then so that quick charge and discharge path 910 is in the first input signal Difference VIN12 of IN1 and the second input signal IN2 is higher than the during a certain voltage (such as first threshold) to output amplifier stage 102 One input charges, and is less than a certain voltage (such as first in difference VIN12 of the first input signal IN1 and the second input signal IN2 Threshold value) when keep high-impedance state.

Figure 10 illustrates the schematic circuit diagram of voltage amplification system 1000 according to an embodiment of the invention, voltage amplification system System 1000 includes inputting amplifier stage 101, output amplifier stage 101 and charge and discharge path 1010, and wherein charge and discharge path 1010 includes first Transconductance stage 1001 and the first current subtractor 1002.

First transconductance stage 1001 includes：Second current source IB2, has first end and the second end, and its first input end couples To the 3rd potential V3；5th resistance R5, has first end and the second end, and its first end is coupled to the second of the second current source IB2 End；6th resistance R6, has first end and the second end, and its first end is coupled to second end of the second current source IB2；14th is brilliant Body pipe Q14, has first end, the second end and control end, and its second end is coupled to second end of the 5th resistance R5, its control end coupling It is connected to the first input end of input amplifier stage 101；15th transistor Q15, has first end, the second end and control end, and it Two ends are coupled to second end of the 6th resistance R6, and its control end is coupled to the second input of input amplifier stage 101；16th is brilliant Body pipe Q16, has first end, the second end and control end, and its first end is coupled to the first end of the 14th transistor Q14, and it Two ends are coupled to the 4th potential V4, and its control end is coupled to its first end；17th transistor Q17, has first end, the second end And control end, its first end is coupled to the first end of the 15th transistor Q15, and its second end is coupled to the 4th potential V4, its control End processed is coupled to its first end；18th transistor Q18, has first end, the second end and control end, and its first end provides the 4th Electric current I4, its second end is coupled to the 4th potential V4, and its control end is coupled to the control end of the 16th transistor Q16；And the 19 transistor Q19, have first end, the second end and control end, and its first end provides the 5th electric current I5, and its second end is coupled to 4th potential V4, its control end is coupled to the control end of the 17th transistor Q17；

First current subtractor 1002 includes：7th resistance R7, has first end and the second end, and its first end is coupled to The first end of 18 transistor Q18, its second end is coupled to the 3rd potential V3；8th resistance R8, has first end and the second end, Its first end is coupled to the first end of the 19th transistor Q19, and its second end is coupled to the 3rd potential V3；4th amplifier 10021, there is first input end, the second input and outfan, its first input end is coupled to the first end of the 7th resistance R7, Its second input is coupled to the first end of the 8th resistance R8；20th transistor Q20, has first end, the second end and control End, its second end is coupled to the first end of the 7th resistance R7, and its control end is coupled to the outfan of the 3rd amplifier 10021；The 21 transistor Q21, have first end, the second end and control end, and its first end is coupled to the first of the 20th transistor Q20 End, its second end is coupled to the 4th potential V4, and its control end is coupled to its first end；And the 20th two-transistor Q22, have First end, the second end and control end, its first end is coupled to the first input end of output amplifier stage 102 to provide the second electric current letter Number IO2, its second end is coupled to the 4th potential V4, and its control end is coupled to the control end of the 21st transistor Q21；Wherein institute Stating the first transconductance stage 1001 or the least one set of described first current subtractor 1002 is mismatch to pipe or to resistance.

It is assumed that the first transconductance stage 1001 that the first transconductance stage 1001 device is coupling is all coupling to resistance with to pipe, then may be used To obtain,

I4 × R8=(I5+I6) × R7 (8)

I5+I4=IB2 (9)

$I4-I5=\frac{IN1-IN2}{R5}---\left(10\right)$

According to (3～6), the pass of difference VIN12 of the 6th electric current I6 and the first input signal IN1 and the second input signal IN2 System can be expressed as,

$I6=\frac{IB1\×(R8-R7)}{2\×R7}+\frac{(IN1-IN2)\×(R8+R7)}{2\×R7\×R5}---\left(11\right)$

Make the 6th electric current I6 be equal to zero, can obtain

$IN1-IN2=\frac{IB1\×(R7-R8)}{R7+R8}\×R5=VTH1---\left(12\right)$

7th resistance R7 is set and is more than the 8th resistance R8, according to formula (11) and (12), when the first input signal IN1 and the When difference VIN12 of two input signals IN2 is less than or equal to first threshold voltage VTH1, the 6th electric current I6 is less than or equal to Zero.Actually due to the 20th transistor Q20, the 21st transistor Q21 and the 20th two-transistor Q22 all cannot provide negative Electric current, and make transistor Q22 electric current remain zero, i.e. high-impedance state, the first input end of output amplifier stage 102 is not produced Impact.When difference VIN12 of the first input signal IN1 and the second input signal IN2 is more than first threshold voltage VTH1, the 6th electricity Stream I6 increases, and transistor Q22 starts to absorb electric current from the first input end of output stage 102, that is, increase by a repid discharge path.

For this reason, those skilled in the art can be according to formula (12), rationally setting 3rd resistor R3 and the 4th resistance R4 Numerical value, arrange second threshold voltage VTH2.Meanwhile, the teaching according to this specification, those skilled in the art can also know Road, even if 3rd resistor R3 and the 4th resistance R4 are the resistance of coupling, when mismatch being introduced to pipe for the first transconductance stage 1001, It is also possible that the 4th electric current I4 and the 5th electric current I5 produces mismatch.Therefore, the matching changing following least one set device is equal The purpose of the present invention can be reached：One group of first transconductance stage 1001 to pipe, one group of the first transconductance stage 1001 to resistance, to resistance R7 And R8.

Figure 11 illustrates the schematic circuit diagram of voltage amplification system 1100 according to an embodiment of the invention.Voltage amplification system System 1100 includes inputting amplifier stage 1101, output amplifier stage 1102 and charge and discharge path 1103.

Input amplifier stage 1101, has first input end, the second input and the first outfan and the second outfan, and it the One input receives the first input signal IN1, and its second input receives the second input signal IN2；

Output amplifier stage 1102, is coupled between the first potential V1 and the second potential V2, has first input end, second defeated Enter end and outfan, its first input end is coupled to the first outfan of described input amplifier stage 1101, its second input coupling It is connected to the second outfan of described input amplifier stage 1102, its outfan provides system output signal, including,

Low side transistors QL, have first end, the second end and control end, and its first end is coupled to or is configured as output to put The outfan of big level, its second end is coupled to the first potential V1, and its control end is coupled to or is configured to input amplifier stage 1101 First input end, the first transistor includes nmos pass transistor or NPN bipolar transistor；

High-side transistor QH, has first end, the second end and control end, and its first end is coupled to or is configured as output to put The outfan of big level, its second end is coupled to the second potential V2, and its control end is coupled to or is configured to input amplifier stage 1101 Second input, high-side transistor includes PMOS transistor or PNP bipolar transistor；

Above-mentioned voltage amplification system 1100 also includes charge and discharge path 1103, have first input end, the second input, One outfan and the second outfan, its first input end is coupled to the first input end of input amplifier stage 1101, its second input End is coupled to the second input of input amplifier stage 1101, and its first outfan is coupled to the first input of output amplifier stage 1102 End, its second outfan is coupled to the second input of output amplifier stage 1102, when the first input signal IN1 and the second input letter When difference VIN12 of number IN2 exceeds more than zero first threshold VTH1, charge and discharge path is to 1103 to described output amplifier stage 1102 First input end and the second input repid discharge；When the second input signal IN2 is big with difference VIN21 of the first input signal IN1 When zero Second Threshold VTH2, charge and discharge path 1103 is quick to the first input end of output amplifier stage 1102 and the second input Charge.

According to one embodiment of present invention, when difference VIN12 of the first input signal IN1 and the second input signal IN2 surpasses When crossing first threshold VTH1 more than zero, the first outfan of charge and discharge path 1103 and the second outfan are converted to by high-impedance state Absorb electric current；When difference VIN21 of the second input signal IN2 and the first input signal IN1 exceeds more than zero Second Threshold VTH2 When, charge and discharge path 1,103 first outfan and the second outfan are converted to offer electric current by high-impedance state.

Figure 12 illustrates the schematic circuit diagram of voltage amplification system 1200 according to an embodiment of the invention.Voltage amplification system System 1200 includes inputting amplifier stage 1101, output amplifier stage 1102 and charge and discharge path 1203.

First imbalance comparator 12031 has first input end, the second input and outfan, and its first input end couples To the first input end inputting amplifier stage 1101, its second input is coupled to the second input of input amplifier stage 1101, defeated Going out end provides first switch signal SW1, and when the difference of the first input signal and the second input signal exceedes first threshold, first opens OFF signal overturns, and is overturn as significant level by inactive level；

First switch 12032 has first end, the second end and control end, and its first end is coupled to output amplifier stage 1102 First input end, its second end is coupled to the first potential V1；

Second switch 12033 has first end, the second end and control end, and its first end is coupled to output amplifier stage 1102 Second input, its second end is coupled to the first potential V1；

Second imbalance comparator 12034, has first input end, the second input and outfan, its first input end coupling It is connected to the first input end of input amplifier stage 1101, its second input is coupled to the second input of input amplifier stage 1101, Outfan provides second switch signal SW2, when difference VIN21 of the second input signal IN2 and the first input signal IN1 is more than second During threshold value VTH2, second switch signal SW2 overturns, and is overturn as significant level by inactive level；

3rd switch 12035 has first end, the second end and control end, and its first end is coupled to output amplifier stage 1102 First input end, its second end is coupled to the second potential V2；

4th switch 12036 has first end, the second end and control end, and its first end is coupled to output amplifier stage 1102 Second input, its second end is coupled to the second potential V2.

First imbalance comparator 12031 and the second imbalance comparator 12034 can be using shown in Fig. 4 A of the present invention and Fig. 4 B Mode realize, or mismatch is introduced in different comparators according to the teachings of the present invention.

Figure 13 illustrates the schematic circuit diagram of voltage amplification system 1300 according to an embodiment of the invention.Voltage amplification system System 1300 includes inputting amplifier stage 1101, output amplifier stage 1102 and charge and discharge path 1303.

First imbalance amplifier 13031 has first input end, the second input and outfan, and its first input end couples To the first input end inputting amplifier stage 1101, its second input is coupled to the second input of input amplifier stage 1101, defeated Go out end and carry the first charge and discharge signal ICH1, when difference VIN12 of the first input signal IN1 and the second input signal IN2 exceeds more than zero First threshold VTH1 when, first imbalance amplifier 13031 outfan occur from provide current to absorb electric current function turn Change；

First diode 13032 has negative electrode and anode, and its anode is coupled to the first input end of output amplifier stage 1102, Its negative electrode is coupled to the outfan of the first imbalance amplifier 13031, and its control end is coupled to the defeated of the first imbalance comparator 13031 Go out end；

Second diode 13033 has negative electrode and anode, and its anode is coupled to the second input of output amplifier stage 1102, Its negative electrode is coupled to the outfan of the first imbalance amplifier 13031, and its control end is coupled to the defeated of the first imbalance comparator 13031 Go out end；

Second imbalance amplifier 13034 has first input end, the second input and outfan, and its first input end couples To the first input end inputting amplifier stage 1101, its second input is coupled to the second input of input amplifier stage 1101, defeated Go out end and carry the second charge and discharge signal ICH2, when difference VIN21 of the second input signal IN2 and the first input signal IN1 exceeds more than zero Second Threshold VTH2 when, second imbalance amplifier 13032 outfan occur from absorb electric current to provide electric current function turn Change；

3rd diode 13035 has negative electrode and anode, and its negative electrode is coupled to the first input end of output amplifier stage 1102, Its anode is coupled to the outfan of the second imbalance amplifier 13034, and its control end is coupled to the defeated of the second imbalance comparator 13034 Go out end；And

4th diode 13036 has negative electrode and anode, and its negative electrode is coupled to the second input of output amplifier stage 1102, Its anode is coupled to the outfan of the second imbalance amplifier 13034, and its control end is coupled to the defeated of the first imbalance comparator 13034 Go out end.

Figure 14 illustrates the schematic circuit diagram of voltage amplification system 1400 according to an embodiment of the invention.Voltage amplification system System 1300 includes inputting amplifier stage 1101, output amplifier stage 1102 and charge and discharge path 1410.

Charging path 14101, including the charge and discharge path 910 shown in Fig. 9, and the 23rd transistor Q23, have first End, the second end and control end, its first end is coupled to the second input of output amplifier stage 1102, and its second end is coupled to the 3rd Potential V3, its control end is coupled to the control end of the tenth two-transistor Q12.In the illustrated embodiment, transistor Q12 and Q21 " 1 " of side mark represents in this embodiment can be using single transistor.Additionally, in the illustrated embodiment, crystal " x " of pipe Q13, Q22, Q23 and Q24 side mark represents can be needed using multiple crystalline substances according to different in certain embodiments Body pipe.

Discharge path 14102, including the charge and discharge path 1010 shown in Figure 10, and the 24th transistor Q24, have One end, the second end and control end, its first end is coupled to the second input of output amplifier stage 1102, and its second end is coupled to Four potential V4, its control end is coupled to the control end of the 20th two-transistor Q22.

Although the present invention be described already in connection with its specific illustrative embodiment it is therefore apparent that, multiple alternative, Modification and deformation will be readily apparent to one having ordinary skill.Thus, the exemplary embodiment party of the present invention that here illustrates Formula is schematic and and non-limiting.Can modify without departing from the spirit and scope of the present invention.

The measure word " one " that used in this disclosure, " a kind of " etc. are not excluded for plural number." first " in literary composition, " the Two " etc. it is merely represented in the sequencing occur in the description of embodiment, in order to distinguish like." first ", " second " exist Occurring only for the purposes of the fast understanding to claim rather than in order to be limited in claims.Right will Any reference in book is asked to should be construed as the restriction to scope.

Claims (21)

1. a kind of voltage amplification system, including：

Input amplifier stage, has first input end, the second input and the first outfan, and its first input end receives the first input Signal, its second input receives the second input signal；

Output amplifier stage, is coupled between the first potential and the second potential, has first input end and outfan, its first input End is coupled to the first outfan of described input amplifier stage, and its outfan provides system output signal；And

Charge and discharge path, has first input end, the second input and the first outfan, and its first input end is coupled to described input The first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, its first outfan It is coupled to the first input end of described output amplifier stage, when the difference of described first input signal and described second input signal exceedes During first threshold more than zero, the outfan of described charge and discharge path is converted to absorption by high-impedance state or provides electric current.

2. voltage amplification system according to claim 1, wherein, when described second input signal and described first input letter Number difference exceed more than zero Second Threshold when, described charge and discharge path the first input end of described output amplifier stage is charged or Electric discharge.

3. voltage amplification system according to claim 1, wherein, described output amplifier stage includes,

First power tube, has first end, the second end and control end, and its first end is coupled to or is configured to described output amplifies The outfan of level, its second end is coupled to the first potential or the second potential, and its control end is coupled to or is configured to described output The first input end of amplifier stage, described first power tube includes nmos pass transistor or NPN bipolar transistor or PMOS is brilliant Body pipe or PNP bipolar transistor.

4. voltage amplification system according to claim 2, wherein, when described second input signal and described first input letter Number difference when exceeding described Second Threshold, the outfan of described charge and discharge path is converted to offer by high-impedance state or absorbs electricity Stream.

5. voltage amplification system according to claim 1, wherein, described charge and discharge path includes,

First imbalance comparator, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides First switch signal, when the difference of described first input signal and described second input signal exceedes described first threshold, described First switch signal is overturn as significant level by inactive level；And

First switch, has first end, the second end and control end, and its first end is coupled to the first input of described output amplifier stage End, its second end is coupled to described first potential or described second potential, and its control end is coupled to described first imbalance and compares The outfan of device.

6. voltage amplification system according to claim 5, wherein, described first imbalance comparator includes：

First imbalance generator, has input and outfan, and its input is coupled to the first defeated of described input amplifier stage Enter end, outfan provides the first offset voltage, described first offset voltage is described first input signal and described first threshold Difference；And

First comparator, has first input end, the second input and outfan, and its first input end is coupled to described first mistake Adjust the outfan of generator, its second input is coupled to the second input of described input amplifier stage, its outfan provides Described first switch signal.

7. voltage amplification system according to claim 5, wherein, described charge and discharge path includes：

Second imbalance generator, has input and outfan, and its input is coupled to the second defeated of described input amplifier stage Enter end, its outfan provides the second offset voltage, described second offset voltage is described second input signal and described first threshold Value sum；And

First comparator, has first input end, the second input and outfan, and its second input is coupled to described second mistake Adjust the outfan of generator, its first input end is coupled to the first input end of described input amplifier stage, outfan provides institute State first switch signal.

8. voltage amplification system according to claim 1, wherein, described charge and discharge path includes：First imbalance amplifier, tool There are first input end, the second input and outfan, its first input end is coupled to the first input end of described input amplifier stage, Its second input is coupled to the second input of described input amplifier stage, and outfan provides the first charge and discharge signal, when described the When the difference of one input signal and described second input signal exceedes described first threshold, the outfan of described first imbalance amplifier Occur from the power and energy absorbing electric current to offer electric current；And

First diode, its negative electrode is coupled to the first input end of described output amplifier stage, and its anode is coupled to described first mistake Adjust the outfan of amplifier.

9. voltage amplification system according to claim 1, wherein, described charge and discharge path includes：

First imbalance amplifier, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides First charge and discharge signal, when the difference of described first input signal and described second input signal exceedes described first threshold, described The outfan of the first imbalance amplifier occurs from the power and energy providing current to absorption electric current；And

First diode, its anode is coupled to the first input end of described output amplifier stage, and its negative electrode is coupled to described first mistake Adjust the outfan of amplifier.

10. voltage amplification system according to claim 8, wherein, described first imbalance amplifier includes：

First imbalance generator, has input and outfan, and its input is coupled to the first defeated of described input amplifier stage Enter end, outfan provides the first offset voltage, described first offset voltage is described first input signal and described first threshold Difference；And

First amplifier, has first input end, the second input and outfan, and its first input end is coupled to described first mistake Adjust the outfan of generator, its second input is coupled to the second input of described input amplifier stage, its outfan provides Described first charge and discharge signal.

11. voltage amplification system according to claim 9, wherein, described first imbalance amplifier includes：

First imbalance generator, has input and outfan, and its input is coupled to the first defeated of described input amplifier stage Enter end, outfan provides the first offset voltage, described first offset voltage is described first input signal and described first threshold Difference；And

First amplifier, has first input end, the second input and outfan, and its first input end is coupled to described first mistake Adjust the outfan of generator, its second input is coupled to the second input of described input amplifier stage, its outfan provides Described first charge and discharge signal.

12. voltage amplification system according to claim 8, wherein, described first imbalance amplifier includes：

Second imbalance generator, has input and outfan, and its input is coupled to the second defeated of described input amplifier stage Enter end, outfan provides the second offset voltage, described second offset voltage is described second input signal and described first threshold Sum；And

First amplifier, has first input end, the second input and outfan, and its second input is coupled to described second mistake Adjust the outfan of generator, its first input end is coupled to the first input end of described input amplifier stage, its outfan provides Described first charge and discharge signal.

13. voltage amplification system according to claim 9, wherein, described first imbalance amplifier includes：

Second imbalance generator, has input and outfan, and its input is coupled to the second defeated of described input amplifier stage Enter end, outfan provides the second offset voltage, described second offset voltage is described second input signal and described first threshold Sum；And

First amplifier, has first input end, the second input and outfan, and its second input is coupled to described second mistake Adjust the outfan of generator, its first input end is coupled to the first input end of described input amplifier stage, its outfan provides Described first charge and discharge signal.

14. voltage amplification system according to claim 1, wherein, described charge and discharge path includes：

First transconductance stage, has first input end, the second input, the first outfan and the second outfan, its first input end It is coupled to the first input end of described input amplifier stage, its second input is coupled to the second input of described input amplifier stage End, its first outfan and the second outfan provide the first current signal and the second current signal, wherein said first electricity respectively Stream signal is directly proportional to the difference of described second input signal to the difference of described second current signal and described first input signal；

First current subtractor, has first input end, the second input and outfan, its first input end and the second input Receive described first current signal and described second current signal respectively, its outfan provides current signal that described output is amplified The first input end charge or discharge of level, described current signal and described first current signal and the difference of described second current signal It is directly proportional；Wherein, the least one set of described first transconductance stage or described first current subtractor to pipe or to resistance for not Join.

15. voltage amplification system according to claim 14, wherein,

Described first transconductance stage includes：

First current source, has first end and the second end, and its first input end is coupled to the 3rd potential；

First resistor, has first end and the second end, and its first end is coupled to the second end of described first current source；

Second resistance, has first end and the second end, and its first end is coupled to the second end of described first current source；

The first transistor, has first end, the second end and control end, and its second end is coupled to the second end of described first resistor, Its control end is coupled to the first input end of described input amplifier stage；

Transistor seconds, has first end, the second end and control end, and its second end is coupled to the second end of described second resistance, Its control end is coupled to the second input of described input amplifier stage；

Third transistor, has first end, the second end and control end, and its first end is coupled to the first of described the first transistor End, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

4th transistor, has first end, the second end and control end, and its first end is coupled to the first of described transistor seconds End, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

5th transistor, has first end, the second end and control end, and its second end is coupled to the 4th potential, and its control end couples Control end to described third transistor；

6th transistor, has first end, the second end and control end, and its second end is coupled to the 4th potential, and its control end couples Control end to described 4th transistor；

7th transistor, has first end, the second end and control end, and its first end is coupled to the first of described 5th transistor End, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；

8th transistor, has first end, the second end and control end, and its first end is coupled to the first of described 6th transistor End, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；

9th transistor, has first end, the second end and control end, and its first end provides described first current signal, and it second End is coupled to described 3rd potential, and its control end is coupled to the control end of described 7th transistor；And

Tenth transistor, has first end, the second end and control end, and its first end provides described second current signal, and it second End is coupled to described 3rd potential, and its control end is coupled to the control end of described 8th transistor；

Described first current subtractor includes：

3rd resistor, has first end and the second end, and its first end is coupled to the first end of described 9th transistor, its second end It is coupled to the 4th potential；

4th resistance, has first end and the second end, and its first end is coupled to the first end of described tenth transistor, its second end It is coupled to the 4th potential；

3rd amplifier, has first input end, the second input and outfan, and its first input end is coupled to described 3rd electricity The first end of resistance, its second input is coupled to the first end of described 4th resistance；

11st transistor, has first end, the second end and control end, and its second end is coupled to the first of described 4th resistance End, its control end is coupled to the outfan of described 3rd amplifier；

Tenth two-transistor, has first end, the second end and control end, and its first end is coupled to the of described 11st transistor One end, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；And

13rd transistor, has first end, the second end and control end, and its first end provides described current signal, its second end It is coupled to described 3rd potential, its control end is coupled to the control end of described tenth two-transistor.

16. voltage amplification system according to claim 14, wherein,

Described first transconductance stage includes：

Second current source, has first end and the second end, and its first input end is coupled to the 3rd potential；

5th resistance, has first end and the second end, and its first end is coupled to the second end of described second current source；

6th resistance, has first end and the second end, and its first end is coupled to the second end of described second current source；

14th transistor, has first end, the second end and control end, and its second end is coupled to the second of described 5th resistance End, its control end is coupled to the first input end of described input amplifier stage；

15th transistor, has first end, the second end and control end, and its second end is coupled to the second of described 6th resistance End, its control end is coupled to the second input of described input amplifier stage；

16th transistor, has first end, the second end and control end, and its first end is coupled to the of described 14th transistor One end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

17th transistor, has first end, the second end and control end, and its first end is coupled to the of described 15th transistor One end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

18th transistor, has first end, the second end and a control end, and its first end provides described second current signal, and it the Two ends are coupled to the 4th potential, and its control end is coupled to the control end of described 16th transistor；And

19th transistor, has first end, the second end and a control end, and its first end provides described first current signal, and it the Two ends are coupled to the 4th potential, and its control end is coupled to the control end of described 17th transistor；

Described first current subtractor includes：

7th resistance, has first end and the second end, and its first end is coupled to the first end of described 18th transistor, and it second End is coupled to described 3rd potential；

8th resistance, has first end and the second end, and its first end is coupled to the first end of described 19th transistor, and it second End is coupled to described 3rd potential；

4th amplifier, has first input end, the second input and outfan, and its first input end is coupled to described 7th electricity The first end of resistance, its second input is coupled to the first end of described 8th resistance；

20th transistor, has first end, the second end and control end, and its second end is coupled to the first of described 7th resistance End, its control end is coupled to the outfan of described 4th amplifier；

21st transistor, has first end, the second end and control end, and its first end is coupled to described 20th transistor First end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；And

20th two-transistor, has first end, the second end and control end, and its first end provides described current signal, and it second End is coupled to the 4th potential, and its control end is coupled to the control end of described 21st transistor.

A kind of 17. voltage amplification system, including：

Input amplifier stage, has first input end, the second input, the first outfan and the second outfan, its first input end Receive the first input signal, its second input receives the second input signal；

Output amplifier stage, is coupled between the first potential and the second potential, has first input end, the second input and output End, its first input end is coupled to the first outfan of described input amplifier stage, and its second input is coupled to described input and puts Second outfan of big level, its outfan provides system output signal, and described output amplifier stage includes,

First power tube, has first end, the second end and control end, and its first end is coupled to or is configured to described output amplifies The outfan of level, its second end is coupled to described first potential, and its control end is coupled to or is configured to described input amplifier stage First input end, described first power tube includes nmos pass transistor or NPN bipolar transistor；

Second power tube, has first end, the second end and control end, and its first end is coupled to or is configured to described output amplifies The outfan of level, its second end is coupled to described second potential, and its control end is coupled to or is configured to described input amplifier stage Second input, described second power tube includes PMOS transistor or PNP bipolar transistor；And

Wherein, described voltage amplification system also includes charge and discharge path, has first input end, the second input, the first outfan With the second outfan, its first input end is coupled to the first input end of described input amplifier stage, and its second input is coupled to Second input of described input amplifier stage, its first outfan is coupled to the first input end of described output amplifier stage, and it the Two outfans are coupled to the second input of described output amplifier stage, when described first input signal and described second input signal Difference exceed more than zero first threshold when, described charge and discharge path is to the first input end of described output amplifier stage and the second input End electric discharge；When the difference of described second input signal and described first input signal is more than zero Second Threshold, described charge and discharge is led to Charge to the first input end of described output amplifier stage and the second input in road.

18. voltage amplification system according to claim 17, wherein, when described first input signal and described second input When the difference of signal exceeds more than zero first threshold, the first outfan of described charge and discharge path and the second outfan are by high-impedance state Be converted to absorption electric current；When the difference of described second input signal and described first input signal exceeds more than zero Second Threshold When, the first outfan of described charge and discharge path and the second outfan are converted to offer electric current by high-impedance state.

19. voltage amplification system according to claim 17, wherein, described charge and discharge path includes：

First imbalance comparator, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides First switch signal, when the difference of described first input signal and described second input signal exceedes described first threshold, described First switch signal is overturn as significant level by inactive level；

First switch, has first end, the second end and control end, and its first end is coupled to the first input of described output amplifier stage End, its second end is coupled to described first potential, and its control end is coupled to the outfan of described first imbalance comparator；

Second switch, has first end, the second end and control end, and its first end is coupled to the second input of described output amplifier stage End, its second end is coupled to described first potential, and its control end is coupled to the outfan of described first imbalance comparator；

Second imbalance comparator, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides Second switch signal, when the difference of described second input signal and described first input signal exceedes described Second Threshold, described Second switch signal is overturn as significant level by inactive level；

3rd switch, has first end, the second end and control end, and its first end is coupled to the first input of described output amplifier stage End, its second end is coupled to described second potential, and its control end is coupled to the outfan of described second imbalance comparator；And

4th switch, has first end, the second end and control end, and its first end is coupled to the second input of described output amplifier stage End, its second end is coupled to described second potential, and its control end is coupled to the outfan of described second imbalance comparator.

20. voltage amplification system according to claim 17, wherein, described charge and discharge path includes：

First imbalance amplifier, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides First charge and discharge signal, when the difference of described first input signal and described second input signal exceeds more than zero first threshold, The outfan of described first imbalance amplifier occurs from the power and energy providing current to absorption electric current；

First diode, has negative electrode and anode, and its anode is coupled to the first input end of described output amplifier stage, its negative electrode coupling It is connected to the outfan of described first imbalance amplifier；

Second diode, has negative electrode and anode, and its anode is coupled to the second input of described output amplifier stage, its negative electrode coupling It is connected to the outfan of described first imbalance amplifier；

Second imbalance amplifier, has first input end, the second input and outfan, its first input end is coupled to described defeated Enter the first input end of amplifier stage, its second input is coupled to the second input of described input amplifier stage, outfan provides Second charge and discharge signal, when the difference of described second input signal and described first input signal exceeds more than zero Second Threshold, The outfan of described second imbalance amplifier occurs from the power and energy absorbing electric current to offer electric current；

3rd diode, has negative electrode and anode, and its negative electrode is coupled to the first input end of described output amplifier stage, its anode coupling It is connected to the outfan of described second imbalance amplifier；And

4th diode, has negative electrode and anode, and its negative electrode is coupled to the second input of described output amplifier stage, its anode coupling It is connected to the outfan of described second imbalance amplifier.

21. voltage amplification system according to claim 17, wherein, it is logical with electric discharge that described charge and discharge path includes charging path Road,

Described charging path includes：

First current source, has first end and the second end, and its first input end is coupled to the 3rd potential；

First resistor, has first end and the second end, and its first end is coupled to the second end of described first current source；

Second resistance, has first end and the second end, and its first end is coupled to the second end of described first current source；

The first transistor, has first end, the second end and control end, and its second end is coupled to the second end of described first resistor, Its control end is coupled to the first input end of described input amplifier stage；

Transistor seconds, has first end, the second end and control end, and its second end is coupled to the second end of described second resistance, Its control end is coupled to the second input of described input amplifier stage；

Third transistor, has first end, the second end and control end, and its first end is coupled to the first of described the first transistor End, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

4th transistor, has first end, the second end and control end, and its first end is coupled to the first of described transistor seconds End, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

5th transistor, has first end, the second end and control end, and its second end is coupled to the 4th potential, and its control end couples Control end to described third transistor；

6th transistor, has first end, the second end and control end, and its second end is coupled to the 4th potential, and its control end couples Control end to described 4th transistor；

7th transistor, has first end, the second end and control end, and its first end is coupled to the first of described 5th transistor End, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；

8th transistor, has first end, the second end and control end, and its first end is coupled to the first of described 6th transistor End, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；

9th transistor, has first end, the second end and control end, and its first end provides the first current signal, its second end coupling It is connected to described 3rd potential, its control end is coupled to the control end of described 7th transistor；

Tenth transistor, has first end, the second end and control end, and its first end provides the second current signal, its second end coupling It is connected to described 3rd potential, its control end is coupled to the control end of described 8th transistor；

3rd resistor, has first end and the second end, and its first end is coupled to the first end of described 9th transistor, its second end It is coupled to the 4th potential；

4th resistance, has first end and the second end, and its first end is coupled to the first end of described tenth transistor, its second end It is coupled to the 4th potential；

3rd amplifier, has first input end, the second input and outfan, and its first input end is coupled to described 3rd electricity The first end of resistance, its second input is coupled to the first end of described 4th resistance；

11st transistor, has first end, the second end and control end, and its second end is coupled to the first of described 4th resistance End, its control end is coupled to the outfan of described 3rd amplifier；

Tenth two-transistor, has first end, the second end and control end, and its first end is coupled to the of described 11st transistor One end, its second end is coupled to described 3rd potential, and its control end is coupled to its first end；

13rd transistor, has first end, the second end and control end, the first input of output amplifier stage described in its first end End, its second end is coupled to described 3rd potential, and its control end is coupled to the control end of described tenth two-transistor；And

23rd transistor, has first end, the second end and control end, and its first end is coupled to the of described output amplifier stage Two inputs, its second end is coupled to described 3rd potential, and its control end is coupled to the control end of described tenth two-transistor；

Described discharge path includes：

Second current source, has first end and the second end, and its first input end is coupled to the 3rd potential；

5th resistance, has first end and the second end, and its first end is coupled to the second end of described second current source；

6th resistance, has first end and the second end, and its first end is coupled to the second end of described second current source；

14th transistor, has first end, the second end and control end, and its second end is coupled to the second of described 5th resistance End, its control end is coupled to the first input end of described input amplifier stage；

15th transistor, has first end, the second end and control end, and its second end is coupled to the second of described 6th resistance End, its control end is coupled to the second input of described input amplifier stage；

16th transistor, has first end, the second end and control end, and its first end is coupled to the of described 14th transistor One end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

17th transistor, has first end, the second end and control end, and its first end is coupled to the of described 15th transistor One end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；

18th transistor, has first end, the second end and control end, and its first end provides the 4th current signal, its second end It is coupled to the 4th potential, its control end is coupled to the control end of described 16th transistor；

19th transistor, has first end, the second end and control end, and its first end provides the 5th current signal, its second end It is coupled to the 4th potential, its control end is coupled to the control end of described 17th transistor；

7th resistance, has first end and the second end, and its first end is coupled to the first end of described 18th transistor, and it second End is coupled to described 3rd potential；

8th resistance, has first end and the second end, and its first end is coupled to the first end of described 19th transistor, and it second End is coupled to described 3rd potential；

4th amplifier, has first input end, the second input and outfan, and its first input end is coupled to described 7th electricity The first end of resistance, its second input is coupled to the first end of described 8th resistance；

20th transistor, has first end, the second end and control end, and its second end is coupled to the first of described 7th resistance End, its control end is coupled to the outfan of described 4th amplifier；

21st transistor, has first end, the second end and control end, and its first end is coupled to described 20th transistor First end, its second end is coupled to the 4th potential, and its control end is coupled to its first end；And

20th two-transistor, has first end, the second end and control end, and its first end is coupled to the of described output amplifier stage One input, its second end is coupled to the 4th potential, and its control end is coupled to the control end of described 21st transistor；And

24th transistor, has first end, the second end and control end, and its first end is coupled to the of described output amplifier stage Two inputs, its second end is coupled to the 4th potential, and its control end is coupled to the control end of described 20th two-transistor.