CN103124171A - Periphery reset control circuit of digital power amplifier chip and digital television all-in-one machine - Google Patents
Periphery reset control circuit of digital power amplifier chip and digital television all-in-one machine Download PDFInfo
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- CN103124171A CN103124171A CN201110369428XA CN201110369428A CN103124171A CN 103124171 A CN103124171 A CN 103124171A CN 201110369428X A CN201110369428X A CN 201110369428XA CN 201110369428 A CN201110369428 A CN 201110369428A CN 103124171 A CN103124171 A CN 103124171A
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Abstract
The invention relates to a periphery reset control circuit of a digital power amplifier chip. The periphery reset control circuit of the digital power amplifier chip comprises a first electricity source coupled to a switch control circuit, a first switch transistor, a second switch transistor and a second electricity source, wherein the switch control circuit comprises a first output end and a second output end, a base electrode of the first switch transistor is coupled to the first output end of the switch control circuit, an emitter of the first switch transistor is coupled to the second output end of the switch control circuit, a collecting electrode of the first switch transistor is coupled to a base electrode of the second switch transistor through a first current limit resistor, an emitter of the second switch transistor is grounded, a collecting electrode of the second switch transistor is coupled to a reset lead foot of the digital power amplifier chip, and the second electricity source is coupled to the collecting electrode of the second switch transistor through a second current limit resistor. The control circuit can reset the digital power amplifier chip effectively so as to achieve automatic muting when a machine is started up or shut down.
Description
Technical field
The invention belongs to digital TV field, relate in particular to a kind of digital power amplifier chip periphery reset control circuit and digital TV integrated machine.
Background technology
In prior art, when exploitation LCD TV audio frequency enlarging function, can adopt the digital audio power amplifier chips.When adopting analog input digital power amplifier chip, PCB fabric swatch cabling is had relatively high expectations, when the design circuit cabling is bad, can cause low noise large, and when switching on and shutting down, because the electrifying timing sequence difference is not controlled, easily produce larger noise.
In addition, after existing mute circuit needs the user to send quiet control command by remote controller, quiet control signal input in digital television module triggers quiet control signal output output mute signal according to quiet control command, quiet control command can only be sent under the digital TV integrated machine running status, can't automatically carry out quiet processing when digital TV integrated machine carries out the open and close machine.
Summary of the invention
The invention provides and a kind ofly can carry out quiet digital power amplifier chip periphery reset control circuit and digital TV integrated machine when the open and close machine.
Digital power amplifier chip periphery reset control circuit provided by the invention comprises the first power supply, is coupled to ON-OFF control circuit; Described ON-OFF control circuit comprises the first output and the second output; The first switching transistor, the base stage of described the first switching transistor is coupled to described first output of described ON-OFF control circuit, the emitter-base bandgap grading of described the first switching transistor is coupled to described second output of described ON-OFF control circuit, and the collector electrode of described the first switching transistor is coupled to the transistorized base stage of second switch by the first current-limiting resistance; Described second switch transistor, the transistorized emitter grounding of described second switch, the transistorized collector electrode of described second switch is coupled to the reset pin of described digital power amplifier chip; And second source, be coupled to the transistorized collector electrode of described second switch by the second current-limiting resistance.
Wherein, described ON-OFF control circuit comprises:
The first resistance, the first end of described the first resistance are coupled to described the first power supply;
The second resistance, the first end of described the second resistance are coupled to the second end of described the first resistance, and the second end of described the second resistance is coupled to the first output of described ON-OFF control circuit;
The first diode, the negative pole of described the first diode are coupled to the second output of described ON-OFF control circuit, and the positive pole of described the first diode is coupled to the described first end of described the second resistance;
The second diode, the negative pole of described the second diode are coupled to the described first end of described the second resistance, and the positive pole of described the second diode is coupled to the first output of described ON-OFF control circuit;
The first electric capacity, the first end of described the first electric capacity are coupled to the second output of described ON-OFF control circuit, the second end ground connection of described the first electric capacity;
The second electric capacity, the first end of described the second electric capacity are coupled to the first output of described ON-OFF control circuit, the second end ground connection of described the second electric capacity; And
The 3rd resistance, the first end of described the 3rd resistance are coupled to the second output of described ON-OFF control circuit, the second end ground connection of described the 3rd resistance.
Wherein, the collector electrode of described the first switching transistor is by pull down resistor ground connection.
Wherein, described the first switching transistor is NPN type triode.
Wherein, described second switch transistor is the positive-negative-positive triode.
Wherein, also comprise the standby reset control circuit, be coupled to the transistorized base stage of described second switch by described the first current-limiting resistance.
Wherein, described standby reset control circuit comprises the 3rd diode, and the positive pole of the 3rd diode is coupled to the I/O mouth, and negative pole couples the collector electrode of described the first switching transistor.
The present invention also provides a kind of digital TV integrated machine, comprises above-mentioned digital power amplifier chip periphery reset control circuit.
Digital power amplifier chip periphery reset control circuit provided by the invention can effectively reset to digital power amplifier chips, the automatic mute when realizing switching on and shutting down.
Description of drawings
Fig. 1 is the peripheral reset control circuit according to the digital power amplifier chip of the embodiment of the present invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.
Fig. 1 is the peripheral reset control circuit according to the digital power amplifier chip of the embodiment of the present invention.Reset control circuit comprises power Vcc 1, power Vcc 2, ON-OFF control circuit 102, standby reset control circuit 104, switching transistor Q1, switching transistor Q2.Power Vcc 1 is coupled to ON-OFF control circuit 102.ON-OFF control circuit 102 comprises output terminals A and output B.The base stage of switching transistor Q1 is coupled to the output terminals A of ON-OFF control circuit, and the emitter-base bandgap grading of switching transistor Q1 is coupled to the output B of ON-OFF control circuit 102, and the collector electrode of switching transistor Q1 is coupled to the base stage of switching transistor Q2 by current-limiting resistance R7.The emitter grounding of switching transistor Q2, the collector electrode of switching transistor Q2 are coupled to the reset pin AMP-RESET of digital power amplifier chip.Power Vcc 2 is coupled to the collector electrode of switching transistor Q2 by current-limiting resistance R6.Standby reset control circuit 104 is coupled to the base stage of switching transistor Q2 by current-limiting resistance R7.
ON-OFF control circuit 102 comprises resistance R 1, resistance R 2, resistance R 4, capacitor C 1, capacitor C 2, diode D1 and diode D2.The first end of resistance R 1 is coupled to power Vcc 1.The first end of resistance R 2 is coupled to the second end of resistance R 1, and the second end of resistance R 2 is coupled to the output terminals A of ON-OFF control circuit 102.The negative pole of diode D1 is coupled to the output B of ON-OFF control circuit 102, and the positive pole of diode D1 is coupled to the first end of resistance R 2.The negative pole of diode D2 is coupled to the first end of resistance R 2, and the positive pole of diode D2 is coupled to the output terminals A of ON-OFF control circuit 102.Capacitor C 1 first end is coupled to the output B of ON-OFF control circuit 102, the second end ground connection of capacitor C 1.The first end of capacitor C 2 is coupled to the output terminals A of ON-OFF control circuit 102, the second end ground connection of capacitor C 2.The first end of resistance R 4 is coupled to the output B of ON-OFF control circuit 102, the second end ground connection of resistance R 4.
Standby reset control circuit 104 comprises diode D3.The positive pole of diode D3 is coupled to the I/O mouth that CPU controls, and negative pole is coupled to the base stage of switching transistor Q2 by current-limiting resistance R7.
The collector electrode of the first switching transistor Q1 is by pull down resistor R5 ground connection.
Vcc1 uses the 24V supply voltage in this embodiment, and Vcc2 uses the 5V supply voltage.Switching transistor Q1 is NPN type triode, and Q2 is the positive-negative-positive triode.But the understanding that it will be apparent to those skilled in the art, the present embodiment are only for the present invention is described, are not in order to restriction.
The course of work of peripheral reset control circuit in four kinds of situations of the digital power amplifier chip of the embodiment of the present invention described below with reference to Fig. 1:
During start, the 24V voltage of power Vcc 1 powers on, diode D1 conducting, diode D2 cut-off.Power Vcc 1 is given capacitor C 1 and charges to capacitor C 2 by resistance R 1, R2 by resistance R 1.According to capacitor charging time formula τ=R*C, select by parameter that resistance R 1, R2 and capacitor C 1, C2 are fit to, make the C1 charging interval fast, i.e. the * C2 of R1*C1＜(R1+R2).So, the voltage of the output B of ON-OFF control circuit 102 makes switching transistor Q1 conducting higher than the voltage of output terminals A, and makes switching transistor Q2 conducting by resistance R 7.At this moment, the current collection of switching transistor Q2 low level very.Due to reset pin AMP-RESET Low level effective, therefore, this moment, the digital power amplifier chip was reset.
Along with capacitor C 2 voltages raise, after a period of time, the base voltage of switching transistor Q1 raises, thereby makes switching transistor Q1 cut-off.Switching transistor not conducting of Q1 and make switching transistor Q2 cut-off, this moment, reset pin AMP-RESET was high level, thereby completed resetting of digital audio-power amplifier chip.After resetting, the digital audio-power amplifier chip is in mute state, after the whole set of television running software is completed, passes through I
2The releasing of C control line is quiet to the digital audio power amplifier chips, and television set can normally be watched.
During normal the use, diode D3 is coupled to complete machine CPU and controls the I/O mouth.When normally watching, this I/O mouth is low level, software remove by bus quiet before, can be high level.
When standby, in order to reduce consumption, the 5V network voltage of power Vcc 2 is turned off by metal-oxide-semiconductor on TV motherboard, when standby is started shooting, needs CPU to pass through I
2The releasing of C control line is quiet to the audio frequency power amplifier chip.
When shutdown, the rapid power down of the 24V of power Vcc 1.This moment, capacitor C 1 and C2 will discharge, diode D2 conducting, diode D1 cut-off.Due to the rapid power down of power Vcc 1, and capacitor C 1 need to slowly be discharged, thereby make the voltage of output B of ON-OFF control circuit 102 higher than the voltage of output terminals A, thereby make switching transistor Q1 conducting, so also make switching transistor Q2 conducting, making reset pin AMP-RESET is low level.Meanwhile, also power down rapidly of the 5V voltage of power Vcc 2 during shutdown, the collector voltage that also satisfies switching transistor Q2 reduces, and makes the digital audio-power amplifier chip quiet.
In addition, the embodiment of the present invention also provides a kind of digital TV integrated machine, and it comprises the digital power amplifier chip periphery reset control circuit of above-described embodiment, and concrete operation principle in the existing description of preamble, repeats no more herein.
" coupling " alleged in the present patent application file comprises direct connection and indirect joint; the above is only preferred embodiment of the present invention; not in order to limit the present invention; all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.
Claims (8)
1. a digital power amplifier chip periphery reset control circuit, is characterized in that, comprising:
The first power supply is coupled to ON-OFF control circuit;
Described ON-OFF control circuit comprises the first output and the second output;
The first switching transistor, the base stage of described the first switching transistor is coupled to described first output of described ON-OFF control circuit, the emitter-base bandgap grading of described the first switching transistor is coupled to described second output of described ON-OFF control circuit, and the collector electrode of described the first switching transistor is coupled to the transistorized base stage of second switch by the first current-limiting resistance;
Described second switch transistor, the transistorized emitter grounding of described second switch, the transistorized collector electrode of described second switch is coupled to the reset pin of described digital power amplifier chip; And
Second source is coupled to the transistorized collector electrode of described second switch by the second current-limiting resistance.
2. digital power amplifier chip periphery reset control circuit as claimed in claim 1, is characterized in that, described ON-OFF control circuit comprises:
The first resistance, the first end of described the first resistance are coupled to described the first power supply;
The second resistance, the first end of described the second resistance are coupled to the second end of described the first resistance, and the second end of described the second resistance is coupled to the first output of described ON-OFF control circuit;
The first diode, the negative pole of described the first diode are coupled to the second output of described ON-OFF control circuit, and the positive pole of described the first diode is coupled to the described first end of described the second resistance;
The second diode, the negative pole of described the second diode are coupled to the described first end of described the second resistance, and the positive pole of described the second diode is coupled to the first output of described ON-OFF control circuit;
The first electric capacity, the first end of described the first electric capacity are coupled to the second output of described ON-OFF control circuit, the second end ground connection of described the first electric capacity;
The second electric capacity, the first end of described the second electric capacity are coupled to the first output of described ON-OFF control circuit, the second end ground connection of described the second electric capacity; And
The 3rd resistance, the first end of described the 3rd resistance are coupled to the second output of described ON-OFF control circuit, the second end ground connection of described the 3rd resistance.
3. digital power amplifier chip periphery reset control circuit as claimed in claim 1, is characterized in that, the collector electrode of described the first switching transistor is by pull down resistor ground connection.
4. digital power amplifier chip periphery reset control circuit as claimed in claim 1, is characterized in that, described the first switching transistor is NPN type triode.
5. digital power amplifier chip periphery reset control circuit as claimed in claim 1, is characterized in that, described second switch transistor is the positive-negative-positive triode.
6. digital power amplifier chip periphery reset control circuit as claimed in claim 1, is characterized in that, also comprises the standby reset control circuit, is coupled to the transistorized base stage of described second switch by described the first current-limiting resistance.
7. digital power amplifier chip periphery reset control circuit as claimed in claim 6, is characterized in that, described standby reset control circuit comprises the 3rd diode, and the positive pole of the 3rd diode is coupled to the I/O mouth, and negative pole couples the collector electrode of described the first switching transistor.
8. a digital TV integrated machine, is characterized in that comprising as the described digital power amplifier chip periphery of claim 1-7 any one reset control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110369428XA CN103124171A (en) | 2011-11-21 | 2011-11-21 | Periphery reset control circuit of digital power amplifier chip and digital television all-in-one machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110369428XA CN103124171A (en) | 2011-11-21 | 2011-11-21 | Periphery reset control circuit of digital power amplifier chip and digital television all-in-one machine |
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| Publication Number | Publication Date |
|---|---|
| CN103124171A true CN103124171A (en) | 2013-05-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110369428XA Pending CN103124171A (en) | 2011-11-21 | 2011-11-21 | Periphery reset control circuit of digital power amplifier chip and digital television all-in-one machine |
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| CN (1) | CN103124171A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5523709A (en) * | 1994-11-30 | 1996-06-04 | Sgs-Thomson Microelectronics, Inc. | Power-on reset circuit and method |
| CN101383605A (en) * | 2007-09-07 | 2009-03-11 | 康佳集团股份有限公司 | Reset circuit for opening/closing |
| CN201986052U (en) * | 2011-03-29 | 2011-09-21 | 青岛海信电器股份有限公司 | Chip reset circuit and television comprising same |
-
2011
- 2011-11-21 CN CN201110369428XA patent/CN103124171A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5523709A (en) * | 1994-11-30 | 1996-06-04 | Sgs-Thomson Microelectronics, Inc. | Power-on reset circuit and method |
| CN101383605A (en) * | 2007-09-07 | 2009-03-11 | 康佳集团股份有限公司 | Reset circuit for opening/closing |
| CN201986052U (en) * | 2011-03-29 | 2011-09-21 | 青岛海信电器股份有限公司 | Chip reset circuit and television comprising same |
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Application publication date: 20130529 |