CN103124168A - Digital filtering method - Google Patents
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- CN103124168A CN103124168A CN 201110370747 CN201110370747A CN103124168A CN 103124168 A CN103124168 A CN 103124168A CN 201110370747 CN201110370747 CN 201110370747 CN 201110370747 A CN201110370747 A CN 201110370747A CN 103124168 A CN103124168 A CN 103124168A
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Abstract
The invention provides a method and a device for digital filtering. The method comprises the steps of conducting edge extraction on input signals to be subjected to finite impulse response (FIR) filtering to obtain step signals; reading unit step responses from a unit step response list stored in advance; multiplying the magnitude of step signals by unit step responses to obtain step responses; and summating all step responses to obtain filtering results of the FIR filtering of input signals. By the aid of the method and the device, the problem that a large amount of multiplying units and summing units are required by FIR filters in the prior art can be solved, the usage of hardware resources is reduced, and the operation efficiency of systems can be improved.
Description
Technical field
The present invention relates to digital signal processing technique field, in particular to a kind of digital filtering method and device.
Background technology
In present digital information processing system, digital filter is widely used in the filtering of interference, the extraction of useful signal, the each side such as shaping of signal.Digital filter can be divided into two kinds according to the time domain specification of its impulse response function, i.e. endless impulse response (IIR) filter and limit for length's impulse response (FIR) filter arranged.The unit impulse response of FIR filter can only continue for some time, and it is used widely on engineering owing to can realizing easily linear phase characteristic and easy the realization.
Finite Impulse Response filter realizes by the multiply accumulating computing, and input signal x (n) is the process that linear convolution is carried out in an input signal and unit impulse response through FIR filter process, that is:
Wherein y (n) is the output of filter, and h (i) is the pulse response of filter, and L-1 is the exponent number of filter.Can find out from expression formula, export at every turn that y (n) need to carry out L multiplication and the operation of L-1 sub-addition realizes.
Traditional multiply accumulating device structure need to be used L multiplier and L-1 adder, and along with the exponent number of filter is larger, the multiplier and the adder that need are more, and the hardware resource that takies is also just larger.For some special application scenarios, the for example forward direction waveform shaping filtering of ultrahigh-frequency passive radio-frequency identification reader, its input waveform is square wave or staircase waveform, need to use the FIR filter of high-order in order to reach filter effect preferably, if adopt traditional multiply accumulating structure, can take a large amount of hardware resources, increase the cost of equipment.
Summary of the invention
Main purpose of the present invention is to provide a kind of digital filtering method and device, to solve at least when inputting waveform as square wave or staircase waveform, can solve FIR filter in prior art needs the problem of a large amount of multipliers and adder, has reached to reduce the effect that hardware resource uses, improves running efficiency of system.
According to an aspect of the present invention, provide a kind of digital filtering method, having comprised: the input signal that needs are carried out FIR filtering carries out the edge and extracts and obtain step signal; Output unit step response from pre-stored unit step response table; The amplitude of step signal and unit step response are multiplied each other obtain step response; All step response summations are obtained input signal is carried out the filtering result of FIR filtering.
The input signal that needs is carried out FIR filtering carries out comprising along extracting the step that obtains step signal: extract step signal when input signal occurs along saltus step.
The input signal that needs is carried out FIR filtering carry out the edge extract obtain step signal before, digital filtering method also comprises: calculate the unit step response of FIR filter, the unit step response data are stored in the unit step response table.
Output unit step response and the amplitude of described step signal and the described unit step response step that obtains step response that multiplies each other is comprised from pre-stored unit step response table: when the step response module has detected step signal, buffer is refreshed, the Output rusults that the step response module is current feeds back to buffer, and is kept in buffer as reference signal; Obtain described unit step response from described unit step response table, and the amplitude of described step signal and unit step response are input to multiplier carry out multiplication operations; The Output rusults of multiplier and reference signal are input to respectively adder carry out sum operation, and the result that will sue for peace is as the Output rusults of step response module.
If the minimum time interval that input signal changes arranges a step response module greater than the step response time length of FIR filter; If the minimum time interval that input signal changes is less than the step response time length of FIR filter, a plurality of step response modules are set, step signal is distributed to a plurality of step response modules successively, wherein, each step response module output Output rusults separately, and then the Output rusults of all step response modules is sued for peace.
The step that summation obtains input signal is carried out the filtering result of FIR filtering to all step response also comprises: if adopt the scope of two's complement arithmetic or Output rusults to satisfy maximum and the minimum value of input signal and response data product, the Output rusults that occurs overflowing is not processed.
According to a further aspect in the invention, provide a kind of digital filter apparatus, having comprised: along extraction unit, carried out the edge extraction for the input signal that needs is carried out FIR filtering and obtain step signal; Lookup unit is used for from pre-stored unit step response table output unit step response; Processing unit, being used for the amplitude of step signal and unit step response are multiplied each other obtains step response, and all step response summations is obtained input signal is carried out the filtering result of FIR filtering.
Digital filter apparatus also comprises: computing unit, the unit step response that is used for calculating the FIR filter; Memory cell is used for the unit step response data of FIR filter are stored in described unit step response table.
Processing unit comprises: buffer feeds back to buffer for the Output rusults that processing unit is current when step signal being detected, and is kept in buffer as reference signal; Multiplier, multiplication operations is carried out in the amplitude and the unit step response that are used for step signal; First adder be used for the Output rusults of multiplier output and the reference signal of buffer output are carried out sum operation, and the result that will sue for peace is as the Output rusults of processing module.
If the minimum time interval that input signal changes is less than the step response time length of FIR filter, a plurality of processing modules are set, step signal is distributed to a plurality of processing modules successively, wherein, device also comprises: second adder is used for the Output rusults of each processing module output is sued for peace.
In the present invention, by extracting step signal, the output step response of tabling look-up, and the method that step response is superposeed, realized efficient FIR filtering calculating, hardware configuration corresponding to this mode be simple, it is considerably less to take hardware resource, can solve the problem that FIR filter in prior art needs a large amount of multipliers and adder, reached and reduced the effect that resource is used, improved running efficiency of system.
Description of drawings
Accompanying drawing described herein is used to provide a further understanding of the present invention, consists of the application's a part, and illustrative examples of the present invention and explanation thereof are used for explaining the present invention, do not consist of improper restriction of the present invention.In the accompanying drawings:
Fig. 1 is the structural representation according to the digital FIR filter of the embodiment of the present invention;
Fig. 2 is the schematic diagram according to the step response module of the embodiment of the present invention;
Fig. 3 is a kind of preferred flow chart according to the digital filtering method of the embodiment of the present invention;
Fig. 4 is the pulse response curve according to 649 rank FIR low pass filters of the embodiment of the present invention;
Fig. 5 is the schematic diagram according to the unit-step nsponse curve of the FIR filter of the embodiment of the present invention;
Fig. 6 is the schematic diagram according to an input step signal waveform of the embodiment of the present invention;
Fig. 7 is the schematic diagram of each road step signal after the extraction module according to the process of the embodiment of the present invention;
Fig. 8 is 10 tunnel step responses according to the process step response module of the embodiment of the present invention;
Fig. 9 is the output waveform according to 3 tunnel step response modules of the embodiment of the present invention;
Figure 10 is the output waveform according to the embodiment of the present invention;
Figure 11 is the simulation waveform according to the embodiment of the present invention;
Figure 12 is the structure chart according to the digital filter apparatus of the embodiment of the present invention.
Embodiment
Unit step signal u (n) is unit step response s (n) by the impulse response that the FIR filter system produces, and its expression formula is:
Wherein h (i) is the pulse response of FIR filter.When input signal x (n) was square wave or staircase waveform, its time domain waveform changed slowly, and the most of the time keeps constant level, and we can be according to the hopping edge of input signal (for example at t
1～t
kK produces saltus step, k 〉=1 constantly altogether) input signal is decomposed into a plurality of step signal sums:
A wherein
kT
kThe amplitude of step signal occurs constantly.Because the FIR filter is linear time invariant system, according to superposition theorem:
Can find out from above-mentioned formula, each step signal component independent role is the impulse response of this input signal x (n) under filter in the step response sum of filter.
For achieving the above object, the present embodiment provides a kind of digital FIR filter, as shown in Figure 1, this digital FIR filter comprises: along extraction module 101, distributor 102, step response pond the 103, the 0 tunnel step response module 104, the 1 tunnel step response module 105, the 2 tunnel step response module 106, N-1 road step response module 107 and adder 108.
Fig. 2 is that it comprises according to the schematic diagram of the step response module of the embodiment of the present invention: the unit step response table 203 of detecting unit 201, pointer counter 202, FIR filter, multiplier 204, buffer 205 and adder 206.
All parts in Fig. 1 and Fig. 2 can be realized Finite Impulse Response filter by the method for looking into the step response table, when input signal is square wave or staircase waveform, can solve FIR filter in prior art needs the problem of a large amount of multipliers and adder, has reached to reduce the effect that hardware resource uses, improves running efficiency of system.
Describe concrete filtering in detail below in conjunction with accompanying drawing.
As depicted in figs. 1 and 2, the filtering method of the present embodiment comprises the following steps:
Step S1: calculate the unit step response of FIR filter, the unit step response data are stored in a table.
Step S2: input signal x (n) extracts through carry out the edge along extraction module 101, extracts step signal in the moment that occurs along saltus step.
Step S3: step signal is distributed to N road step response module in step response pond 103 in order successively through distributor 102.The value of N is not less than the change frequency of the maximum that input signal occurs in unit step response length.
The internal processes of each step response module is as shown in Figure 2: the step signal after distributing is sent into detecting unit 201 and is detected, three groups of signals of detecting unit output: the amplitude of triggering signal, enabling signal and step signal.When step signal having been detected, detecting unit 201 output triggering signals refresh buffer 205, will work as the front module Output rusults and preserve as output reference by buffer; Meanwhile, enabling signal starts pointer counter 202 tables look-up, and takes out successively data in unit step response table 203 by pointer; The amplitude of getting table data and step signal is input to multiplier 204 and multiplies each other; The output of multiplier and reference signal are input to respectively adder 206, and its addition result is as the output of this step response module.
Step S4: the N road phase step response signals S of step response pond 103 outputs
0S
1S
2... .S
N-1Input to adder 108 and carry out the addition summation, its summed result is the output of this FIR filter.
In each step response module, owing to there being adder 206, therefore may run into the situation that adder 206 Output rusults overflow, the positive step signal plus of continuous two rising edges for example, result is overflowed and negative occurred.Can prevent from overflowing by expansion valid data figure place when this situation occurring; Perhaps, can be below satisfying do not process overflowing result during 2 conditions: 1) adopt two's complement arithmetic; 2) guarantee that the output area of last adder 108 can satisfy maximum and the minimum value of input signal x (n) and unit step response product.
Based on filter illustrated in figures 1 and 2, the present invention also provides a kind of preferred digital filtering method, and as shown in Figure 3, it comprises the steps:
S302, the input signal that needs are carried out FIR filtering carry out the edge and extract and obtain step signal;
S304, output unit step response from pre-stored unit step response table;
S306, the amplitude of step signal and unit step response are multiplied each other obtains step response;
S308 sues for peace to all step response and obtains input signal is carried out the filtering result of FIR filtering.
In this preferred embodiment, by extracting step signal, the output step response of tabling look-up, and the method that step response is superposeed, realized efficient FIR filtering calculating, hardware configuration corresponding to this mode be simple, it is considerably less to take hardware resource, can solve the problem that FIR filter in prior art needs a large amount of multipliers and adder, reached and reduced the effect that resource is used, improved running efficiency of system.
The input signal that needs is carried out FIR filtering carries out comprising along extracting the step that obtains step signal: extract step signal when input signal occurs along saltus step.In the present embodiment, can extract exactly step signal by input signal along saltus step.
The input signal that needs is carried out FIR filtering carry out the edge extract obtain step signal before, digital filtering method also comprises: the unit step response of calculating the FIR filter; The unit step response data are stored in the unit step response table.By this mode of tabling look-up, can obtain rapidly the unit step response of FIR filter, improved the arithmetic speed of system.
Output unit step response and the amplitude of described step signal and the described unit step response step that obtains step response that multiplies each other is comprised from pre-stored unit step response table: when the step response module has detected step signal, buffer is refreshed, the Output rusults that the step response module is current feeds back to buffer, and is kept in buffer as reference signal; Obtain described unit step response from described unit step response table, and the amplitude of described step signal and unit step response are input to multiplier carry out multiplication operations; The Output rusults of multiplier and reference signal are input to respectively adder carry out sum operation, and the result that will sue for peace is as the Output rusults of step response module.In the present embodiment, by current Output rusults is carried out cumulative addition, can realize only both can having obtained described input signal is carried out the filtering result of FIR filtering by less adder and multiplier, thereby greatly simplify hardware configuration, reduce complexity and the cost of system.
If the minimum time interval that input signal changes arranges a step response module greater than the step response time length of FIR filter; If the minimum time interval that input signal changes is less than the step response time length of FIR filter, a plurality of step response modules are set, step signal is distributed to a plurality of step response modules successively, wherein, each step response module output Output rusults separately, and then the Output rusults of all step response modules is sued for peace.In the present embodiment, by different input signals is arranged different processing modules, increased applicability of the present invention.
The step that summation obtains input signal is carried out the filtering result of FIR filtering to all step response also comprises: if adopt the scope of two's complement arithmetic or Output rusults to satisfy maximum and the minimum value of input signal and response data product, the Output rusults that occurs overflowing is not processed.
Below in conjunction with drawings and the specific embodiments, two embodiment of the present invention are further described in more detail:
First embodiment is the low-pass FIR filter on 649 rank of design, Fig. 4 is the pulse response curve of this FIR filter, Fig. 5 is the unit step response of this FIR filter, Fig. 6 is input signal, and its waveform is the step ripple, and the maximum change frequency that occurs in the unit step response length of filter is 3, N is not less than 3, preferably, N value in this example is 3, and there are 3 step response modules in the step response pond.
S1: calculate the unit step response of 649 rank low-pass FIR filters, the unit step response data are stored in a table.Fig. 5 is the unit-step nsponse curve of this filter.
S2: extracting along in extraction module, input signal being carried out the edge, obtain the step signal of multichannel.In Fig. 7, the 0 road signal is input signal, and the 1st～10 road signal is respectively along each road step signal of extracting rear output.
S3: in dispenser module, step signal is counted, distribute to successively in order 3 step response modules in the step respective cells according to count results: wherein step signal (1,4,7,10) by the 0 tunnel step response module, step signal (2,5,8) by the 1 tunnel step response module, step signal (3,6,9) by the 2 tunnel step response module.
S4: in each step response module, step signal is sent into detecting unit and is detected, and when step signal being detected, will work as the front module Output rusults and preserve as output reference by buffer; Start simultaneously pointer counter and table look-up, the amplitude of table look-up output data and step signal multiplies each other, and multiplied result and output reference add up to the output of this road step response module.
In Fig. 8 emulation the step response of 10 tunnel step signals in Fig. 6.The 0 the tunnel is input signal, and the 1st～10 the tunnel is the step response of each step signal.
S in Fig. 9
0, S
1And S
2Signal is respectively three step modules outputs in the step response pond.
S5: the phase step response signals S of step response pond output
0, S
1, S
2Input to adder and carry out addition, its addition result is the output of this FIR filter, and Figure 10 is through the waveform after adder, is also the output waveform of the present invention's the first example.
Above-mentioned example needs 3 multipliers and 4 adders to realize, if the Finite Impulse Response filter that adopts the multiply accumulating structure to realize, need to use 650 multipliers and 649 adders, even because the FIR filter has symmetrical structure, can make number of multipliers reduce by half, also need at least 325 multipliers and 649 adders.
Second embodiment is in order to illustrate when the step response module satisfies 2 conditions, can to overflow result and not process.What this embodiment adopted is 623 rank FIR low pass filters.As shown in the first via waveform of Figure 11, input signal is one group of square wave, and the maximum change frequency that occurs in the unit step response length of filter is 1, and during design, the N value is 2, and there are two step response modules in the step response pond.
Input signal is through the extraction along extraction module, and the positive step signal of rising edge is all distributed to the 0 tunnel step response module, and the negative step signal of trailing edge is distributed to the 1 tunnel step response module.In Figure 11 the second road and Third Road are respectively the output waveforms of two modules, in the 0 the tunnel, are all the positive step signals of rising edge due to what process, and upwards stack of output response causes exporting data overflowing along 1001 places, becomes negative.In like manner, the 1 the tunnel what process is all the negative step signal of trailing edge, and the output data are overflowed in along 1002, become positive number.Two conditions have been satisfied during due to this design of filter: adopt the output area of two's complement arithmetic and last 109 adders can satisfy maximum and the minimum value of input signal and unit step response product, therefore do not process the overflow data of two-way step response module.In Figure 11 the four tunnel is this FIR filter Output rusults, and this result is consistent with the result of conventional method multiply accumulating and structure output.
Can find out from two examples and simulation result thereof, when the input waveform is staircase waveform or square wave, adopt method of the present invention can solve the problem that FIR filter in prior art needs a large amount of multipliers and adder, reached and reduced the effect that resource is used, improved running efficiency of system.
Figure 12 is that it comprises according to the structure chart of the digital filter apparatus of the embodiment of the present invention: along extraction unit 1202, carry out the edge extraction for the input signal that needs is carried out FIR filtering and obtain step signal; Search unit 1204, be connected with being connected with memory cell along extraction unit 1202, be used for from pre-stored unit step response table output unit step response; Processing unit 1206 and is searched unit 1204 and is connected, and is used for the amplitude of described step signal and unit step response are multiplied each other obtaining step response, and all step response summations is obtained described input signal is carried out the filtering result of FIR filtering.
In the present embodiment, obtain corresponding response data with step signal by the mode of searching, making it possible to carry out rapidly filtering calculates, hardware configuration corresponding to this mode be simple, it is considerably less to take hardware resource, can solve FIR filter in prior art needs the problem of a large amount of multipliers and adder, has reached to reduce the effect that resource is used, improved running efficiency of system.
In the input signal that needs is carried out FIR filtering carries out obtaining the step of step signal along extraction, when occuring along saltus step, input signal extracts step signal along extraction unit 1202.In the present embodiment, can extract exactly step signal by input signal along saltus step.
Digital filter apparatus also comprises: computing unit 1208, the unit step response that is used for calculating the FIR filter; Memory cell 1210 is connected with computing unit 1208, is used for the unit step response data of FIR filter are stored in described unit step response table.By this mode of tabling look-up, can obtain rapidly the unit step response of FIR filter, improved the arithmetic speed of system.
Processing unit 1206 comprises: buffer feeds back to buffer for the Output rusults that processing unit is current when step signal being detected, and is kept in buffer as reference signal; Multiplier is used for multiplication operations is carried out in amplitude and the described unit step response of step signal; First adder be used for the Output rusults of multiplier output and the reference signal of buffer output are carried out sum operation, and the result that will sue for peace is as the Output rusults of processing module.The syndeton of above-mentioned buffer, multiplier and first adder can be with reference to structure shown in Figure 2.In the present embodiment, by current Output rusults is carried out cumulative addition, can realize only both can having obtained described input signal is carried out the filtering result of FIR filtering by less adder and multiplier, thereby greatly simplify hardware configuration, reduce complexity and the cost of system.
If the minimum time interval that input signal changes is less than the step response time length of FIR filter, a plurality of processing modules are set, step signal is distributed to a plurality of processing modules successively, wherein, digital filter apparatus also comprises: second adder 1212, be connected with processing unit 1206, be used for the Output rusults of each processing module output is sued for peace.In the present embodiment, by different input signals is arranged different processing modules, increased applicability of the present invention.
In summation obtains input signal is carried out the step of the filtering result of FIR filtering to all step response, if adopt the scope of two's complement arithmetic or Output rusults to satisfy maximum and the minimum value of input signal and response data product, 1206 pairs of Output rusults that occur overflowing of processing unit do not process.
obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with general calculation element, they can concentrate on single calculation element, perhaps be distributed on the network that a plurality of calculation elements form, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in storage device and be carried out by calculation element, and in some cases, can carry out step shown or that describe with the order that is different from herein, perhaps they are made into respectively each integrated circuit modules, perhaps a plurality of modules in them or step being made into the single integrated circuit module realizes.Like this, the present invention is not restricted to any specific hardware and software combination.
The above is only the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (6)
1. a digital filtering method, is characterized in that, comprising:
The input signal that needs are carried out FIR filtering carries out the edge and extracts and obtain step signal;
Read unit step response from pre-stored unit step response table;
The amplitude of described step signal and described unit step response are multiplied each other obtain step response;
All step response summations are obtained described input signal is carried out the filtering result of FIR filtering.
2. method according to claim 1, is characterized in that, the input signal that needs is carried out FIR filtering carries out comprising along extracting the step that obtains step signal:
When occuring along saltus step, described input signal extracts described step signal.
3. method according to claim 1, is characterized in that, the input signal that needs is carried out FIR filtering carry out the edge extract obtain step signal before, also comprise:
Calculate the unit step response of FIR filter;
Described unit step response data are stored in described unit step response table.
4. method according to claim 1, is characterized in that, output unit step response and the amplitude of described step signal and the described unit step response step that obtains step response that multiplies each other is comprised from pre-stored unit step response table:
When the step response module has detected described step signal, buffer is refreshed, the current Output rusults of described step response module is fed back to described buffer, and be kept in described buffer as reference signal;
Obtain described unit step response from described unit step response table, and the amplitude of described step signal and unit step response are input to multiplier carry out multiplication operations;
The Output rusults of described multiplier and described reference signal are input to respectively adder carry out sum operation, and the result that will sue for peace is as the Output rusults of described step response module.
5. method according to claim 4, is characterized in that, if the minimum time interval that described input signal changes arranges a described step response module greater than the step response time length of FIR filter; If the minimum time interval that described input signal changes is less than the step response time length of FIR filter, a plurality of described step response modules are set, described step signal is distributed to described a plurality of step response module successively, wherein, each described step response module output Output rusults separately, and then the Output rusults of all described step response modules is sued for peace.
6. the described method of any one according to claim 1 to 5, is characterized in that, the step that summation obtains described input signal is carried out the filtering result of FIR filtering to all step response also comprises:
If adopt the scope of two's complement arithmetic or described Output rusults to satisfy maximum and the minimum value of input signal and response data product, the Output rusults that occurs overflowing do not processed.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107911099A (en) * | 2017-12-27 | 2018-04-13 | 南京天际易达通信技术有限公司 | A kind of digital forming filtering method and filter |
| CN108036864A (en) * | 2017-11-06 | 2018-05-15 | 武汉航空仪表有限责任公司 | A kind of FIR filtering methods of tail-rotor temperature sensor signal |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108036864A (en) * | 2017-11-06 | 2018-05-15 | 武汉航空仪表有限责任公司 | A kind of FIR filtering methods of tail-rotor temperature sensor signal |
| CN107911099A (en) * | 2017-12-27 | 2018-04-13 | 南京天际易达通信技术有限公司 | A kind of digital forming filtering method and filter |
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Application publication date: 20130529 |