CN103124062B - ATM (automatic teller machine) intermittent running power device protection circuit - Google Patents
ATM (automatic teller machine) intermittent running power device protection circuit Download PDFInfo
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- CN103124062B CN103124062B CN201310014487.4A CN201310014487A CN103124062B CN 103124062 B CN103124062 B CN 103124062B CN 201310014487 A CN201310014487 A CN 201310014487A CN 103124062 B CN103124062 B CN 103124062B
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- protective circuit
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- 230000001681 protective effect Effects 0.000 claims description 38
- 230000000694 effects Effects 0.000 abstract description 5
- 230000001276 controlling effect Effects 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Abstract
The invention provides an ATM (automatic teller machine) intermittent running power device protection circuit. The protection circuit comprises an external control signal circuit, a protection circuit, a signal buffer circuit and an ATM internal power device, an input end of the protection circuit is connected with an output end of the external control signal circuit, the protection circuit is used for detecting a control signal of the external control signal circuit, identifying the signal and judging overtime of the signal, an input end of the signal buffer circuit is respectively connected with output ends of the external control signal circuit and the protection circuit, an output end of the signal buffer circuit is connected with an input end of the ATM internal power device, and the signal buffer circuit is used for outputting the signal to the ATM internal power device after performing logical combination judgment for the signal by integrating the signal of the protection circuit and the signal logic of the external control signal circuit, so that running of the power device needing protection is controlled. The ATM intermittent running power device protection circuit has stable, reliable, simple and practical effects and can achieve fine protection effects.
Description
Technical field
The present invention relates to ATM field, particularly relate to a kind of ATM intermittent duty power apparatus protective circuit.
Background technology
At present, along with the continuous increase of banks of China ATM, facilitating the common people, improve bank's own services efficiency, enliven financial market while, the maintenance of ATM also becomes one of work of each bank, in case due to ATM fault, bring unnecessary trouble to client.
Existing, the operation maintenance of ATM, adopts software control mostly, once software is out of control, equipment is energized for a long time and just likely causes apparatus overheat to burn.Thus cause the loss of bank and client.
Summary of the invention
The object of the present invention is to provide a kind of ATM intermittent duty power apparatus protective circuit, by the commutator equipment adopting monostable circuit to protect ATM inside, to avoid, ATM is overheated to be burnt.
The object of the invention is to be achieved through the following technical solutions.
A kind of ATM intermittent duty power apparatus protective circuit, comprising: an external control signal circuit, a protective circuit, a signal buffer circuit, an ATM internal power equipment;
The input of protective circuit is connected with external control signal circuit output end, for detecting the control signal of external control signal circuit, and carries out identification and time-out judgement to this signal;
Signal buffer circuit input connects with the output of external control signal circuit and protective circuit respectively; signal buffer circuit output is connected with the input of ATM internal power equipment; the signal of signal buffer circuit through general protective circuit and the signal logic of external control signal circuit; export ATM internal power equipment after logical combination judgement is carried out to signal to, control the operation of the power apparatus needing protection.
Preferably, described external control signal circuit is made up of the first integrated chip (U1A) and resistance R1, and its output is connected to protective circuit through build-out resistor R1, for generation of the switching drive signal controlling power apparatus.
Preferably, described first integrated chip (U1A) be MCU, digital signal processor or FPGA.
Preferably; described protective circuit is made up of the second integrated chip (U2A), resistance R2, resistance R3, electric capacity C1; the input of the second integrated chip (U2A) adjusts the time span or time window width that trigger by electric capacity C1 and resistance R2, its output is electrically connected with signal buffer circuit through resistance R3.
Preferably, described protective circuit also comprises a reverser (U4A), and its one end is connected with resistance R3, another termination signal buffer circuit.
Preferably, described second integrated chip (U2A) is an integrated monostable circuit element.
Preferably, described signal buffer circuit is made up of a logical device (U5B), resistance R4, the first input end of logical device (U5B) is connected with the output of reverser (U4A), its second input is connected with one end of resistance R1, the output termination ATM internal power equipment of logical device (U5B).
Preferably, described ATM internal power equipment comprises a power drive element (U6) for driving big current or high-tension power apparatus (M1).
The embodiment of the present invention compared with prior art; ATM intermittent duty power apparatus protective circuit provided by the invention, by the commutator equipment adopting monostable circuit to protect ATM inside, guard time window is adjustable; can automatically reset after guard time, in case electromagnet commutator burns out.There is reliable and stable, simple and practical effect, and good protected effect can be played.
Accompanying drawing explanation
Fig. 1 is ATM intermittent duty power apparatus protective circuit theory diagram of the present invention;
Fig. 2 is ATM intermittent duty power apparatus protective circuit schematic diagram of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Refer to ATM intermittent duty power apparatus protective circuit of the present invention shown in Fig. 1, comprising: external control signal circuit 1, protective circuit 2, signal buffer circuit 3, ATM internal power equipment 4.
The input of protective circuit 2 is connected with external control signal circuit 1 output, for detecting the control signal of external control signal circuit 1, and carries out identification and time-out judgement to this signal.
Signal buffer circuit 3 input connects with the output of external control signal circuit 1 and protective circuit 2 respectively; output is connected with the input of ATM 4 internal power equipment; the signal of signal buffer circuit 3 through general protective circuit 2 and the signal logic of external control signal circuit 1; export ATM internal power equipment after logical combination judgement is carried out to signal to, control the operation of the power apparatus needing protection.
When software is out of control or other reasons causes external control signal circuit that unexpected control signal occurs, namely when external control signal circuit 1 breaks down, the continuous effective state of protective circuit 2 pairs of signals is carried out time-out and is detected, once the time exceed its setting time window after, protective circuit 2 sends inhibit signal to signal buffer circuit 3, after signal buffer circuit 3 receives the inhibit signal of protective circuit 2, signal is sent to ATM internal power equipment after carrying out logic synthesis, after ATM internal power equipment receives the stopping signal of signal buffer circuit 3, out of service, prevent long-play burning apparatus, carry out the object and the effect that reach protection.
Consult shown in Fig. 2, U1A is external signal control circuit, for generation of the switching drive signal controlling power apparatus, UIA can be MCU, digital signal processor (DSP), the chips such as FPGA or device, its output signal is connected to the input of U2A and U5B through build-out resistor R1, U2A is an integrated monostable circuit element, time span or the time window width of triggering can be adjusted by electric capacity C1 and resistance R2, its output connects a reverser U4A (optional) through R3 and comes matched-phase and logic, signal is delivered to signal buffer circuit, signal buffer circuit U5B is the control signal sent here by U1A, U6 is delivered to after the signal of U2A process carries out logical process, U6 is a power drive element, be used for driving big current or high-tension power apparatus M1.In addition by the adjustment of the time constant of C1 and R2, time span and the window of protective circuit can be regulated, adapt to different demands for control.Once after control signal length effective time produced by U1A is greater than the design time constant of U2A; U2A can produce the signal of the control signal opposite logic that occurs with U1A; exporting through U5B logical "and" is a level that drived control end can be made " to forbid enable "; and then make it drive closedown; effectively protect power apparatus, prevent its long-play from causing equipment to damage.
For some power apparatus in ATM; apparatus overheat can be caused to burn because it is continuously long-running; therefore after software control is out of control; there will be and power up running status continuously; then cause that equipment long-play is overheated to be burnt; the present invention to be monitored control signal by a single-shot trigger circuit and controls; once after exceeding length expeced time running time; meeting cutting-off controlling signal during control circuit; equipment is made to enter run-stopping status; and then effectively protect equipment, reduce maintenance cost, avoid property loss.Accordingly, in the technical scheme of invention, the time window of control circuit is adjustable, can be adapted to the demand for control with different time length, applied widely, and time controling span is large.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. an ATM intermittent duty power apparatus protective circuit, is characterized in that, comprising: an external control signal circuit, a protective circuit, a signal buffer circuit, an ATM internal power equipment;
The input of protective circuit is connected with external control signal circuit output end, for detecting the control signal of external control signal circuit, and carries out identification and time-out judgement to this signal;
Signal buffer circuit input connects with the output of external control signal circuit and protective circuit respectively; signal buffer circuit output is connected with the input of ATM internal power equipment; the signal of signal buffer circuit through general protective circuit and the signal logic of external control signal circuit; export ATM internal power equipment after logical combination judgement is carried out to signal to, control the operation of the power apparatus needing protection.
2. ATM intermittent duty power apparatus protective circuit as claimed in claim 1; it is characterized in that; described external control signal circuit is made up of the first integrated chip (U1A) and resistance R1; its output is connected to protective circuit through build-out resistor R1, for generation of the switching drive signal controlling power apparatus.
3. ATM intermittent duty power apparatus protective circuit as claimed in claim 2, is characterized in that, described first integrated chip (U1A) is MCU, digital signal processor or FPGA.
4. ATM intermittent duty power apparatus protective circuit as claimed in claim 2; it is characterized in that; described protective circuit is made up of the second integrated chip (U2A), resistance R2, resistance R3, electric capacity C1; the input of the second integrated chip (U2A) adjusts the time span or time window width that trigger by electric capacity C1 and resistance R2, its output is electrically connected with signal buffer circuit through resistance R3.
5. ATM intermittent duty power apparatus protective circuit as claimed in claim 4, it is characterized in that, described protective circuit also comprises a reverser (U4A), and its one end is connected with resistance R3, another termination signal buffer circuit.
6. the ATM intermittent duty power apparatus protective circuit as described in claim 4 or 5, is characterized in that, described second integrated chip (U2A) is an integrated monostable circuit element.
7. ATM intermittent duty power apparatus protective circuit as claimed in claim 5; it is characterized in that; described signal buffer circuit is made up of a logical device (U5B), resistance R4; the first input end of logical device (U5B) is connected with the output of reverser (U4A); its second input is connected with one end of resistance R1, the output termination ATM internal power equipment of logical device (U5B).
8. ATM intermittent duty power apparatus protective circuit as claimed in claim 7, it is characterized in that, described ATM internal power equipment comprises a power drive element (U6) for driving big current or high-tension power apparatus (M1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310014487.4A CN103124062B (en) | 2013-01-16 | 2013-01-16 | ATM (automatic teller machine) intermittent running power device protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310014487.4A CN103124062B (en) | 2013-01-16 | 2013-01-16 | ATM (automatic teller machine) intermittent running power device protection circuit |
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| Publication Number | Publication Date |
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| CN103124062A CN103124062A (en) | 2013-05-29 |
| CN103124062B true CN103124062B (en) | 2015-07-01 |
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| CN201310014487.4A Expired - Fee Related CN103124062B (en) | 2013-01-16 | 2013-01-16 | ATM (automatic teller machine) intermittent running power device protection circuit |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105321258A (en) * | 2015-11-04 | 2016-02-10 | 深圳怡化电脑股份有限公司 | Commutator driving circuit and commutator driving method |
| CN107393127B (en) * | 2017-07-12 | 2023-03-24 | 深圳怡化电脑股份有限公司 | Banknote transmission deviation correcting device and method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1917321A (en) * | 2005-08-16 | 2007-02-21 | 美国芯源系统股份有限公司 | Thermal protection circuit, power transmission integration circuit and power transmission method |
| JP4049961B2 (en) * | 1999-12-02 | 2008-02-20 | セコム株式会社 | Power protection circuit |
| CN102842885A (en) * | 2011-06-22 | 2012-12-26 | 富泰华工业（深圳）有限公司 | Protecting circuit and electronic device with same |
| CN203289063U (en) * | 2013-01-16 | 2013-11-13 | 深圳市怡化电脑有限公司 | ATM intermittent operation power equipment protection circuit |
-
2013
- 2013-01-16 CN CN201310014487.4A patent/CN103124062B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4049961B2 (en) * | 1999-12-02 | 2008-02-20 | セコム株式会社 | Power protection circuit |
| CN1917321A (en) * | 2005-08-16 | 2007-02-21 | 美国芯源系统股份有限公司 | Thermal protection circuit, power transmission integration circuit and power transmission method |
| CN102842885A (en) * | 2011-06-22 | 2012-12-26 | 富泰华工业（深圳）有限公司 | Protecting circuit and electronic device with same |
| CN203289063U (en) * | 2013-01-16 | 2013-11-13 | 深圳市怡化电脑有限公司 | ATM intermittent operation power equipment protection circuit |
Non-Patent Citations (1)
| Title |
|---|
| 基于单稳态触发的电液运动平台监控保护系统设计;王勇亮等;《现代电子技术》;20050908;第28卷(第15期);第69-73页 * |
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| CN103124062A (en) | 2013-05-29 |
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Address after: Futian District Jintian road Shenzhen City, Guangdong province 518000 No. 4018 Allianz building 27 floor A02 Applicant after: SHENZHEN YIHUA COMPUTER Co.,Ltd. Applicant after: SHENZHEN YIHUA TIME TECHNOLOGY Co.,Ltd. Applicant after: SHENZHEN YIHUA FINANCIAL INTELLIGENT Research Institute Address before: Futian District Jintian road Shenzhen City, Guangdong province 518000 No. 4018 Allianz building 27 floor A02 Applicant before: Shenzhen Yihua Computer Ltd. Applicant before: SHENZHEN YIHUA TIME TECHNOLOGY Co.,Ltd. Applicant before: SHENZHEN YIHUA FINANCIAL INTELLIGENT Research Institute |
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Effective date of registration: 20200811 Address after: 210000 Jiangsu, Nanjing City, Jiangsu Province, Yuhuatai District, Ande Gate Street, No. 50, East China Development and operation center, A seat 12 Patentee after: NANJING YIHUA INFORMATION TECHNOLOGY Co.,Ltd. Address before: 27, A02, building 518000, Allianz building, 4018 Jintian Road, Shenzhen, Guangdong, Futian District Co-patentee before: SHENZHEN YIHUA TIME TECHNOLOGY Co.,Ltd. Patentee before: SHENZHEN YIHUA COMPUTER Co.,Ltd. Co-patentee before: SHENZHEN YIHUA FINANCIAL INTELLIGENT Research Institute |
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Granted publication date: 20150701 Termination date: 20220116 |